Dual Band Linear Power Amplifier Module

www.DataSheet4U.com FMPA2151 2.4–2.5GHz and 4.9–5.9GHz Dual Band Linear Power Amplifier Module February 2007 FMPA2151 2.4–2.5GHz and 4.9–5.9GHz Dual Band Linear Power Amplifier Module Features ■ ■ ■ ■ ■ ■ ■ ■ General Description The FMPA2151 is a dual frequency band power amplifier module designed for high performance WLAN applications in the 2.4 to 2.5GHz and the 4.90 to 5.9GHz frequency bands. The 16 pin 4 x 4 x 1.4 mm package with internal matching on both input and output to 50Ω minimizes next level PCB space and allows for simplified integration. Only two external bias bypass capacitors are required. The two on-chip detectors provide power sensing capability. The PA’s low power consumption and excellent linearity are achieved using our InGaP Heterojunction Bipolar Transistor (HBT) technology. Complimentary pin out available with part number FMPA2153 for MIMO applications. Dual band operation in a single package design Integrated bias bypass >33dB modulated gain 2.4 to 2.5GHz band >33dB modulated gain 4.9 to 5.9GHz band 3.0% EVM at 19dBm modulated power out (2.4GHz) 3.5% EVM at 19dBm modulated power out (5.5GHz) 3.3V positive supply operation Separate integrated power detectors with 20dB dynamic range ■ 16 pin 4 x 4 x 1.4mm leadless package ■ Internally matched to 50Ω and DC blocked RF input/output ■ Optimized for use in 802.11a/b/g applications Device (4 x 4 x 1.4mm) Z X 21 Y T T 51 Electrical Characteristics(1) 802.11g (2.4-2.5 GHz) OFDM Modulation (with 176 µs burst time, 100 µs idle time) 54 Mbps Data Rate, 16.7 MHz Bandwidth Parameter Frequency Collector Supply Voltage Mirror Supply Voltage (PA ON 2.4) Mirror Supply Current (PA ON 2.4) Gain Average Packet Current @ +19dBm Pout EVM @ +19dBm Pout(2) Detector Output @ +19dBm Pout Detector Output @ +7dBm Pout POUT Spectral Mask Compliance(3) Min. 2.4 3.0 2.6 Typ. 3.3 3.0 0.1 31 140 3.0 600 280 +20 Max. 2.5 3.6 3.6 Units GHz V V mA dB mA % mV mV dBm Notes: 1. VCC = 3.3V, PA ON 2.4 = 3.3V, TA = 25°C, PA is constantly biased, 50Ω system. 2. Percentage includes system noise floor of EVM = 0.8%. 3. Measured at PIN at which Spectral Mask Compliance is satisfied. Two-sample windowing length applied. ©2006 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com FMPA2151 Rev. E FMPA2151 2.4–2.5GHz and 4.9–5.9GHz Dual Band Linear Power Amplifier Module Electrical Characteristics(1) 802.11a OFDM Modulation (with 176 µs burst time, 100 µs idle time) 54 Mbps Data Rate, 16.7 MHz Bandwidth Parameter Frequency Collector Supply Voltage Mirror Supply Voltage (PA ON 5.5) Mirror Supply Current (PA ON 5.5) Gain Average Packet Current @ +19dBm Pout EVM @ +19dBm Pout(2) (4.9 to 5.9GHz) Detector Output @ +19dBm Pout Detector Output @ +7dBm Pout POUT Spectral Mask Compliance(3) Min. 4.9 3.0 2.6 Typ. 3.3 3.0 0.1 33 240 3.5 600 375 +20 Max. 5.9 3.6 3.6 Units GHz V V mA dB mA % mV mV dBm Absolute Maximum Ratings(4) Symbol VCC ICC PA ON Pin Tcase Tstg Parameter Positive Supply Voltage Supply Current Positive Bias Voltage RF Input Power Case Operating Temperature Storage Temperature Ratings 6 500 4 0 -40 to +85 -55 to +150 Units V mA V dBm °C °C Notes: 1. VCC = 3.3V, PA ON 5.5 = 3.3V, TA = 25°C, PA is constantly biased, 50Ω system. 2. Percentage includes system noise floor of EVM = 0.8%. 3. Measured at PIN at which Spectral Mask Compliance is satisfied. Two-sample windowing length applied. 4. No permanent damage with one parameter set at extreme limit. Other parameters set to typical values. 2 FMPA2151 Rev. E www.fairchildsemi.com FMPA2151 2.4–2.5GHz and 4.9–5.9GHz Dual Band Linear Power Amplifier Module Schematic PA ON 2.4 VCC1 2.4 VDET 2.4 1µF Pin 1 2 3 Description GND RF IN 2.4 RF IN 5.5 GND PA ON 5.5 GND VCC2 5.5 VDET 5.5 GND RF OUT 5.5 RF OUT 2.4 GND VDET 2.4 VCC1 2.4 GND PA ON 2.4 CENTER GND 16 1 15 14 13 12 4 5 50Ω 50Ω RF OUT 2.4 RF OUT 5.5 Z XYTT 2151 RF IN 2.4 RF IN 5.5 6 7 8 9 10 11 50Ω 50Ω 2 3 4 5 11 10 9 6 7 8 1µF VDET 5.5 PA ON 5.5 VCC2 5.5 12 13 14 15 16 17 Package Outline TOP VIEW 12 11 10 9 13 14 15 16 Z XYTT 2151 1 2 3 4 8 7 6 5 Z X 21 Y T T 51 I/O 1 INDICATOR 1.40 Max. FRONT VIEW SEE DETAIL A 1 2 0.650 4.00±0.10 2.70 0.30 1.02 TYP. 0.30 TYP. 0.65 TYP. 0.10 TYP. 0.30 TYP. 0.650 2.70 4.00±0.10 BOTTOM VIEW DETAIL A TYP. 3 FMPA2151 Rev. E www.fairchildsemi.com FMPA2151 2.4–2.5GHz and 4.9–5.9GHz Dual Band Linear Power Amplifier Module Applications Information CAUTION: THIS IS AN ESD SENSITIVE DEVICE. Precautions to Avoid Permanent Device Damage: • Cleanliness: Observe proper handling procedures to ensure clean devices and PCBs. Devices should remain in their original packaging until component placement to ensure no contamination or damage to RF, DC and ground contact areas. • Device Cleaning: Standard board cleaning techniques should not present device problems provided that the boards are properly dried to remove solvents or water residues. • Static Sensitivity: Follow ESD precautions to protect against ESD damage: – A properly grounded static-dissipative surface on which to place devices. – Static-dissipative floor or mat. – A properly grounded conductive wrist strap for each person to wear while handling devices. • General Handling: Handle the package on the top with a vacuum collet or along the edges with a sharp pair of bent tweezers. Avoiding damaging the RF, DC, and ground contacts on the package bottom. Do not apply excessive pressure to the top of the lid. • Device Storage: Devices are supplied in heat-sealed, moisture-barrier bags. In this condition, devices are protected and require no special storage conditions. Once the sealed bag has been opened, devices should be stored in a dry nitrogen environment. Device Usage: Fairchild recommends the following procedures prior to assembly. • Assemble the devices within 7 days of removal from the dry pack. • During the 7-day period, the devices must be stored in an environment of less than 60% relative humidity and a maximum temperature of 30°C • If the 7-day period or the environmental conditions have been exceeded, then the dry-bake procedure, at 125°C for 24 hours minimum, must be performed. Solder Materials & Temperature Profile: Reflow soldering is the preferred method of SMT attachment. Hand soldering is not recommended. Reflow Profile • Ramp-up: During this stage the solvents are evaporated from the solder paste. Care should be taken to prevent rapid oxidation (or paste slump) and solder bursts caused by violent solvent out-gassing. A maximum heating rate is 3°C/sec. • Pre-heat/soak: The soak temperature stage serves two purposes; the flux is activated and the board and devices achieve a uniform temperature. The recommended soak condition is: 60-180 seconds at 150-200°C. • Reflow Zone: If the temperature is too high, then devices may be damaged by mechanical stress due to thermal mismatch or there may be problems due to excessive solder oxidation. Excessive time at temperature can enhance the formation of inter-metallic compounds at the lead/board interface and may lead to early mechanical failure of the joint. Reflow must occur prior to the flux being completely driven off. The duration of peak reflow temperature should not exceed 20 seconds. Soldering temperatures should be in the range 255–260°C, with a maximum limit of 260°C. • Cooling Zone: Steep thermal gradients may give rise to excessive thermal shock. However, rapid cooling promotes a finer grain structure and a more crack-resistant solder joint. The illustration below indicates the recommended soldering profile. Solder Joint Characteristics: Proper operation of this device depends on a reliable void-free attachment of the heat sink to the PWB. The solder joint should be 95% void-free and be a consistent thickness. Rework Considerations: Rework of a device attached to a board is limited to reflow of the solder with a heat gun. The device should be subjected to no more than 15°C above the solder melting temperature for no more than 5 seconds. No more than 2 rework operations should be performed. Recommended Solder Reflow Profile 260 Ramp-Up R ate 3 °C/sec max Peak tem p 260 +0/-5 °C 10 - 20 sec Temperature (°C) 217 200 Time above li quidus temp 60 - 150 sec 150 Preheat, 150 to 200 °C 60 - 180 sec 100 Ramp-Up R ate 3 °C/sec max 50 25 Time 25 °C/sec t o peak tem p 6 mi nutes max Ramp-Do wn Rate 6 °C/sec max Time (Sec) 4 FMPA2151 Rev. E www.fairchildsemi.com FMPA2151 2.4–2.5GHz and 4.9–5.9GHz Dual Band Linear Power Amplifier Module FAIRCHILD SEMICONDUCTOR TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. FACT Quiet Series™ GlobalOptoisolator™ GTO™ HiSeC™ I2C™ i-Lo™ ImpliedDisconnect™ IntelliMAX™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ Across the board. Around the world.™ The Power Franchise® Programmable Active Droop™ ACEx™ ActiveArray™ Bottomless™ Build it Now™ CoolFET™ CROSSVOLT ™ DOME™ EcoSPARK™ E2CMOS™ EnSigna™ FACT® FAST® FASTr™ FPS™ FRFET™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. OCX™ OCXPro™ OPTOLOGIC® OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerEdge™ PowerSaver™ PowerTrench® QFET® QS™ QT Optoelectronics