Bi-Directional Triode Thyristor Planar Silicon

Part  Number FKPF12N60
Manufacturer Fairchild Semiconductor
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www.DataSheet4U.com FKPF12N60 / FKPF12N80 FKPF12N60 / FKPF12N80 Application Explanation • • • • Switching mode power supply, light dimmer, electric flasher unit, hair drier TV sets, stereo, refrigerator, washing machine Electric blanket, solenoid driver, small motor control Photo copier, electric tool 2 1: T1 2: T2 3: Gate 3 123 TO-220F 1 Bi-Directional Triode Thyristor Planar Silicon Absolute Maximum Ratings TC=25°C unless otherwise noted Symbol VDRM Parameter Repetitive Peak Off-State Voltage (Note1 ) Rating FKPF12N60 600 FKPF12N80 800 Units V Symbol IT (RMS) ITSM I2t di/dt PGM PG (AV) VGM IGM TJ TSTG Viso Parameter RMS On-State Current Surge On-State Current I2t for Fusing Critical Rate of Rise of On-State Current Peak Gate Power Dissipation Average Gate Power Dissipation Peak Gate Voltage Peak Gate Current Junction Temperature Storage Temperature Isolation Voltage Conditions Commercial frequency, sine full wave 360° conduction, TC=82°C 60Hz sinewave 1 full cycle, peak value, non-repetitive Value corresponding to 1 cycle of halfwave 60Hz, surge on-state current IG = 2x IGT, tr ≤ 100ns TC = +80°C, Pulse Width = 1.0µs TC = +80°C, t = 8.3ms Pulse Width ≤ 1.0µsec; TC = 90°C Rating 12 120 60 50 5 0.5 10 2 - 40 ~ 125 - 40 ~ 125 Units A A A2s A/µs W W V A °C °C V Ta=25°C, AC 1 minute, T1 T2 G terminal to case 1500 Thermal Characteristic Symbol Rth(J-C) Parameter Thermal Resistance Test Condition Junction to case (Note 4) Min. Typ. Max. 3.0 Units °C/W ©2002 Fairchild Semiconductor Corporation Rev. A1, December 2002 FKPF12N60 / FKPF12N80 Electrical Characteristics TC=25°C unless otherwise noted Symbol IDRM VTM Parameter Repetieive Peak Off-State Current On-State Voltage I VGT Gate Trigger Voltage (Note 2) II III I IGT VGD IH IL dv/dt (dv/dt)C Gate Trigger Current (Note 2) Gate Non-Trigger Voltage Holding Current Latching Current Critical Rate of Rise of Off-State Voltag Critical-Rate of Rise of Off-State Commutating Voltage (Note 3) I, III II VDRM = Rated, Tj = 125°C, Exponential Rise 10 300 II III VD=6V, RL=6Ω, RG=330Ω TJ=125°C, VD=1/2VDRM VD = 12V, ITM = 1A VD = 12V, IG = 1.2IGT VD=6V, RL=6Ω, RG=330Ω Test Condition VDRM applied TC=25°C, ITM=17A Instantaneous measurement T2(+), Gate (+) T2(+), Gate (-) T2(-), Gate (-) T2(+), Gate (+) T2(+), Gate (-) T2(-), Gate (-) Min. 0.2 Typ. Max. 20 1.5 1.5 1.5 1.5 30 30 30 50 50 70 Units µA V V V V mA mA mA V mA mA mA V/µs V/µs Notes: 1. Gate Open 2. Measurement using the gate trigger characteristics measurement circuit 3. The critical-rate of rise of the off-state commutating voltage is shown in the table below 4. The contact thermal resistance RTH(c-f) in case of greasing is 0.5 °C/W VDRM (V) Test Condition Commutating voltage and current waveforms (inductive load) FKPF12N60 FKPF12N80 1. Junction Temperature TJ=125°C 2. Rate of decay of on-state commutating current (di/dt)C = - 6.0A/ms 3. Peak off-state voltage VD = 400V Supply Voltage (di/dt)C Main Current Time Time Main Voltage (dv/dt)C Time VD Quadrant Definitions for a Triac T2 Positive + (+) T2 (+) T2 Quadrant II (+) IGT GATE T1 (+) IGT GATE T1 Quadrant I IGT (+) T2 (+) T2 + IGT Quadrant III (+) IGT GATE T1 (+) IGT GATE T1 Quadrant IV T2 Negative ©2002 Fairchild Semiconductor Corporation Rev. A1, December 2002 FKPF12N60 / FKPF12N80 Typical Curves 50 200 180 SURGE ON-STATE CURRENT [A] 40 160 140 120 100 80 60 40 20 0 ON-STATE CURRENT [A] 30 Tj=25℃ Tj=125℃ 20 10 0 0.0 0.5 1.0 1.5 2.0 1 10 100 ON-STATE VOLTAGE [V] CONDUCTION TIME (CYCLES AT 60Hz) Figure 1. Maximum On-state Characteristics Figure 2. Rated Surge On-state Current 100 1000 VGM=10V 10 PGM=5W PG(AV)=0.5W VGT=1.5V NORMALIZED GATE TRIGGER CURRENT [%] GATE VOLTAGE [V] IFGTⅠ, IRGTⅠ IGM=2A 100 1 IFGTⅢ 0.1 10 IRGTⅠ IFGTⅠ, IRGTⅢ 100 VGD=0.2V 1000 10000 10 -60 -40 -20 0 20 40 60 80 100 120 140 GATE CURRENT [mA] JUNCTION TEMPERATURE [℃] Figure 3. Gate Characteristics Figure 4. Gate Trigger Current vs Tj 1000 NORMALIZED GATE TRIGGER VOLTAGE [%] 10 JUNCTION TO CASE 100 TRANSIENT THERMAL IMPEDANCE o Rth(j-c) [ C/W] -40 -20 0 20 40 60 80 100 120 140 1 10 -60 0.1 1E-3 0.01 0.1 1 10 100 JUNCTION TEMPERATURE [℃] TIME [s] Figure 5. Gate Trigger Voltage vs Tj Figure 6. Transient Thermal Impedance ©2002 Fairchild Semiconductor Corporation Rev. A1, December 2002 FKPF12N60 / FKPF12N80 Typical Curves (Continues) 140 160 Maximum Allowable Ambient Temperature [℃] 120 CASE TEMPERATURE [℃] 100 ① NO HEAT SINK ② 30 × 30 × 2 ㎜ AL HEAT SINK ③ 50 × 50 × 2 ㎜ AL HEAT SINK ④ 70 × 70 × 2 ㎜ AL HEAT SINK ⑤ 100 × 100 × 2 ㎜ AL HEAT SINK 140 120 100 80 60 40 20 0 0 2 4 CURVES APPLY REGARDLESS OF CONDUCTION ANGLE 80 60 40 20 ① 0 0 2 ② 4 ③ 6 ④ 8 ⑤ 10 12 360° CONDUCTION RESISTIVE, INDUCTIVE LOAD 6 8 10 12 14 16 IT(RMS) [A] RMS ON-STATE CURRENT [A] Figure 7. Allowable Ambient Temperature vs Rms On-state Current Figure 8. Allowable Case Temperature vs Rms On-state Current NORMALIZED REPETIVITE OFF-STATE CURRENT [%] 16 10 5 ON STATE POWER DISSIPATION [W] 14 12 10 8 6 4 2 0 0 360° CONDUCTION RESISTIVE, INDUCTIVE LOAD TYPICAL EXAMPLE 10 4 10 3 10 2 2 4 6 8 10 12 14 16 -60 -40 -20 0 20 40 60 80 100 120 140 RMS ON-STATE CURRENT [A] JUNCTION TEMPERATURE [V] Figure 9. Maximum On-state Power Dissipation Figure 10. Repetitive Peak Off-state Current vs Junction Temperature 1000 1000 NORMALIZED HOLDING CURRENT [%] TYPICAL EXAMPLE LATCHING CURRENT [mA] 100 T2(+), G(-) TYPICAL EXEMPLE 100 10 T2(± ), G(+) TYPICAL EXEMPLE 10 -60 -40 -20 0 20 40 60 80 100 120 140 1 -60 -40 -20 0 20 40 60 80 100 120 140 JUNCTION TEMPERATURE [℃] JUNCTION TEMPERATURE Figure 11. Holding Current vs Junction Temperature Figure 12. Laching Current vs Junction Temperature ©2002 Fairchild Semiconductor Corporation Rev. A1, December 2002 FKPF12N60 / FKPF12N80 Typical Curves (Continues) 160 1000 NORMALIZED BREAKOVER VOLTAGE [%] TYPICAL EXAMPLE 140 NORMALIZED GATE TRIGGER CURRENT [%] IRGTⅠ IRGTⅢ 100 120 100 80 60 IFGTⅠ 40 20 0 -60 10 1 10 100 -40 -20 0 20 40 60 80 100 120 140 JUNCTION TEMPERATURE [V] GATE CURRENT PULSE WIDTH [uS] Figure 13. Breakover Voltage vs. Junction Temperature Figure 14. Gate Trigger Current vs. Gate Current Pulse Width 160 NORMALIZED BREAKOVER VOLTAGE [%] 140 120 100 80 60 40 20 Ⅰ QUADRANT CRITICAL RATE OF RISE OF OFF-STATE COMMUTATING VOLTAGE [V/us] TYPICAL EXAMPLE Tj=125℃ 100 TYPICAL EXAMPLE Tj = 125℃ IT = 4A τ = 500us VD = 200V f = 3Hz Ⅰ QUADRANT 10 Ⅲ QUADRANT Ⅲ QUADRANT 1 10 1 10 2 10 3 10 4 10 0 10 1 10 2 10 3 RATE OF RISE OF-STATE VOLTAGE [V/us] RATE OF DECAY OF ON-STATE COMMUTATION CURRENT [A/ms] Figure 15. Breakover Voltage vs. Rate of Rise of Off-State Voltage Figure 16. Commutation Characteristics ©2002 Fairchild Semiconductor Corporation Rev. A1, December 2002 FKPF12N60 / FKPF12N80 Package Dimension TO-220F 3.30 ±0.10 10.16 ±0.20 (7.00) ø3.18 ±0.10 2.54 ±0.20 (0.70) 6.68 ±0.20 15.80 ±0.20 (1.00x45°) MAX1.47 9.75 ±0.30 0.80 ±0.10 (3 0° ) 0.35 ±0.10 2.54TYP [2.54 ±0.20] #1 0.50 –0.05 2.54TYP [2.54 ±0.20] 4.70 ±0.20 +0.10 2.76 ±0.20 9.40 ±0.20 Dimensions in Millimeters ©2002 Fairchild Semiconductor Corporation Rev. A1, December 2002 15.87 ±0.20 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FACT™ ActiveArray™ FACT Quiet series™ Bottomless™ FAST® FASTr™ CoolFET™ CROSSVOLT™ FRFET™ GlobalOptoisolator™ DOME™ EcoSPARK™ GTO™ E2CMOS™ HiSeC™ EnSigna™ I2C™ Across the board. Around the world.™ The Power Franchise™ Programmable Active Droop™ DISCLAIMER ImpliedDisconnect™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC® OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench® QFET™ QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ SILENT SWITCHER® SMART START™ SPM™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET® VCX™ FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be which, (a) are intended for surgical implant into the body, reasonably expected to cause the failure of the life support or (b) support or sustain life, or (c) whose failure to perform device or system, or to affect its safety or effectiveness. when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild S




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