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Part Number |
FDU6N50 |
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Manufacturer |
Fairchild Semiconductor |
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Semiconductor DataSheet |
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DataSheet View |
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FDD6N50/FDU6N50 500V N-Channel MOSFET
January 2006
UniFET
FDD6N50/FDU6N50
500V N-Channel MOSFET Features
• 6A, 500V, RDS(on) = 0.9Ω @VGS = 10 V • Low gate charge ( typical 12.8 nC) • Low Crss ( typical 9 pF) • Fast switching • 100% avalanche tested • Improved dv/dt capability
TM
Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficient switched mode power supplies and active power factor correction.
D D
G
S
D-PAK
FDD Series
I-PAK
GDS
FDU Series
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S
Absolute Maximum Ratings
Symbol
VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL Drain-Source Voltage Drain Current Drain Current Gate-Source voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) - Derate above 25°C
(Note 2) (Note 1) (Note 1) (Note 3)
Parameter
- Continuous (TC = 25°C) - Continuous (TC = 100°C) - Pulsed
(Note 1)
FDD6N50/FDU6N50
500 6 3.8 24 ±30 270 6 8.9 4.5 89 0.71 -55 to +150 300
Unit
V A A A V mJ A mJ V/ns W W/°C °C °C
Operating and Storage Temperature Range Maximum Lead Temperature for Soldering Purpose, 1/8” from Case for 5 Seconds
Thermal Characteristics
Symbol
RθJC RθJA
Parameter
Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient
Min.
---
Max.
1.4 83
Unit
°C/W °C/W
©2006 Fairchild Semiconductor Corporation
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FDD6N50/FDU6N50 REV. A
FDD6N50/FDU6N50 500V N-Channel MOSFET
Package Marking and Ordering Information
Device Marking
FDD6N50 FDD6N50 FDU6N50
Device
FDD6N50TM FDD6N50TF FDU6N50TU
Package
D-PAK D-PAK I-PAK
TC = 25°C unless otherwise noted
Reel Size
380mm 380mm -
Tape Width
16mm 16mm -
Quantity
2500 2000 70
Electrical Characteristics
Symbol
Off Characteristics BVDSS ∆BVDSS / ∆TJ IDSS IGSSF IGSSR VGS(th) RDS(on) gFS Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS ISM VSD trr Qrr
NOTES:
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
Conditions
VGS = 0V, ID = 250µA ID = 250µA, Referenced to 25°C VDS = 500V, VGS = 0V VDS = 400V, TC = 125°C VGS = 30V, VDS = 0V VGS = -30V, VDS = 0V VDS = VGS, ID = 250µA VGS = 10V, ID = 3A VDS = 40V, ID = 3A VDS = 25V, VGS = 0V, f = 1.0MHz
(Note 4)
Min.
500 -----3.0 ------
Typ.
-0.5 -----0.76 2.5 720 95 9 6 55 25 35 12.8 3.7 5.8
Max Units
--1 10 100 -100 5.0 0.9 -940 190 13.5 20 120 60 80 16.6 --V V/°C µA µA nA nA V Ω S pF pF pF ns ns ns ns nC nC nC
On Characteristics
Dynamic Characteristics
Switching Characteristics VDD = 250V, ID = 6A RG = 25Ω
(Note 4, 5)
------(Note 4, 5)
VDS = 400V, ID = 6A VGS = 10V
--
Drain-Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = 6A VGS = 0V, IS = 6A dIF/dt =100A/µs
(Note 4)
------
---275 1.7
6 24 1.4 ---
A A V ns µC
1. Repetitive Rating: Pulse width limited by maximum junction temperature 2. IAS = 6A, VDD = 50V, L=13.5mH, RG = 25Ω, Starting TJ = 25°C 3. ISD ≤ 6A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test: Pulse width ≤ 300µs, Duty Cycle ≤ 2% 5. Essentially Independent of Operating Temperature Typical Characteristics
FDD6N50/FDU6N50 REV. A
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FDD6N50/FDU6N50 500V N-Channel MOSFET
Typical Performance Characteristics
Figure 1. On-Region Characteristics
20
Top : VGS 10.0 V 8.0V 7.5 V 7.0 V 6.5 V 6.0 V 5.5 V 5.0 V
Figure 2. Transfer Characteristics
10
1
ID , Drain Current [A]
15
ID, Drain Current [A]
150∩ 10
0
Bottom :
10
25∩ -55∩ 10
-1
5
∝ Notes : 1. 250レ Pulse Test s 2. TC = 25∩
∝ Note 1. VDS = 40V s 2. 250レ Pulse Test
0
0
10
20
30
40
50
10
-2
VDS, Drain-Source Voltage [V]
2
4
6
8
10
VGS , Gate-Source Voltage [V]
Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature
RDS(ON) [ヘ ],Drain-Source On-Resistance
2.5
IDR , Reverse Drain Current [A]
10
1
2.0
VGS = 10V
1.5
1.0
VGS = 20V
10
0
150∩
25∩
∝ Notes : 1. VGS = 0V 2. 250レ Pulse Test s
0.5
∝ Note : TJ = 25∩
0.0
0
5
10
15
20
10
-1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
ID, Drain Current [A]
VSD , Source-Drain Voltage [V]
Figure 5. Capacitance Characteristics
12
Figure 6. Gate Charge Characteristics
Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd
VDS = 100V
1000
VGS, Gate-Source Voltage [V]
10
VDS = 250V VDS = 400V
Ciss Coss
Capacitance [pF]
8
6
100
Crss
∝ Notes : 1. VGS = 0 V 2. f = 1 MHz
4
2
∝ Note : ID = 6A
10
0 1
0
10
10
0
5
10
15
VDS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
FDD6N50/FDU6N50 REV. A
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FDD6N50/FDU6N50 500V N-Channel MOSFET
Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation vs. Temperature
1.2
Figure 8. On-Resistance Variation vs. Temperature
3.0
BVDSS, (Normalized) Drain-Source Breakdown Voltage
RDS(ON), (Normalized) Drain-Source On-Resistance
2.5
1.1
2.0
1.0
1.5
0.9
♦ Notes :
1.0
♦ Notes :
1. VGS = 0 V 2. ID = 250 µA
0.5
1. VGS = 10 V 2. ID = 3 A
0.8 -100
-50
0
50
100
o
150
200
0.0 -100
-50
0
50
100
o
150
200
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 9. Maximum Safe Operating Area
8
Figure 10. Maximum Drain Current vs. Case Temperature
10
2
Operation in This Area is Limited by R DS(on)
10 us
ID, Drain Current [A]
1 ms 10 ms
10
0
DC
ID, Drain Current [A]
10
3
10
1
100 us
6
4
∝ Notes :
10
-1
1. TC = 25 C 2. TJ = 150 C 3. Single Pulse
o
o
2
10
-2
10
0
10
1
10
2
0 25
50
75
100
125
150
VDS, Drain-Source Voltage [V]
TC, Case Temperature [∩ ]
Figure 11. Transient Thermal Response Curve
10
0
ZヨJC Thermal Response (t),
D = 0 .5 0 .2 0 .1
10
-1
∝ N o te s : 1 . Z ヨ J C = 1 .4 ∩ /W M a x. (t) 2 . D u ty F a c to r, D = t 1 /t 2 3 . T JM - T C = P D M * Z ヨ J C (t)
0 .0 5 0 .0 2 0 .0 1
PDM t1
s in g le p u ls e
t2
0 1
10
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
10
t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ]
FDD6N50/FDU6N50 REV. A
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FDD6N50/FDU6N50 500V N-Channel MOSFET
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
FDD6N50/FDU6N50 REV. A
5
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FDD6N50/FDU6N50 500V N-Channel MOSFET
Peak Diode Recovery dv/dt Test Circuit & Waveforms
FDD6N50/FDU6N50 REV. A
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FDD6N50/FDU6N50 500V N-Channel MOSFET
Mechanical Dimensions
D-PAK
Dimensions in Millimeters
FDD6N50/FDU6N50 REV. A
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FDD6N50/FDU6N50 500V N-Channel MOSFET
Mechanical Dimensions
(Continued)
I-PAK
Dimensions in Millimeters
FDD6N50/FDU6N50 REV. A
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TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ FAST® ActiveArray™ FASTr™ Bottomless™ FPS™ Build it Now™ FRFET™ CoolFET™ GlobalOptoisolator™ CROSSVOLT™ GTO™ DOME™ HiSeC™ EcoSPARK™ I2C™ E2CMOS™ i-Lo™ EnSigna™ ImpliedDisconnect™ FACT™ IntelliMAX™ FACT Quiet Series™ Across the board. Around the world.™ The Power Franchise® Programmable Active Droop™
DISCLAIMER
ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC® OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerEdge™
PowerSaver™ PowerTrench® QFET® QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ μSerDes™ ScalarPump™ SILENT SWITCHER® SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3
SuperSOT™-6 SuperSOT™-8 SyncFET™ TCM™ TinyLogic® TINYOPTO™ TruTranslation™ UHC™ UltraFET® UniFET™ VCX™ Wire™
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS D |