N-Channel UltraFET Trench MOSFET

Part  Number FDMS5672
Manufacturer Fairchild Semiconductor
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FDMS5672 N-Channel UltraFET Trench® MOSFET February 2007 FDMS5672 N-Channel UltraFET Trench® MOSFET 60V, 22A, 11.5mΩ Features General Description UItraFET devices combine characteristics that enable benchmark efficiency in power conversion applications. Optimized for rDS(on), low ESR, low total and Miller gate charge, these devices are ideal for high frequency DC to DC converters. Max rDS(on) = 11.5mΩ at VGS = 10V, ID = 10.6A Max rDS(on) = 16.5mΩ at VGS = 6V, ID = 8A Typ Qg = 32nC at VGS = 10V Low Miller Charge Optimized efficiency at high frequencies RoHS Compliant tm Application DC - DC Conversion Pin 1 S S S G D D www.DataSheet4U.com 5 6 7 8 4 G 3 S 2 S 1 S D D D D D D Power 56 (Bottom view) MOSFET Maximum Ratings TA = 25°C unless otherwise noted Symbol VDS VGS ID Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous (Package limited) -Continuous (Silicon limited) -Continuous -Pulsed PD TJ, TSTG Power Dissipation Power Dissipation TC = 25°C TA = 25°C (Note 1a) TC = 25°C TC = 25°C TA = 25°C (Note 1a) Ratings 60 ±20 22 65 10.6 60 78 2.5 -55 to +150 W °C A Units V V Operating and Storage Junction Temperature Range Thermal Characteristics RθJC RθJA Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient (Note 1a) 1.6 50 °C/W Package Marking and Ordering Information Device Marking FDMS5672 Device FDMS5672 Package Power 56 Reel Size 13’’ Tape Width 12mm Quantity 3000 units ©2006 Fairchild Semiconductor Corporation FDMS5672 Rev.C1 1 www.fairchildsemi.com FDMS5672 N-Channel UltraFET Trench® MOSFET Electrical Characteristics TJ = 25°C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS ∆BVDSS ∆TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = 250µA, VGS = 0V ID = 250µA, referenced to 25°C VDS = 48V, VGS = 0V VGS = ±20V, VDS = 0V 60 59 1 ±100 V mV/°C µA nA On Characteristics VGS(th) ∆VGS(th) ∆TJ rDS(on) gFS Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient VGS = VDS, ID = 250µA ID = 250µA, referenced to 25°C VGS = 10V, ID = 10.6A Drain to Source On Resistance VGS = 6V, ID = 8A VGS = 10V, ID = 10.6A, TJ = 125°C VDS = 10V, ID = 10.6A 2 3.2 -11 9.4 13.0 15.0 26 11.5 16.5 18.0 S mΩ 4 V mV/°C Forward Transconductance Dynamic Characteristics Ciss Coss Crss Rg Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance VDS = 30V, VGS = 0V, f = 1MHz f = 1MHz 2100 375 120 1.2 2800 500 180 pF pF pF Ω Switching Characteristics td(on) tr td(off) tf Qg(TOT) Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge at 10V Gate to Source Gate Charge Gate to Drain “Miller” Charge VGS = 0V to 10V V = 30V DD ID = 10.6A VDD = 30V, ID = 10.6A VGS = 10V, RGEN = 6Ω 16 17 22 8 32 10 8.3 29 31 35 16 45 ns ns ns ns nC nC nC Drain-Source Diode Characteristics VSD trr Qrr Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = 10.6A (Note 2) 0.80 35 42 1.20 53 63 V ns nC IF = 10.6A, di/dt = 100A/µs Notes: 1: RθJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 50°C/W when mounted on a 1 in2 pad of 2 oz copper b. 125°C/W when mounted on a minimum pad of 2 oz copper 2: Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%. FDMS5672 Rev.C1 2 www.fairchildsemi.com FDMS5672 N-Channel UltraFET Trench® MOSFET Typical Characteristics TJ = 25°C unless otherwise noted NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 120 ID, DRAIN CURRENT (A) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 VGS = 10V VGS = 8V VGS = 5V VGS = 6V VGS = 7V PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX 100 80 60 40 VGS = 10V VGS = 8V PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX VGS = 7V VGS = 6V VGS = 5V 20 0 0 1 2 3 4 0 20 40 60 80 100 120 VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT(A) Figure 1. On Region Characteristics Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 30 rDS(on), DRAIN TO SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 1.8 1.6 1.4 1.2 1.0 0.8 0.6 -75 ID = 10.6A VGS = 10V PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX 25 20 ID =10.6A TJ = 125oC 15 TJ = 25oC 10 5 -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) 4 5 6 7 8 9 VGS, GATE TO SOURCE VOLTAGE (V) 10 Figure 3. Normalized On Resistance vs Junction Temperature 60 IS, REVERSE DRAIN CURRENT (A) Figure 4. On-Resistance vs Gate to Source Voltage 100 ID, DRAIN CURRENT (A) 50 40 30 PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX VGS = 0V 10 1 0.1 TJ = -55oC TJ = 150oC TJ = 25oC TJ = 25oC 20 TJ = 150oC TJ = -55oC 10 0 0.01 1E-3 0.0 2 3 4 5 VGS, GATE TO SOURCE VOLTAGE (V) 6 0.2 0.4 0.6 0.8 1.0 VSD, BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current FDMS5672 Rev.C1 3 www.fairchildsemi.com FDMS5672 N-Channel UltraFET Trench® MOSFET Typical Characteristics TJ = 25°C unless otherwise noted VGS, GATE TO SOURCE VOLTAGE(V) 10 8 6 VDD = 40V ID = 10.6A VDD = 20V 4000 Ciss CAPACITANCE (pF) VDD = 30V 1000 Coss 4 2 0 100 40 0.1 f = 1MHz VGS = 0V Crss 0 5 10 15 20 25 Qg, GATE CHARGE(nC) 30 35 1 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 60 Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 70 ID, DRAIN CURRENT (A) 60 50 40 30 20 10 Limited by Package RθJC = 1.6 C/W o 20 IAS, AVALANCHE CURRENT(A) 10 VGS = 10V TJ = 25oC VGS = 6V TJ = 125oC 1 0.01 0.1 1 10 100 tAV, TIME IN AVALANCHE(ms) 500 0 25 50 75 100 o 125 150 TC, CASE TEMPERATURE ( C) Figure 9. Unclamped Inductive Switching Capability 50 ID, DRAIN CURRENT (A) Figure 10. Maximum Continuous Drain Current vs Case Temperature 2000 1000 P(PK), PEAK TRANSIENT POWER (W) 10 1 100us 1ms 10ms 100ms VGS = 10V FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: 150 – T A ---------------------125 TA = 25oC 100 I = I25 0.1 0.01 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(on) SINGLE PULSE TJ = MAX RATED TA = 25oC 1s 10s DC 10 SINGLE PULSE 1E-3 0.1 1 10 100 500 1 0.6 -3 10 10 -2 VDS, DRAIN to SOURCE VOLTAGE (V) 10 10 10 t, PULSE WIDTH (s) -1 0 1 10 2 10 3 Figure 11. Forward Bias Safe Operating Area Figure 12. Single Pulse Maximum Power Dissipation FDMS5672 Rev.C1 4 www.fairchildsemi.com FDMS5672 N-Channel UltraFET Trench® MOSFET Typical Characteristics TJ = 25°C unless otherwise noted 2 1 NORMALIZED THERMAL IMPEDANCE, ZθJA DUTY CYCLE-DESCENDING ORDER 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM 0.01 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA 1E-3 5E-3 -3 10 SINGLE PULSE 10 -2 10 -1 10 0 10 1 10 2 10 3 t, RECTANGULAR PULSE DURATION (s) Figure 13. Transient Thermal Response Curve FDMS5672 Rev.C1 5 www.fairchildsemi.com FDMS5672 N-Channel UltraFET Trench® MOSFET FDMS5672 Rev.C1 6 www.fairchildsemi.com FDMS5672 N-Channel UItraFET Trench® MOSFET TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. FACT Quiet Series™ GlobalOptoisolator™ GTO™ HiSeC™ I2C™ i-Lo™ ImpliedDisconnect™ IntelliMAX™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ Across the board. Around the world.™ The Power Franchise® Programmable Active Droop™ ACEx™ ActiveArray™ Bottomless™ Build it Now™ CoolFET™ CROSSVOLT™ DOME™ EcoSPARK™ E2CMOS™ EnSigna™ FACT® FAST® FASTr™ FPS™ FRFET™ OCX™ OCXPro™ OPTOLOGIC® OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerEdge™ PowerSaver™ PowerTrench® QFET® QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ ScalarPump™ SILENT SWITCHER® SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TCM™ TinyBoost™ TinyBuck™ TinyPWM™ TinyPower™ TinyLogic® TINYOPTO™ TruTranslation™ UHC® UniFET™ VCX™ Wire™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may ch




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