N-Channel UltraFET Trench MOSFET

Part  Number FDMS3672
Manufacturer Fairchild Semiconductor
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FDMS3672 N-Channel UltraFET Trench MOSFET February 2007 FDMS3672 N-Channel UltraFET Trench MOSFET 100V, 22A, 23mΩ Features Max rDS(on) = 23mΩ at VGS = 10V, ID = 7.4A Max rDS(on) = 29mΩ at VGS = 6V, ID = 6.6A Typ Qg = 31nC at VGS = 10V Low Miller Charge Optimized efficiency at high frequencies RoHS Compliant tm General Description UItraFET devices combine characteristics that enable benchmark efficiency in power conversion applications. Optimized for rDS(on), low ESR, low total and Miller gate charge, these devices are ideal for high frequency DC to DC converters. Application DC - DC Conversion Pin 1 S S S G D D www.DataSheet4U.com 5 6 7 8 4G 3S 2S 1S D D D D D D Power (Bottom view) MOSFET Maximum Ratings TA = 25°C unless otherwise noted Symbol VDS VGS Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous (Package limited) ID -Continuous (Silicon limited) -Continuous -Pulsed PD TJ, TSTG Power Dissipation Power Dissipation TC = 25°C TA = 25°C (Note 1a) TC = 25°C TC = 25°C TA = 25°C (Note 1a) Ratings 100 ±20 22 41 7.4 30 78 2.5 -55 to +150 W °C A Units V V Operating and Storage Junction Temperature Range Thermal Characteristics RθJC RθJA Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient (Note 1a) 1.6 50 °C/W Package Marking and Ordering Information Device Marking FDMS3672 Device FDMS3672 Package Power 56 Reel Size 13’’ Tape Width 12mm Quantity 3000 units ©2007 Fairchild Semiconductor Corporation FDMS3672 Rev.C 1 www.fairchildsemi.com FDMS3672 N-Channel UltraFET Trench MOSFET Electrical Characteristics TJ = 25°C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS ∆BVDSS ∆TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = 250µA, VGS = 0V ID = 250µA, referenced to 25°C VDS = 80V, VGS = 0V TJ = 55°C VGS = ±20V, VDS = 0V 100 104 1 10 ±100 V mV/°C µA nA On Characteristics VGS(th) ∆VGS(th) ∆TJ rDS(on) gFS Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient Drain to Source On Resistance Forward Transconductance VGS = VDS, ID = 250µA ID = 250µA, referenced to 25°C VGS = 10V, ID = 7.4A VGS = 6V, ID = 6.6A VGS = 10V, ID = 7.4A, TJ = 125°C VDS = 10V, ID = 7.4A 2 3.1 -11 19 24 33 20 23 29 40 S mΩ 4 V mV/°C Dynamic Characteristics Ciss Coss Crss Rg Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance VDS = 50V, VGS = 0V, f = 1MHz f = 1MHz 2015 210 90 1.3 2680 280 135 pF pF pF Ω Switching Characteristics td(on) tr td(off) tf Qg Qg Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge at 10V Total Gate Charge at 4.5V Gate to Source Gate Charge Gate to Drain “Miller” Charge VGS = 0V to 10V VGS = 0V to 4.5V VDD = 50V ID = 7.4A VDD = 50V, ID = 7.4A VGS = 10V, RGEN = 6Ω 23 11 36 8 31 9.5 8 37 20 58 16 44 ns ns ns ns nC nC nC nC Drain-Source Diode Characteristics VSD trr Qrr Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = 7.4A (Note 2) 0.8 52 101 1.2 78 152 V ns nC IF = 7.4A, di/dt = 100A/µs Notes: 1: RθJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 50°C/W when mounted on a 1 in2 pad of 2 oz copper b. 125°C/W when mounted on a minimum pad of 2 oz copper 2: Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%. FDMS3672 Rev.C 2 www.fairchildsemi.com FDMS3672 N-Channel UltraFET Trench MOSFET Typical Characteristics TJ = 25°C unless otherwise noted 60 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 3.0 VGS = 10V PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX VGS = 8V VGS = 6V PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX 50 ID, DRAIN CURRENT (A) 2.5 2.0 1.5 1.0 VGS = 5V 40 30 20 VGS = 5V VGS = 6V VGS = 8V 10 0 0.0 VGS = 10V 0.5 0 10 20 30 40 ID, DRAIN CURRENT(A) 50 60 0.5 1.0 1.5 2.0 2.5 VDS, DRAIN TO SOURCE VOLTAGE (V) 3.0 Figure 1. On-Region Characteristics Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 60 rDS(on), DRAIN TO SOURCE ON-RESISTANCE (mΩ) ID = 7.4A PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 -50 -25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (oC) 150 ID = 7.4A VGS = 10V 50 40 30 TJ = 25oC TJ = 150oC 20 10 4.5 6.0 7.5 9.0 VGS, GATE TO SOURCE VOLTAGE (V) 10 Figure 3. Normalized On- Resistance vs Junction Temperature 30 IS, REVERSE DRAIN CURRENT (A) Figure 4. On-Resistance vs Gate to Source Voltage 100 ID, DRAIN CURRENT (A) 25 20 15 10 5 PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX VGS = 0V 10 1 0.1 0.01 1E-3 0.0 TJ = -55oC TJ = 150oC TJ = 25oC TJ = 150oC TJ = 25oC TJ = -55oC 0 2 3 4 5 6 7 VGS, GATE TO SOURCE VOLTAGE (V) 8 0.2 0.4 0.6 0.8 1.0 VSD, BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current FDMS3672 Rev.C 3 www.fairchildsemi.com FDMS3672 N-Channel UltraFET Trench MOSFET Typical Characteristics TJ = 25°C unless otherwise noted VGS, GATE TO SOURCE VOLTAGE(V) 10 ID = 7.4A VDD = 25V VDD = 50V 10000 Ciss 8 CAPACITANCE (pF) 1000 Coss 6 VDD = 75V 4 2 0 0 10 20 30 Qg, GATE CHARGE(nC) 40 100 f = 1MHz VGS = 0V Crss 10 0.1 1 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 100 Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 50 20 IAS, AVALANCHE CURRENT(A) ID, DRAIN CURRENT (A) 10 40 VGS = 10V TJ = 25oC TJ = 125oC 30 VGS = 6V 20 10 RθJC = 1.6 C/W o Limited by Package 1 0.01 0.1 1 10 tAV, TIME IN AVALANCHE(ms) 100 300 0 25 50 75 100 o 125 150 TC, CASE TEMPERATURE ( C) Figure 9. Unclamped Inductive Switching Capability 60 100us Figure 10. Maximum Continuous Drain Current vs Case Temperature 2000 1000 VGS = 10V P(PK), PEAK TRANSIENT POWER (W) FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: 150 – T A ---------------------125 TA = 25oC ID, DRAIN CURRENT (A) 10 1ms 10ms 100ms 1 100 I = I25 0.1 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(on) SINGLE PULSE TJ = MAX RATED TA = 25OC 1s 10s DC 10 0.01 1 0.3 -3 10 SINGLE PULSE 1E-3 0.1 1 10 100 400 10 -2 10 -1 10 0 10 1 10 2 10 3 VDS, DRAIN to SOURCE VOLTAGE (V) t, PULSE WIDTH (s) Figure 11. Forward Bias Safe Operating Area Figure 12. Single Pulse Maximum Power Dissipation FDMS3672 Rev.C 4 www.fairchildsemi.com FDMS3672 N-Channel UltraFET Trench MOSFET Typical Characteristics TJ = 25°C unless otherwise noted 2 1 NORMALIZED THERMAL IMPEDANCE, ZθJA DUTY CYCLE-DESCENDING ORDER 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM 0.01 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA -1 0 1 2 3 SINGLE PULSE 1E-3 5E-4 -3 10 10 -2 10 10 10 10 10 t, RECTANGULAR PULSE DURATION (s) Figure 13. Transient Thermal Response Curve FDMS3672 Rev.C 5 www.fairchildsemi.com FDMS3672 N-Channel UltraFET Trench MOSFET FDMS3672 Rev.C 6 www.fairchildsemi.com FDMS3672 N-Channel UItraFET Trench MOSFET TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. FACT Quiet Series™ GlobalOptoisolator™ GTO™ HiSeC™ I2C™ i-Lo™ ImpliedDisconnect™ IntelliMAX™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ Across the board. Around the world.™ The Power Franchise® Programmable Active Droop™ ACEx™ ActiveArray™ Bottomless™ Build it Now™ CoolFET™ CROSSVOLT™ DOME™ EcoSPARK™ E2CMOS™ EnSigna™ FACT® FAST® FASTr™ FPS™ FRFET™ OCX™ OCXPro™ OPTOLOGIC® OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerEdge™ PowerSaver™ PowerTrench® QFET® QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ ScalarPump™ SILENT SWITCHER® SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TCM™ TinyBoost™ TinyBuck™ TinyPWM™ TinyPower™ TinyLogic® TINYOPTO™ TruTranslation™ UHC® UniFET™ VCX™ Wire™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without no




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