P-Channel 1.8V Logic Level PowerTrench MOSFET

FDMB668P P-Channel 1.8V Logic Level PowerTrench® MOSFET February 2007 FDMB668P P-Channel 1.8V Logic Level PowerTrench MOSFET -20V, -6.1A, 35mΩ Features Max rDS(on) = 35mΩ at VGS = -4.5V, ID = -6.1A Max rDS(on) = 50mΩ at VGS = -2.5V, ID = -5.1A Max rDS(on) = 70mΩ at VGS = -1.8V, ID = -4.3A Excellent for portable application at VGS = -1.8V Thin profile - Maximum height = 0.8mm RoHS compliant ® tm General Description FDMB668P is excellent for load switch and DC-DC conversion among portable electronics. It achieves an optimal balance among efficiency, thermal transfer and small form by integrating a P-channel MOSFET with minimized on-state resistance into a MicroFET 3x1.9 package. When optimizing the dimension of portable applications, this little device offers a very efficient solution. Applications Load Switch in: -HDD -Portable Gaming, MP3 -Notebook DC/DC Conversion PIN 1 GATE D www.DataSheet4U.com 1 2 3 4 8 7 6 5 D D D S D D SOURCE MicroFET 3X1.9 G MOSFET Maximum Ratings TA = 25°C unless otherwise noted Symbol VDS VGS ID PD TJ, TSTG Parameter Drain to Source Voltage Gate to Source Voltage Drain Current Power Dissipation Power Dissipation Operating and Storage Junction Temperature Range -Continuous -Pulsed (Note 1a) (Note 1b) (Note 1a) Ratings -20 ±8 -6.1 -40 1.9 0.8 -55 to +150 Units V V A W °C Thermal Characteristics RθJA RθJA Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Ambient (Note 1a) (Note 1b) 65 165 °C/W Package Marking and Ordering Information Device Marking 668 Device FDMB668P Package MicroFET 3X1.9 Reel Size 7” Tape Width 8mm Quantity 3000 units ©2007 Fairchild Semiconductor Corporation FDMB668P Rev.B 1 www.fairchildsemi.com FDMB668P P-Channel 1.8V Logic Level PowerTrench® MOSFET Electrical Characteristics TJ = 25°C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS ∆BVDSS ∆TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = -250µA, VGS = 0V ID = -250µA, referenced to 25°C VDS = -16V, VGS = 0V VGS = ±8V, VDS = 0V -20 -11.4 -1 ±100 V mV/°C µA nA On Characteristics (Note 2) VGS(th) ∆VGS(th) ∆TJ rDS(on) gFS Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient VGS = VDS, ID = -250µA ID = -250µA, referenced to 25°C VGS = -4.5V, ID = -6.1A Static Drain to Source On Resistance VGS = -2.5V, ID = -5.1A VGS = -1.8V, ID = -4.3A VGS = -4.5V, ID = -6.1A,TJ = 125°C Forward Transconductance VDS = -4.5V, ID = -6.1A -0.4 -0.6 2.8 22 27 35 31 27 35 50 70 50 S mΩ -1.0 V mV/°C Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = -10V, VGS = 0V, f = 1MHz 1565 210 175 2085 280 265 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qg Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Total Gate Charge Gate to Source Gate Charge Gate to Drain “Miller” Charge VGS = 0V to -10V VGS = 0V to -5V VDD = -10V ID = -6.1A VDD = -10V, ID = -6.1A VGS = -4.5V, RGEN = 6Ω 7 9 176 84 42 22 3 5 14 18 282 135 59 31 ns ns ns ns nC nC nC nC Drain-Source Diode Characteristics VSD trr Qrr Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = -1.6A (Note 2) -0.7 29 15 -1.2 44 23 V ns nC IF = -6.1A, di/dt = 100A/µs Notes: 1: RθJA is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθJA is determined by the user’s board design. a) 65°C/W when mounted on a 1in2 pad of 2 oz copper b) 165°C/W when mounted on a minimum pad . 2: Pulse Test: Pulse Width < 300 us, Duty Cycle < 2%. FDMB668P Rev.B 2 www.fairchildsemi.com FDMB668P P-Channel 1.8V Logic Level PowerTrench® MOSFET Typical Characteristics TJ = 25°C unless otherwise noted 40 32 24 16 8 0 VGS = -4.5V VGS = -3.0V VGS = -2.5V VGS = -1.8V NORMALIZED DRAIN TO SOURCE ON-RESISTANCE -ID, DRAIN CURRENT (A) PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX 3.0 2.5 VGS = -1.5V VGS = -1.8V VGS = -3.0V VGS = -2.5V 2.0 1.5 1.0 0.5 VGS = -1.5V VGS = -4.5V PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX 0 1 2 3 4 5 0 8 16 24 32 40 -VDS, DRAIN TO SOURCE VOLTAGE (V) -ID, DRAIN CURRENT(A) Figure 1. On-Region Characteristics Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 50 rDS(on), DRAIN TO SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 1.6 1.4 1.2 1.0 0.8 0.6 -75 ID = -6.1A VGS = -4.5V 45 40 35 30 25 20 ID =-6.1A PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX TJ = 125oC TJ = 25oC -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) 1 2 3 4 -VGS, GATE TO SOURCE VOLTAGE (V) 5 Figure 3. Normalized On- Resistance vs Junction Temperature -IS, REVERSE DRAIN CURRENT (A) Figure 4. On-Resistance vs Gate to Source Voltage 100 VGS = 0V 40 PULSE DURATION = 80µs DUTY CYCLE = 0.5%MAX -ID, DRAIN CURRENT (A) 30 VDD = -5V 10 1 0.1 0.01 1E-3 0.0 TJ = 25oC TJ = 150oC 20 TJ = 150oC TJ = 25oC TJ = -55oC 10 TJ = -55oC 0 0.0 0.5 1.0 1.5 2.0 2.5 -VGS, GATE TO SOURCE VOLTAGE (V) 3.0 0.2 0.4 0.6 0.8 1.0 -VSD, BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current FDMB668P Rev.B 3 www.fairchildsemi.com FDMB668P P-Channel 1.8V Logic Level PowerTrench® MOSFET Typical Characteristics TJ = 25°C unless otherwise noted -VGS, GATE TO SOURCE VOLTAGE(V) 10 ID = -6.1A 5000 Ciss VDD = -10V 8 6 VDD = -5V VDD = -15V CAPACITANCE (pF) 1000 Coss 4 2 0 Crss f = 1MHz VGS = 0V 0 5 10 15 20 25 30 Qg, GATE CHARGE(nC) 35 40 45 100 0.1 1 10 -VDS, DRAIN TO SOURCE VOLTAGE (V) 20 Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 90 FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: 10 -ID, DRAIN CURRENT (A) rDS(on) LIMITED 1ms P(PK), PEAK TRANSIENT POWER (W) 20 1 SINGLE PULSE TJ = MAX RATED R = 165oC/W θJA 10ms 100ms 1s 10s DC 60 I = I25 150 – T A ---------------------125 TA = 25oC 0.1 30 SINGLE PULSE RθJA = 165 C/W o TA = 25oC 0.01 0.01 0.1 1 10 100 0 -3 10 10 -2 -VDS, DRAIN to SOURCE VOLTAGE (V) 10 10 10 t, PULSE WIDTH (s) -1 0 1 10 2 10 3 Figure 9. Forward Bias Safe Operating Area 2 DUTY CYCLE-DESCENDING ORDER Figure 10. Single Pulse Maximum Power Dissipation 1 NORMALIZED THERMAL IMPEDANCE, ZθJA D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM 0.1 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 EAK TJ = PDM x ZθJA x RθJA + TA SINGLE PULSE 0.01 -3 10 10 -2 10 -1 10 0 10 1 10 2 10 3 t, RECTANGULAR PULSE DURATION (s) Figure 11. Transient Thermal Response Curve FDMB668P Rev.B 4 www.fairchildsemi.com FDMB668P P-Channel 1.8V Logic Level PowerTrench® MOSFET FDMB668P Rev.B 5 www.fairchildsemi.com FDMB668P P-Channel 1.8V Logic Level PowerTrench® MOSFET TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. FACT Quiet Series™ GlobalOptoisolator™ GTO™ HiSeC™ I2C™ i-Lo™ ImpliedDisconnect™ IntelliMAX™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ Across the board. Around the world.™ The Power Franchise® Programmable Active Droop™ ACEx™ ActiveArray™ Bottomless™ Build it Now™ CoolFET™ CROSSVOLT™ DOME™ EcoSPARK™ E2CMOS™ EnSigna™ FACT® FAST® FASTr™ FPS™ FRFET™ OCX™ OCXPro™ OPTOLOGIC® OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerEdge™ PowerSaver™ PowerTrench® QFET® QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ ScalarPump™ SILENT SWITCHER® SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TCM™ TinyBoost™ TinyBuck™ TinyPWM™ TinyPower™ TinyLogic® TINYOPTO™ TruTranslation™ UHC® UniFET™ VCX™ Wire™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any