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Part Number |
FDMB3800N |
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Manufacturer |
Fairchild Semiconductor |
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Semiconductor DataSheet |
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DataSheet View |
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FDMB3800N Dual N-Channel PowerTrench® MOSFET
January 2006
FDMB3800N
Dual N-Channel PowerTrench® MOSFET 4.8A, 30V, 40mΩ
General Description
These N-Channel Logic Level MOSFETs are produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required.
LE
A
REE I DF
Features
RDS(ON) = 40 mΩ @ VGS = 10 V RDS(ON) = 51 mΩ @ VGS = 4.5 V Fast switching speed Low gate charge High performance trench technology for extremely low RDS(ON) High power and current handling capability. RoHS Compliant
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol VDSS VGSS ID PD TJ, TSTG Parameter Drain-Source Voltage Gate-Source Voltage Drain Current -Continuous -Pulsed Power dissipation for Single Operation Power dissipation for Single Operation Operating and Storage Junction Temperature Range (Note 1a) (Note 1a) (Note 1b) Ratings 30 ±20 4.8 9 1.6 0.75 -55 to +150 Units V V A W °C
Thermal Characteristics
RθJA RθJA Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Ambient (Note 1a) (Note 1b) 80 165 °C/W
Package Marking and Ordering Information
Device Marking 3800 Device FDMB3800N Reel Size 7inch
1
©2006 Fairchild Semiconductor Corporation FDMB3800N Rev. C
M ENTATIO LE N MP
GATE
SOURCE
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Q1
5 6 7 8 4 3 2 1
Q2
Tape Width 8mm
Quantity 3000 units
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FDMB3800N Dual N-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS ∆BVDSS ∆TJ IDSS IGSS Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage, VGS = 0V, ID = 250µA ID = 250µA, Referenced to 25°C VDS = 24V, VGS = 0V VDS = 24V, VGS = 0V, TJ = 55°C VGS = ±20V, VDS = 0V 30 24 1 10 ±100 µA nA V mV/°C
On Characteristics (Note 2)
VGS(th) ∆VGS(th) ∆TJ RDS(ON) ID(on) gFS Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance On-State Drain Current Forward Transconductance VDS = VGS, ID = 250µA ID = 250µA, Referenced to 25°C VGS = 10V, ID = 4.8A VGS = 4.5V, ID = 4.3A VGS = 10V, ID = 4.8A TJ = 125°C VGS = 10V, VDS = 5V VDS = 5V, ID = 4.8A 1 10 1.9 -4 32 41 43 14 3 40 51 61 A S mΩ V mV/°C
Dynamic Characteristics
Ciss Coss Crss RG Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance VDS = 15V, VGS = 0V, f = 1.0MHz f=1.0MHz 350 90 40 3 465 120 60 pF pF pF Ω
Switching Characteristics (Note 2)
td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = 15V, ID = 7.5A, VGS = 5V VDD = 15V, ID = 1A VGS = 10V, RGEN = 6Ω 8 5 21 2 4 1.0 1.5 16 10 34 10 5.6 ns ns ns ns nC nC nC
Drain-Source Diode Characteristics and Maximum Ratings
IS VSD trr Qrr Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Diode Reverse Recovery Time Diode Reverse Recovery Charge VGS = 0V, IS =1.25 A (Note 2) IF= 4.8A, dIF/dt=100A/µs 0.8 1.25 1.2 22 9 A V ns nC
Notes: 1: RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user’s board design. 2: Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
a) 80°C/W when mounted on a 1in2 pad of 2 oz copper
b) 165°C/W when mounted on a minimum pad of 2 oz copper Scale 1: 1 on letter size paper
2 FDMB3800N Rev. C
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FDMB3800N Dual N-Channel PowerTrench® MOSFET
Typical Characteristics
10
I D , D RAIN CURRENT (A)
8
6.0V
3.5V
N O R M A L IZ E D D R A IN -S O U R C E O N -R E S IS T A N C E
VGS = 10V
2.8
4.5V
2.6 2.4 2.2 2 1.8 1.6 1.4 1.2 1 0.8 0 2 4 6 8
VGS = 3.0V
6 3.0V
4
3.5V 4.0V 4.5V 6.0V
2 2.5V 0 0 0.25 0.5 0.75 1 1.25 VDS, DRAIN-SOURCE VOLTAGE (V)
10V
10
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
1.6
DRAIN TO SOURCE ON-RESISTANCE (OHM)
Figure 2. On Resistance vs Drain Current and Gate Voltage
0.102 ID = 2.4A 0.092 0.082 0.072 0.062 0.052 0.042 0.032 0.022 TJ = 25oC
o
N O R M A L IZ E D D R A IN -S O U R C E O N -R E S IS T A N C E
ID = 4.8A VGS = 10V
1.4
1.2
1
TJ = 125 C
0.8
0.6 -50
-25
0
25
50
75
100
125
150
2
3
4
5
6
7
8
9
10
TJ, JUNCTION TEMPERATURE (oC)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance vs Temperature
15
o
Figure 4. On Resistance vs Gate to Source Voltage
10 I S , R E V E R S E D R A IN C U R R E N T (A )
VDS = 5V I D , D R A IN C U R R E N T (A ) 12
TJ = -55 C
o
25 C 125 C
o
VGS = 0V
1
9
0.1
TJ = 125oC
6
0.01
25oC
-55oC
3
0.001
0 1.5
0.0001
2
2.5
3
3.5
4
0
0.2
0.4
0.6
0.8
1
1.2
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward Voltage vs Source Current
3 FDMB3800N Rev. C
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FDMB3800N Dual N-Channel PowerTrench® MOSFET
Typical Characteristics
10 V G S , G A T E -S O U R C E V O L TA G E (V ) ID = 4.8A 8 VDS = 10V 20V 15V
500 C A P A C IT A N C E (p F ) 400 300 200 100 600
f = 1MHz VGS = 0 V
Ciss
6
4
Coss
2
Crss
0 0 1 2 3 4 5 6 7 8 Qg, GATE CHARGE (nC)
0 0 4 8 12 16 20 VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics
100
Figure 8. Capacitance vs Drain to Source Voltage
6 5 ID, DRAIN CURRENT (A)
I D , DRAIN CURRENT (A)
10
RDS(ON) LIMIT 100us 1ms 10ms
4 3 2 1 0
VGS = 10V
1 VGS = 10V SINGLE PULSE o RθJA = 165 C/W TA = 25oC 0.01 0.1 1 10
VGS = 4.5V
100ms 1s 10s DC 100
RθJA = 80°C/W
0.1
25
50
75 100 125 o TA, AMBIENT TEMPERATURE ( C)
150
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Forward Bias Safe Operating Area
Figure 10. Maximum Continuous Drain Current vs Ambient Temperature
P(pk), PEAK TRANSIENT POWER (W)
50 SINGLE PULSE RθJA = 165°C/W TA= 25°C
40
30
20
10
0 0.0001
0.001
0.01
0.1
1
10
100
1000
t, PULSE WIDTH (sec)
Figure 11. Single Pulse Maximum Power Dissipation
4 FDMB3800N Rev. C
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FDMB3800N Dual N-Channel PowerTrench® MOSFET
Typical Characteristics
NORMALIZED THERMAL IMPEDANCE, ZθJA
1
D = 0.5 0.2 0.1 0.05 0.02 0.01
0.1
P(pk) t1 t2 Peak TJ = TA + PDM *RθJA* ZθJA Duty Cycle, D = t1 / t2
SINGLE PULSE
0.01 0.0001
0.001
0.01
0.1
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design.
Figure 12. Transient Thermal Response Curve
5 FDMB3800N Rev. C
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FDMB3800N Dual N-Channel PowerTrench® MOSFET
Dimensional Outline and Pad Layout
6 FDMB3800N Rev. C
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TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ FAST® ActiveArray™ FASTr™ Bottomless™ FPS™ Build it Now™ FRFET™ CoolFET™ GlobalOptoisolator™ CROSSVOLT™ GTO™ DOME™ HiSeC™ EcoSPARK™ I2C™ E2CMOS™ i-Lo™ EnSigna™ ImpliedDisconnect™ FACT™ IntelliMAX™ FACT Quiet Series™ Across the board. Around the world.™ The Power Franchise® Programmable Active Droop™
DISCLAIMER
ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC® OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerEdge™
PowerSaver™ PowerTrench® QFET® QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ μSerDes™ ScalarPump™ SILENT SWITCHER® SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3
SuperSOT™-6 SuperSOT™-8 SyncFET™ TCM™ TinyLogic® TINYOPTO™ TruTranslation™ UHC™ UltraFET® UniFET™ VCX™ Wire™
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order |