Single P-Channel PowerTrench MOSFET

Part  Number FDMA520PZ
Manufacturer Fairchild Semiconductor
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FDMA520PZ Single P-Channel PowerTrench® MOSFET January 2007 FDMA520PZ Single P-Channel PowerTrench® MOSFET –20V, –7.3A, 30mΩ Features Max rDS(on) = 30mΩ at VGS = –4.5V, ID = –7.3A Max rDS(on) = 53mΩ at VGS = –2.5V, ID = –5.5A Low profile - 0.8mm maximum - in the new package MicroFET 2X2 mm RoHS Compliant tm General Description This device is designed specifically for battery charge or load switching in cellular handset and other ultraportable applications. It features a MOSFET with low on-state resistance. The MicroFET 2X2 package offers exceptional thermal performance for its physical size and is well suited to linear mode applications. Pin 1 D D G Bottom Drain Contact Drain Source www.DataSheet4U.com D D G 1 6 D D S 2 5 3 4 D D S MicroFET 2X2 (Bottom View) MOSFET Maximum Ratings TA = 25°C unless otherwise noted Symbol VDS VGS ID PD TJ, TSTG Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous -Pulsed Power Dissipation Power Dissipation Operating and Storage Junction Temperature Range (Note 1a) (Note 1b) (Note 1a) Ratings –20 ±12 –7.3 –24 2.4 0.9 –55 to +150 Units V V A W °C Thermal Characteristics RθJA RθJA Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Ambient (Note 1a) (Note 1b) 52 145 °C/W Package Marking and Ordering Information Device Marking 520 Device FDMA520PZ Package MicroFET 2X2 Reel Size 7’’ Tape Width 8mm Quantity 3000 units ©2006 Fairchild Semiconductor Corporation FDMA520PZ Rev.B 1 www.fairchildsemi.com FDMA520PZ Single P-Channel PowerTrench® MOSFET Electrical Characteristics TJ = 25°C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS ΔBVDSS ΔTJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = –250μA, VGS = 0V ID = –250μA, referenced to 25°C VDS = –16V, VGS = 0V VGS = ±12V, VDS = 0V –20 –8.4 –1 ±10 V mV/°C μA μA On Characteristics VGS(th) ΔVGS(th) ΔTJ rDS(on) gFS Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient Static Drain to Source On Resistance Forward Transconductance VGS = VDS, ID = –250μA ID = –250μA, referenced to 25°C VGS = –4.5V, ID = –7.3A VGS = –2.5V, ID = –5.5A VGS = –4.5V, ID = –7.3A ,TJ = 125°C VDS = –5V, ID = –7.3A –0.6 –1.1 3.5 26 42 36 22 30 53 55 S mΩ –1.5 V mV/°C Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = –10V, VGS = 0V, f = 1MHz 1235 255 225 1645 340 340 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate to Source Gate Charge Gate to Drain “Miller” Charge VDD = –5V, ID = –7.3A VGS = –4.5V VDD = –10V, ID = –7.3A VGS = –4.5V, RGEN = 6Ω 10 29 83 74 14 2.9 4.4 20 47 133 119 20 ns ns ns ns nC nC nC Drain-Source Diode Characteristics IS VSD trr Qrr Maximum Continuous Drain-Source Diode Forward Current Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = –2A IF =–7.3A, di/dt = 100A/μs –0.8 30 22 –2 –1.2 45 33 A V ns nC Notes: 1: RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. b.145°C/W when mounted on a minimum pad of 2 oz copper a. 52°C/W when mounted on a 1 in2 pad of 2 oz copper 2: Pulse Test: Pulse Width < 300μs, Duty cycle < 2.0%. 3: The diode connected between the gate and the source serves only as protection against ESD. No gate overvoltage rating is implied. FDMA520PZ Rev.B 2 www.fairchildsemi.com FDMA520PZ Single P-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25°C unless otherwise noted NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 24 -ID, DRAIN CURRENT (A) VGS = -4.5V PULSE DURATION = 80μs DUTY CYCLE = 0.5%MAX VGS = -4V 3.0 PULSE DURATION = 80μs DUTY CYCLE = 0.5%MAX 18 VGS = -3.5V VGS = -3V VGS = -2.5V 2.5 VGS = -2.5V 2.0 VGS = -3V 12 1.5 1.0 VGS = -4V VGS = -3.5V 6 VGS = -4.5V 0 0 1 2 3 4 -VDS, DRAIN TO SOURCE VOLTAGE (V) 0.5 0 6 12 18 -ID, DRAIN CURRENT(A) 24 Figure 1. On-Region Characteristics Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 60 rDS(on), DRAIN TO SOURCE ON-RESISTANCE (mΩ) 1.6 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 1.4 1.2 1.0 0.8 0.6 -50 ID = -7.3A VGS = -4.5V PULSE DURATION = 80μs DUTY CYCLE = 0.5%MAX 50 40 TJ = 125oC 30 20 ID = -3.6A TJ = 25oC 10 2 3 4 5 6 7 -VGS, GATE TO SOURCE VOLTAGE (V) 8 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) Figure 3. Normalized On- Resistance vs Junction Temperature -IS, REVERSE DRAIN CURRENT (A) Figure 4. On-Resistance vs Gate to Source Voltage 30 24 PULSE DURATION = 80μs DUTY CYCLE = 0.5%MAX 10 1 0.1 0.01 0.001 VGS = 0V -ID, DRAIN CURRENT (A) 18 VDD = -5V TJ = 125oC 12 TJ = 125oC TJ = 25oC TJ = 25oC 6 TJ = -55oC TJ =-55oC 0 0 1 2 3 4 -VGS, GATE TO SOURCE VOLTAGE (V) 0.0001 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 -VSD, BODY DIODE FORWARD VOLTAGE (V) 1.6 Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current FDMA520PZ Rev.B 3 www.fairchildsemi.com FDMA520PZ Single P-Channel PowerTrench® MOSFET Typical Characteristics TJ = 25°C unless otherwise noted -VGS, GATE TO SOURCE VOLTAGE(V) 10 ID = -7.3A 3000 VDD = -5V Ciss 8 6 4 2 0 0 7 CAPACITANCE (pF) VDD = -10V 1000 Coss VDD = -15V 100 f = 1MHz VGS = 0V Crss 14 21 -Qg, GATE CHARGE(nC) 28 35 30 0.1 1 10 -VDS, DRAIN TO SOURCE VOLTAGE (V) 20 Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 60 1E-4 -Ig, GATE LEAKAGE CURRENT(A) VGS = 0V rDS(on) LIMIT 1E-5 TJ = 125oC ID, DRAIN CURRENT (A) 10 100us 1ms 10ms 100ms 1s 10s DC 1E-6 1E-7 TJ = 25oC 1 VGS=4.5V 0.1 SINGLE PULSE R θJA =145 o 1E-8 1E-9 0 6 9 12 -VGS, GATE TO SOURCE VOLTAGE(V) 3 15 C/W TA = 25oC 0.01 0.1 1 10 60 VDS, DRAIN to SOURCE VOLTAGE (V) Figure 9. Gate Leakage Current vs Gate to Source Voltage P(PK), PEAK TRANSIENT POWER (W) Figure 10. Forward Bias Safe Operating Area 2 NORMALIZED THERMAL IMPEDANCE, ZθJA 150 120 90 60 30 0 -4 10 SINGLE PULSE o RθJA = 145 C/W TA=25 C o 1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 0.1 PDM t1 SINGLE PULSE t2 0.01 10 -3 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA 10 10 10 10 t, PULSE WIDTH (s) -2 -1 0 1 10 2 10 3 0.005 -4 10 10 -3 10 -2 10 -1 10 0 10 1 10 2 10 3 t, RECTANGULAR PULSE DURATION (s) Figure 11. Single Pulse Maximum Power Dissipation Figure 12. Transient Thermal Response Curve FDMA520PZ Rev.B 4 www.fairchildsemi.com FDMA520PZ Single P-Channel PowerTrench® MOSFET NOTES: A. NOT FULLY CONFORM TO JEDEC REGISTRATION MO-229 DATED AUG/2003. B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASMEY14.5M,1994 MLP06LrevA FDMA520PZ Rev.B 5 www.fairchildsemi.com FDMA520PZ Single P-Channel PowerTrench® MOSFET TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ ActiveArray™ Bottomless™ Build it Now™ CoolFET™ CROSSVOLT™ DOME™ EcoSPARK™ E2CMOS™ EnSigna™ FACT® FAST® FASTr™ FPS™ FRFET™ FACT Quiet Series™ GlobalOptoisolator™ GTO™ HiSeC™ I2C™ i-Lo™ ImpliedDisconnect™ IntelliMAX™ ISOPLANAR™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ Across the board. Around the world.™ The Power Franchise® Programmable Active Droop™ OCX™ OCXPro™ OPTOLOGIC® OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerEdge™ PowerSaver™ PowerTrench® QFET® QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes™ ScalarPump™ SILENT SWITCHER® SMART START™ SPM™ Stealth™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TCM™ TinyBoost™ TinyBuck™ TinyPWM™ TinyPower™ TinyLogic® TINYOPTO™ TruTranslation™ UHC® UniFET™ VCX™ Wire™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplemen




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