Dual-Channel High-Side Gate-Drive IC

www.DataSheet4U.com FAN7385 Dual-Channel High-Side Gate-Drive IC February 2007 FAN7385 Dual-Channel High-Side Gate-Drive IC Features Floating Channel for Bootstrap Operation to +600V Typically 350mA/650mA Sourcing/Sinking Current Driving Capability Extended Allowable Negative VS Swing to -9.8V for Signal Propagation at VDD=VBS=15V High-Side Output In-Phase of Input Signal VDD & VBS Supply Range from 10V to 20V 3.3V and 5V Input Logic Compatible Built-in Common Mode dv/dt Noise Canceling Circuit Built-in UVLO Functions for Both Channels Description The FAN7385 is a monolithic high side gate drive IC designed for high voltage, high speed driving MOSFETs and IGBTs operating up to +600V. Fairchild’s high-voltage process and common-mode noise canceling technique provide stable operation of high-side drivers under high-dv/dt noise circumstances. An advanced level-shift circuit allows high-side gate driver operation up to VS = -9.8V (typical) for VBS = 15V. The UVLO circuits prevent malfunction when VBS1 and VBS2 are lower than the specified threshold voltage. Output drivers typically source/sink 350mA/650mA, respectively, which is suitable for dual high-side switches and half-bridge inverters. 14-SOP Applications Normal Half-Bridge and Full-Bridge Driver PDP Energy Recovery Switch Control Driver Switching Mode Power Supply 1 Ordering Information Part Number FAN7385M (1) (1) Package 14-SOP Pb-Free Yes Operating Temperature Range -40°C ~ 125°C Packing Method Tube Tape & Reel FAN7385MX Note: 1. These devices passed wave soldering test by JESD22A-111. © 2006 Fairchild Semiconductor Corporation FAN7385 Rev. 1.0.2 www.fairchildsemi.com FAN7385 Dual-Channel High-Side Gate-Drive IC Typical Application Diagrams VS RBOOT DBOOT1 Q3 FAN7385 15V 1 VDD NC VB1 14 2 HO1 13 D3 L1 D1 To Pannel Q4 CBOOT1 D2 D4 IN1 3 IN1 NC VS1 NC 12 4 11 DBOOT2 Q1 Q2 Buffer IC IN2 C1 5 IN2 VB2 10 6 NC GND HO2 VS2 9 8 7 CBOOT2 HVIC C2 FAN7380 FAN7382 Energy Recovery Sustain Driver FAN7385 Rev.01 Figure 1. Floated Bidirectional Switch Control for PDP application RBOOT1 DBOOT1 VDC Full-Bridge Converter 15V 1 VDD NC VB1 14 HO1 2 13 CBOOT1 3 IN1 NC VS1 NC 12 4 11 5 IN2 VB2 10 C1 6 NC GND HO2 VS2 9 8 Load CBOOT2 7 Controller RBOOT2 DBOOT2 L-CH Output R-CH Output FAN7385 Rev.01 Figure 2. Full-Bridge Power Supply Application RBOOT DBOOT VDC Q1 15V 1 VDD NC VB1 14 2 HO1 13 Resonant Converter CBOOT INPUT1 3 IN1 NC VS1 NC 12 L C Vout 4 11 INPUT2 C1 5 IN2 VB2 10 Q2 6 NC GND HO2 VS2 9 Co C2 7 8 FAN7385 Rev.01 Figure 3. Half-Bridge LCC Resonant Converter Application © 2006 Fairchild Semiconductor Corporation FAN7385 Rev. 1.0.2 2 www.fairchildsemi.com FAN7385 Dual-Channel High-Side Gate-Drive IC Internal Block Diagram 14 VB1 VDD 1 PULSE GENERATOR UVLO DRIVER NOISE CANCELLER R S R Q 13 HO1 12 VS1 IN1 3 500K SCHMITT TRIGGER INPUT 10 UVLO DRIVER VB2 IN2 5 500K PULSE GENERATOR NOISE CANCELLER R S R Q 9 HO2 8 VS2 GND 7 Pin 2, 4, 6 and 11 are not connection FAN7385 Rev.01 Figure 4. Functional Block Diagram © 2006 Fairchild Semiconductor Corporation FAN7385 Rev. 1.0.2 3 www.fairchildsemi.com FAN7385 Dual-Channel High-Side Gate-Drive IC Pin Configuration VDD NC IN1 NC IN2 NC 1 2 3 4 5 6 7 14 13 12 VB1 HO1 VS1 NC VB2 HO2 VS2 FAN7385 11 10 9 8 GND FAN7385 Rev.00 Figure 5. Pin Configuration (Top View) Pin Definitions Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Name VDD NC IN1 NC IN2 NC GND VS2 HO2 VB2 NC VS1 HO1 VB1 Power supply Not connection Channel 1 control input Not connection Channel 2 control input Not connection Ground Channel 2 floating supply return Channel 2 output Channel 2 floating supply Not connection Channel 1 floating supply return Channel 1 output Channel 1 floating supply Description © 2006 Fairchild Semiconductor Corporation FAN7385 Rev. 1.0.2 4 www.fairchildsemi.com FAN7385 Dual-Channel High-Side Gate-Drive IC Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25°C, unless otherwise specified. Symbol VS VB VHO VDD VIN GND dVS/dt PD(2)(3)(4) θJA TJ TS Parameter High-side offset voltage VS1 ,VS2 High-side floating supply voltage VB1 ,VB2 High-side floating output voltage HO1, HO2 Low-side and logic-fixed supply voltage Logic input voltage (IN1, IN2) Logic ground Allowable offset voltage slew rate Power dissipation Thermal resistance, junction-to-ambient Junction temperature Storage temperature Min. VB-25 -0.3 VS-0.3 -0.3 -0.3 VDD-25 Max. VB+0.3 625 VB+0.3 25 VDD+0.3 VDD+0.3 50 1.0 110 150 150 Unit V V V V V V V/ns W °C/W °C °C Notes: 2. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material). 3. Refer to the following standards: JESD51-2: Integral circuits thermal test method environmental conditions - natural convection JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages 4. Do not exceed PD under any circumstances. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol VB VS VDD VHO VIN TA Parameter High-side floating supply voltage High-side floating supply offset voltage Supply voltage High-side (HO1, HO2) output voltage Logic input voltage (IN1, IN2) Ambient temperature Condition Min. VS+10 6-VDD 10 VS GND -40 Max. VS+20 600 20 VB VDD 125 Unit V V V V V °C © 2006 Fairchild Semiconductor Corporation FAN7385 Rev. 1.0.2 5 www.fairchildsemi.com FAN7385 Dual-Channel High-Side Gate-Drive IC Electrical Characteristics VBIAS (VDD, VBS1, VBS2) = 15.0V, TA = 25°C, unless otherwise specified. The VIN and IIN parameters are referenced to GND. The VO and IO parameters are referenced to VS1 and VS2 and are applicable to the respective outputs HO1 and HO2. Symbol IQDD IPDD Characteristics Quiescent VDD supply current Operating VDD supply current VBS1 and VBS2 supply under-voltage positive going threshold VBS1 and VBS2 supply under-voltage negative going threshold VBS1 and VBS2 supply under-voltage lockout hysteresis Offset supply leakage current Quiescent VBS1 and VBS2 supply current Operating VBS1 and VBS2 supply current High-level output voltage, VBIAS-VO Low-level output voltage, VO Output HIGH short-circuit pulse current Output LOW short-circuit pulsed current Allowable negative VS pin voltage for IN signal propagation to HO Logic "1" input voltage Logic "0" input voltage Logic "1" input bias current Logic "0" input bias current Input pull-down resistance VIN=5V VIN=0V Condition VIN1=VIN2=0V or 5V fIN1=fIN2=10kHz, rms value Min. Typ. Max. Unit 28 35 50 70 μA μA SUPPLY CURRENT SECTION BOOTSTRAPPED POWER SUPPLY SECTION VBSUV+ VBSUVVBSHYS ILK IQBS1,2 IPBS1,2 VOH VOL IO+ IOVS VBS1=VBS2=Sweep VBS1=VBS2=Sweep VBS1=VBS2=Sweep VB=VS=600V VIN1=0V or 5V fIN1=10kHz, rms value IO=0mA (No Load) IO=0mA (No Load) VO=0V, VIN=5V with PW<10µs VO=15V, VIN=0V with PW<10µs 250 500 350 650 -9.8 -7.0 50 220 8.2 7.6 9.1 8.5 0.6 10 85 300 30 30 10.2 9.6 V V V μA μA μA mV mV mA mA V GATE DRIVER OUTPUT SECTION LOGIC INPUT SECTION (IN1 AND IN2) VIH VIL IIN+ IINRIN 2.5 1.3 10 400 500 20 2.0 600 V V μA μA KΩ Dynamic Electrical Characteristics TA=25°C, VBIAS (VDD, VBS1, VBS2) = 15.0V, VS1 = VS2 = GND, CLoad = 1000pF unless otherwise specified. Symbol ton toff tr tf MT Parameter Turn-on propagation delay Turn-off propagation delay Turn-on rise time Turn-off fall time Delay matching, Channel 1 & 2 turnon/off Conditions VS=0V VS=0V or 600V(5) Min. Typ. 110 110 50 30 0 Max. 180 180 90 70 Unit ns ns ns ns ns Notes: 5. This parameter guaranteed by design. © 2006 Fairchild Semiconductor Corporation FAN7385 Rev. 1.0.2 6 www.fairchildsemi.com FAN7385 Dual-Channel High-Side Gate-Drive IC Typical Characteristics 10.00 9.75 9.50 9.25 9.00 8.75 8.50 8.25 8.00 -40 -20 0 20 40 60 80 100 120 9.0 8.8 VBSUVN [V] VBSUVP [V] 8.6 8.4 8.2 8.0 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 6. VBS UVLO (+) vs. Temperature Figure 7. VBS UVLO (-) vs. Temperature 1.0 0.8 70 60 50 VIN1= VIN2=GND VBSHYS [V] 0.6 0.4 0.2 0.0 -40 IQDD [μA] -20 0 20 40 60 80 100 120 40 30 20 10 0 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 8. VBS UVLO Hysteresis vs. Temperature Figure 9. VDD Quiescent Current vs. Temperature 70 60 50 VIN1= VIN2=GND 80 70 60 IQBS [μA] 40 30 20 10 0 -40 -20 0 20 40 60 80 100 120 IPDD [μA] 50 40 30 20 10 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 10. VBS Quiescent Current vs. Temperature Figure 11. VDD Operating Current vs. Temperature © 2006 Fairchild Semiconductor Corporation FAN7385 Rev. 1.0.2 7 www.fairchildsemi.com FAN7385 Dual-Channel High-Side Gate-Drive IC Typical Characteristics (Continued) 300 275 250 225 200 175 150 125 100 -40 -20 0 20 40 60 80 100 120 20 18 16 14 12 10 8 6 4 2 0 -40 IN+ [μA] IPBS [μA] -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 12. VBS Operating Current vs. Temperature Figure 13. Logic High Input Current vs. Temperature 2.0 1.5 1.0 2.7 2.6 2.5 IN- [μA] VIH [V] 0.5 0.0 -0.5 -1.0 -1.5 -2.0 -40 -20 0 20 40 60 80 100 120 2.4 2.3 2.2 2.1 2.0 -40 -20 0 20 40 60 80 100 120 Temperature [°C] Temperature [°C] Figure 14. Logic Low Input Current vs. Temperature Figure 15. Logic Input High Voltage vs. Temperature 2.0 1.9 1.8 1.7 1.6 1.5