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Part Number |
EM6680 |
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Manufacturer |
EM Microelectronic |
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Semiconductor DataSheet |
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DataSheet View |
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EM MICROELECTRONIC - MARIN SA
EM6680
Ultra Low Power 8-pin Microcontroller
Features
True Low Power: 4.0 µA active mode 3.0 µA standby mode 0.65 µA sleep mode
@ 1.5V, 32kHz, 25°C
Stable RC oscillator 32 - 128kHz Prescaler
Figure 1. Architecture
VDD VDD
Power Supply
ROM 1536 x 16Bit
RAM 80 x 4Bit
Low Supply Voltage 1.2 V to 3.6 V No external component needed Available in TSSOP-8/14, SO-8/14 packages and die 4-bit ADC or 12 levels Supply Voltage Level Detector (SVLD) Max 4 (5*) outputs with 2 high drive outputs of 10mA Max. 5 (6*) inputs Sleep Counter Reset (automatic wake-up from sleep mode (EM patent)) Mask ROM 1536 × 16 bits RAM 80 × 4 bits Internal RC oscillator 32 kHz – 800 kHz 2 clocks per instruction cycle 72 basic instructions External CPU clock source possible Watchdog timer (2 sec) Power-On-Reset with Power-Check on Start-Up 3 wire serial port , 8 bit, master and slave mode Universal 10-bit counter, PWM, event counter Prescaler down to 1 Hz (freq. = 32 kHz) Frequency output 1Hz, 2048 Hz, CpuClk, PWM 6 internal interrupt sources ( 2×10-bit counter, 2× prescaler, SVLD, Serial Interface) 2 external interrupt sources (port A)
Power on Reset Sleep Counter Reset Watchdog
10-Bit Univ Count/Timer
Core EM6600
4-bit ADC
Interrupt Controller SVLD check
Port A
Serial Interface
Reset PA2 PA3 PA4 *PA5
PA0
PA1
PA1 & PA2: high current drive outputs
* PA5 available only in 14-pin package and in die
Figure 2. Pin Configuration
PA0
1 2 3 4 8
VDD VREG PA4 (Reset,ADC) VSS
Description
The EM6680 is an ultra-low voltage, low power microcontroller coming in a package as small as 8-pin TSSOP and working up to 0.4 MIPS. It comes with an integrated 4-bit ADC and 2 high current drive outputs of 10mA and it requires no external component. It has a sleep counter reset allowing automatic wake-up from sleep mode. It is designed for use in battery-operated and fieldpowered applications requiring an extended lifetime. A high integration level make it an ideal choice for cost sensitive applications. The EM6680 contains the equivalent of 3kB mask ROM and a RC oscillator with frequencies between 32 and 800kHz selectable by metal option. It also has a poweron reset, watchdog timer, 10 bit up/down counter, PWM and several clock functions. Tools include windows-based simulator and emulator. A ROMless version is also available for validation in development stage (EMDK6680A).
TSSOP-8, SO-8
PA1 PA2 PA3
EM6680
7 6 5
NC PA0 PA1 PA2 PA3 NC NC
1 2 3 4 5 6 7
14 13 12
NC VDD VREG PA5 PA4 (Reset,ADC) VSS NC
TSSOP-14, SO-14
EM6680
11 10 9 8
Typical Applications
Household appliances Safety and security devices Automotive controls Sensor interfaces Watchdog Intelligent ADC Driver (LED, triac)
Copyright © 2005, EM Microelectronic-Marin SA
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EM6680
EM6680 at a glance
Power Supply
- Low voltage low power architecture including internal voltage regulator - 1.2 V to 3.6 V supply voltage - 4.0 µA in active mode - 3.5 µA in standby mode - 0.35 µA in sleep mode @ 1.5V, 32kHz, 25°C
4(5)-Bit I/O PA[3:0] & PA[4] / PA[5]*
- Direct input read on the port terminals - 2 Debounce function available muxed on 4 inputs - 2 Interrupt request on positive or negative edge - Pull-up or pull-down or none selectable by register, except PA[4] where pullup/down is mask selection - 2 Test variables (software) for conditional jumps - PA[1] and PA[3/4] are inputs for the event counter - PA[3/4] Reset input (register selectable) - All outputs can be put tri-state (default) - Selectable pull-downs in input mode - CMOS or Nch. open drain outputs - Weak pull-up selectable in Nch. open drain mode
RAM
- 80 x 4 bit, directly addressable
ROM
- 1536 x 16 bit (~3k Byte), metal mask programmable
CPU
- 4-bit RISC architecture - 2 clock cycles per instruction (CPI=2) - 72 basic instructions
4-bit ADC & Voltage Level Det. (SVLD)
- External voltage compare from PA[4] input possible (low resolution 4 bit AD converter) -12 different levels from 1.2 V to 3.0 V for SVLD - Used for Power Check after POR (1.25V or 1.85V) - Busy flag during measure - Interrupt generated if SVLD measurement low
Main Operating Modes and Resets
- Active mode (CPU is running) - Standby mode (CPU in halt, peripherals running) - Sleep mode (no clock, data kept) - Initial Power-On-Reset with Power-Check - Watchdog reset (logic) - Reset terminal (software option on PA[3/4]) - Sleep Counter reset from Sleep mode - Wakeup on change from Sleep mode
10-Bit Universal Counter
- 10, 8, 6 or 4 bit up/down counting - Parallel load - Event counting (PA[1] or PA[3/4]) - 8 different input clocks - Full 10 bit or limited (8, 6, 4 bit) compare function - 2 interrupt requests (on compare and on 0) - Hi-frequency input on PA[1] and PA[3/4] or CPUclk/2 - Pulse width modulation (PWM) output
Prescaler
- Divider (4 stages) to best fit CPU clock (32kHz – 1MHz to 32kHz system clock to keep peripherals timing close to specification - 15 stage system clock divider from 32kHz down to 1Hz - 2 Interrupt requests (3 different frequencies) - Prescaler reset (4kHz to 1Hz)
Interrupt Controller
- 2 external and 6 internal interrupt request sources - Each interrupt request can individually be masked - Each interrupt flag can individually be reset - Automatic reset of each interrupt request after read - General interrupt request to CPU can be disabled - Automatic enabling of general interrupt request flag when going into HALT mode
8-Bit Serial Interface
- 3 wire (Clock, DataIn , DataOut) master/slave mode - READY output during data transfer - Maximum shift clock is equal to the main system clock - Interrupt request to the CPU after 8 bit data transfer - Supports different serial formats - pins shared with general 4 bit PA[3:0] I/O port
Sleep Counter Reset (SCR)
- wake up the EM6680 from sleep mode - 4 timings selectable by register - Inhibit SCR by register
Oscillator
- RC Oscillator range: 32/50kHz to 500/800kHz (metal selectable from 32/50, 64/100, 128/200, 256/400 or 500/800 kHz typ. for CPU clock) - No external components are necessary - Temperature compensated - External clock source possible from PA[1]
Package form available
- TSSOP-8/14 - SO-8/14 - Die form (9 pin possible due to additional I/O pin)
NB: All frequencies written in this document are related to a typical system clock of 32 kHz !
Copyright © 2005, EM Microelectronic-Marin SA
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EM6680
Table of Contents
FEATURES______________________________ 1
1H
8.4
PULSE WIDTH MODULATION (PWM) _______ 28
47H
DESCRIPTION ___________________________ 1
2H
8.4.1 8.4.2
How the PWM Generator works._________429 PWM Characteristics__________________430
8H4 9H4 50H 51H
EM6680 AT A GLANCE ____________________ 2
3H
1. 2. 2.1 2.2 2.3 3. 4. 4.1 4.2 4.3 4.4 4.5 4.6 5. 5.1 5.2 5.3 6. 6.1 6.2
PIN DESCRIPTION FOR EM6680 _______ 4
4H
OPERATING MODES ________________ ACTIVE MODE_______________________ STANDBY (HALT) MODE _______________ SLEEP MODE _______________________ POWER SUPPLY____________________
5H 6H 7H 8H 9H 10H
5 5 5 5 6
8.5 COUNTER SETUP _____________________ 30 8.6 10-BIT COUNTER REGISTERS ____________ 31 9. SUPPLY VOLTAGE LEVEL DETECTOR / 4-BIT ADC ______________________________ 33
52H
10. ADC/SVLD COMPARATOR CHARACTERISTICS ______________________ 36
53H
11. 12. 12.1 13. 14. 15. 15.1
RAM _____________________________ 36
54H
RESET ____________________________ 7 POR WITH POWER-CHECK RESET_________ 8 INPUT PORT A RESET __________________ 9 DIGITAL WATCHDOG TIMER RESET ________ 9 SLEEP COUNTER RESET _______________ 10 WAKE-UP ON CHANGE ________________ 10 THE CPU STATE AFTER RESET __________ 10 OSCILLATOR AND PRESCALER _____ 11 RC OSCILLATOR OR EXTERNAL CLOCK_____ 11 SPECIAL 4 STAGE FREQUENCY DIVIDER ____ 12 PRESCALER ________________________ 12 INPUT AND OUTPUT PORT A ________ 14 INPUT / OUTPUT PORT OVERVIEW ________ 14 PORTA AS INPUT AND ITS MULTIPLEXING ___ 15
1H 12H 13H 14H 15H 16H 17H 18H 19H 20H 21H 2H 23H
INTERRUPT CONTROLLER __________ 37 INTERRUPT CONTROL REGISTERS _________ 38 PERIPHERAL MEMORY MAP _________ 39
5H 56H 57H
ACTIVE SUPPLY CURRENT TEST _____ 41
58H
MASK OPTIONS ____________________ 42 INPUT / OUTPUT PORTS ________________ 42
59H 60H
15.1.1 15.1.2 15.1.3 15.1.4 15.1.5 15.1.6 15.1.7
Port A Metal Options __________________642 RC oscillator Frequency Option _________643 Debouncer Frequency Option ___________643 Power-Check Level Option _____________643 ADC/SVLD Voltage Level #15___________643 Counter Update option ________________644 Voltage Regulator level ________________644
1H6 2H6 3H6 4H6 5H6 6H 7H6 68H
6.2.1 6.2.2 6.2.3 6.2.4 6.2.5 6.2.6 6.2.7 6.2.8 6.2.9 6.2.10 6.2.11
Debouncer __________________________215 IRQ on Port A _______________________216 Pull-up/down ________________________216 Software test variables ________________217 Port A for 10-Bit Counter _______________217 Port A Wake-Up on change_____________217 Port A for Serial Interface ______________317 Port A for External Reset_______________317 Port PA[4] as Comparator Input _________317 Reset and Sleep on Port A _____________317 Port A Blocked Inputs _________________317
4H2 5H2 6H2 7H2 8H2 9H2 0H3 1H3 2H3 3H 4H3 35H
16. 16.1 16.2 16.3 16.4 17. 17.1 17.2 17.3 17.4 17.5 17.6 17.7 17.8 18. 18.1 18.2 19. 19.1 19.2
6.3 6.4 7. 7.1 7.2 7.3 8. 8.1 8.2 8.3
PORTA AS OUTPUT AND ITS MULTIPLEXING _ 18
CMOS / Nch. Open Drain Output ________318
6H3
6.3.1
PORT A REGISTERS___________________ SERIAL PORT _____________________ GENERAL FUNCTIONAL DESCRIPTION______ DETAILED FUNCTIONAL DESCRIPTION______
37H 38H 39H 40H 42H
19 21 22 22
1H4
7.2.1
Output Modes _______________________423
SERIAL INTERFACE REGISTERS __________ 25 10-BIT COUNTER __________________ 26 FULL AND LIMITED BIT COUNTING ________ 26 FREQUENCY SELECT AND UP/DOWN COUNTING427 EVENT COUNTING____________________ 28
43H 4H 5H4 46H
TEMP. AND VOLTAGE BEHAVIORS ___ 45 IDD CURRENT (TYPICAL) AND VREG FOR 2 THRESHOLDS AND 1/3 OF POSSIBLE |