Low Power Microcontroller

EM MICROELECTRONIC - MARIN SA EM6635 Low Power Microcontroller with RC and 32kHz oscillators and 9 high drive outputs Features 32’768Hz crystal oscillator 500kHz RC Oscillator (no external component) External clock (metal option) 9 High drive outputs: up to 20mA Melody generator with 255 programmable frequencies True Low Power: 1.5uA active mode 0.4uA halt mode @ 1.55V, 32kHz, 25°C Figure 1. Architecture Crystal Oscillator 32kHz RC Oscillator 500kHz or External clock ROM 4096 x 16Bits RAM 256 x 4Bits Watch Dog timer Timer 1 VLD 3levels Timer 2 Frequency Doubler Power Supply Voltage reg. Reset Logic Core EM6600 B CD Counter Frequency Generator Interrupt Controller Low Supply Voltage 1.2V to 3.6V Max. 14 Inputs with selectable debouncers; Port P1, P2, P6, P70, P71 Max. 15 outputs (9 I/O High drive outputs); Port P3, P4, P6, P70, P71, P72 Mask ROM 4096 x 16bits RAM 256 x 4bits 2 clocks per instruction cycle 72 basic instructions 2 outputs; Reset OUT, Buzzer OUT 2 timers 8bits 2 x 4 bits BCD counters Event counter 3bits Prescaler down to 1Hz (crystal =32kHz), readable by CPU in 2 ranges Serial Port as selectable configuration of Port 5 18 Interrupts: 12 internal, 6 external Voltage Level Detector, 3 levels software selectable Die form and MLF2, 40 pin (Micro Lead Frame) package Port 1 0123 Port 2 0123 Port 3 0123 Port 4 0123 Port 5 0123 Port 6 0123 Port 7 0123 High Drive Output Serial or parallel port 2 : High Drive Output 3 : Buzzer out Figure 2. Typical application Stepping Motors P4 SIO P5 P3 P72 V BAT BZ PI E Z O P1 P2 CENV EM6635 P6 +V BAT P70,P71 +VBAT Reset IN Reset Out QOUT VSS VRR C VRR 32kHz Xtal Description The EM6635 is a low voltage, low power microcontroller containing 9 integrated high-drive outputs able to provide up to 20mA. It is ideal for use in applications in which one must drive devices such as motor drivers, small stepping motors, LEDs, triacs, external EEPROM or other ICs in the system. EM6635 has both a 32kHz crystal oscillator and a 500kHz RC oscillator without external component, as well as an external clock to be driven up to 4MHz. The CPU operating clock can be switched from crystal to RC oscillator for high-speed operation. It has a frequency/melody generator with 255 programmable frequencies for quality buzzer. The EM6635 contains the equivalent of 8kB mask ROM and the RAM has a capacity of 256x4 bits. It also has a power-on reset, watchdog timer, 2 timers 8bits, 2 BCD counters, 3bits event counter, 4 wire serial port 8bits and several clock functions. QIN Applications Watch & clock Timer / sports timing devices Security / industrial Toys Sensor interface 03/03 REV. B Copyright  2002, EM Microelectronic-Marin SA 1 www.emmicroelectronic.com EM6635 EM6635 at a glance Power Supply Low voltage low power architecture including internal voltage regulator 1.2 to 3.6 V battery voltage 1.5µA in active mode (Xtal, 25°C) 0.4 µA in HALT mode (Xtal, 25°C) 32’768Hz Crystal Oscillator 500kHz RC oscillator (no external component) External clock (metal option) Timer 1 - 8bits timer with 3 modes: Zero Stop, Synchron Mode and Auto Reload Mode - Timer clock selectable 4kHz-2kHz-1kHz-512Hz by SW - Zero Stop: Timer starts counting down when loaded from CPU with data (> 0). When at zero, an interrupt is generated. - Synchron Mode: After loading by CPU, timer starts synchronized by the positive edge of the prescaler 64Hz signal. An interrupt is generated when timer reaches zero. During timer count down, Port P3 and P4 are outputting their data, otherwise P3 and P4 are at high level (acc. to selected port configuration). - Auto Reload Mode: (see text at Timer 2) Timer 2 - 8bits timer with 2 modes: Zero Stop and Auto Reload - Zero Stop as timer1 - Auto Reload mode: Timer starts when a non-zero data is loaded by CPU and counts down to zero. Then the loaded data (internally stored) is automatically reload to the timer counter and the sequence starts again. Each time when zero is reached, an interrupt is generated. - Timer clock selectable 256Hz-64Hz-16Hz-4Hz by SW CHRONO 2x4bits BCD counters - Start, stop, reset by SW - 1/100th second resolution - CARRY flag can be read by SW when the counter changes from 99 to 0 Event Counter 3bits - Associated to input port P10, P11; readable to CPU - Counter counts up to 7 and stays there - Counter reset by CPU-write Buzzer Output - Piezo driver via external NPN transistor - Activated together with frequency generator Input Ports P1, P2 - Direct or debounced input read selectable by SW for each port - Clocked pulldown or no pulldown by mask option - P1: Edge detector at P10, P11 (both edges) to generate pulse for event counter - Interrupt by P12: both edges, by P13: both edges - Interrupt by positive edge (debounced) of any P2 input - Reset by debounced input combination: P13, P22, P23 = high, enabled by SW Input / Output Ports P3, P4, P5, P6, P7 - High current drive capability at P3, P4 and P72 - P3, P4: Common direction select P30-P32, P40-P42; P33 and P43 are individually selectable - P5: individual direction select, debouncer when input - As input: direct read of terminal data, as output: register data - P3,P4,P72: selectable 9,8,7,6,5,4 or 3 high drive output in combination with special synchron mode of timer 1 - P5: pull down / pull up according to mask option - P6: As input: Direct or debounced input read selectable by SW - Interrupt by positive edge (debounced) of any P6 input - Common direction select P60-P61, P62-P63 - P70, P71: As input: Direct or debounced input read selectable by SW for each port - Interrupt by positive edge (debounced) of P70, P71 input - Common direction select P70, P71 03/03 REV.B RAM - 4 pages of 64 x 4bits, page 0 is direct addressable ROM - 4096 x 16bits, metal mask programmable CPU 4-bits RISC architecture 2 clock cycles per instruction (CPI=2) 72 basic instructions operating frequency selectable by SW Main Operating Modes and Resets Active mode, CPU is running Halt mode, CPU in halt, peripheral are running Initial reset on power on (POR) Watchdog reset (logic) Reset terminal with Schmitt Trigger Reset with input combination on Port P1 & Port P2 (register selectable) Prescaler 15 stage system clock divider from 32kHz down to 1Hz 4 Interrupt requests; 128Hz, 64Hz, 32Hz and 1Hz or 64Hz, 16Hz, 8Hz and 1Hz Prescaler state readable to CPU from 128Hz to 16Hz and from 8Hz to 1Hz Prescaler reset (32Hz to 1Hz) 8bit Serial Interface at Port 5 4 wire (serial clock In/Out, serial output, serial status In/Out (RDY), serial input) Master mode: 32kHz, 16kHz or 4kHz serial clock Slave mode: external clock from P33 Selectable word length: 8 - 7 - 6 - 5 bit Selectable synchronized or direct output Selectable positive or negative active clock edge by direct or inverted serial clock SCK Special ready output mode when port is in master mode RDY can be set by SW Frequency Generator with 255 output frequencies 8bit programmable frequency divider 50% duty cycle output signal Clock frequency is 65536Hz (doubled 32768Hz) SW activated - Watchdog Timer - Creates watchdog reset after time-out - Can be disabled by SW and mask option Interrupt Controller - 12 internal, 6 external interrupt request sources - Individually maskable, individually resettable - Global interrupts disable,with auto-enable at HALT mode Voltage Level Detector (SVLD) - 3 software selectable levels - Busy flag during measure - Active only on request during measurement to reduce power consumption Copyright  2002, EM Microelectronic-Marin SA 2 www.emmicroelectronic.com EM6635 1. Pin Description Package MLF2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Function Ports Symbol P23 P22 P21 P20 BZ RESET OUT VSS TCK TESTRC QOUT QIN TEST CENV VRR RESET IN P71 P70 P63 P62 P61 P60 P53 P52 P51 P50 VBAT (VDD) P13 P12 P11 P10 P72 P43 P42 P41 P40 P33 P32 P31 P30 NC/P63 Type Description I I I I O O Input port with selectable debouncer Input port with selectable debouncer Input port with selectable debouncer Input port with selectable debouncer Buzzer output Reset output negative supply, substrate EM test access, must be without any connection EM test access, must be without any connection 32 kHz quartz connection, input or External clock (metal option) 32 kHz quartz connection, output Not connected EM test access, must be without any connection Capacitor connection for envelop control tw. VSS Regulated supply voltage, capacitor connection tw. VSS active high reset input Input/output; low current drive Input/output; low current drive Input/output; low current drive Input/output; low current drive Input/output; low current drive Input/output; low current drive Input/output: configurable as serial clock I/O: SCK Input/output: configurable as serial output: SOUT Input/output: configurable as serial status I/O: RDY Input/output: configurable as serial input: SIN Positive supply, capacitor tw. VSS (C depends on VBAT noise) Input port with selectable debouncer and edge detector Input port with selectable debouncer and edge detector Input port with selectable debouncer and edge detector Input port with selectable debouncer and edge detector Input/output; high current drive Input/output; high current drive Input/output; high current drive Input/output; high current drive Input/output; high current drive Input/output; high current drive, P33 configurable as Fout Input/output; high current drive Input/output; high current drive Input/output; high current drive Not connected System Power Supply Test Oscillator Test System Power Supply System Ports I I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I I I I I/O I/O I/O I/O I/O I/O I/O I/O I/O Power Supply Ports 03/03 REV. B Copyright  2002, EM Microelectronic-Marin SA 3 www.emmicroelectronic.com EM6635 2. Peripheral Memory Allocation Address HEX 0 - 3F 40 - 46 47 – 4C 4D - 4F 50 - 55 56 – 5E 5F 60 – 6B 6C 6D 6E 6F 70 - 74 75, 76 77 78 79 – 7D