Ultra-low power microcontroller

R EM MICROELECTRONIC - MARIN SA EM6625 Ultra Low Power Microcontroller with 4x20 LCD Driver Features True Low Power 1.6 µA active mode, LCD On 0.4 µA standby mode, LCD Off 0.2 µA sleep mode @ 3 V, 32 KHz, 25 ºC Figure 1. Architecture Low Supply Voltage 1.2 V to 3.6 V Melody, 7 tones + silence inclusive 4-bit timer Universal 10-bit counter, PWM, event counter LCD 20 segments, 3 or 4 times multiplexed Temperature compensated LCD voltage levels Built-in LCD voltage multipliers LCD frequency 32 Hz/42.7 Hz/64 Hz 32 KHz or 128 kHz crystal oscillator 72 basic instructions 2 clocks per instruction cycle Mask ROM 4k x 16 bits RAM 128 x 4 bits Max. 12 inputs ; port A, port B, port SP Max. 8 outputs ; port B, port SP Voltage Level Detector (VLD), 8 levels software selectable from 1.2 V up to 4.0 V Prescaler down to 1 second ( crystal = 32 KHz ) 1/1000 sec 12 bit binary coded decimal counter with hard or software start/stop function 3 wire serial port , 8 bit, master and slave mode 5 external interrupts (port A, serial interface) 8 internal interrupts (3x prescaler, BCD counter 2x10-bit counter, melody timer, serial interface) timer watchdog and oscillation supervisor 32/128 KHz Crystal Osc ROM 4k X 16Bit RAM 128*4Bit VDD Power Supply VLD 8 Levels Power on Reset Watchdog Prescaler Millisecond Counter Core EM6600 10-Bit Univ Count/Timer Melody Generator Interrupt Controller Voltage Multiplier Port A 0 1 2 3 Port B 0 1 2 3 PWM PWM Serial Interface LCD Controller 3, 4 X 20 Figure 2. Pin Configuration, TQFP52 Description The EM6625 is an ultra-low power, low voltage microcontroller with an integrated 3/4 MUX x 20 segments LCD driver and the equivalent of 8kB mask ROM. It features temperature compensated LCD voltage levels, free LCD segment allocation and built-in voltage multipliers. It also has a melody generator, a millisecond counter (BCD) and PWM function. Tools include windows-based simulator and emulator. A flexible MFP version is also available for development stage. Due to its very low current consumption, the EM6625 is ideal for use in battery-operated and field-powered applications. TQFP52 STROBE BUZZER 42 QOUT VREG VBAT PA[3] 41 PA[2] 40 VSS 48 C1A C1B C2A C2B QIN 46 52 51 50 49 47 45 44 VL1 VL2 VL3 COM[1] COM[2] COM[3] COM[4] SEG[20] SEG[19] 1 2 3 4 5 6 7 8 9 10 11 12 43 39 38 37 36 35 34 PA[1] PA[0] PB[3] PB[2] PB[1] PB[0] PS[3] PS[2] PS[1] PS[0] TEST RESET SEG[1] EM6625 33 32 31 30 29 28 Typical Applications Household appliance Timer / sports timing devices Medical devices Interactive system with display Automotive controls with display Measurement equipment Bicycle computers Safety and security devices SEG[18] SEG[17] SEG[16] SEG[15] 14 15 16 17 18 19 20 21 22 23 24 25 SEG[3] SEG[14] SEG[13] SEG[12] SEG[11] SEG[10] SEG[9] SEG[8] SEG[7] SEG[6] SEG[5] SEG[4] Copyright © 2005, EM Microelectronic-Marin SA 1 www.emmicroelectronic.com SEG[2] 26 13 27 R EM6625 EM6625 at a glance Power Supply - Low voltage low power architecture including internal voltage regulator - 1.2 V to 3.6 V battery voltage - 1.6 µA in active mode (Xtal, LCD on, 25 °C) - 0.4 µA in standby mode (Xtal, LCD off, 25 °C) - 0.2 µA in sleep mode (25 °C) - 32 KHz/128 kHz Oscillator (metal option) 4-Bit Input Port A - Direct input read on the port terminals - Debouncer function available on all inputs - Interrupt request on positive or negative edge - Pull-up or pull-down or none selectable by register - Test variables (software) for conditional jumps - PA[0] and PA[3] are inputs for the event counter - PA[3] is Start/Stop input for the millisecond counter - Reset with input combination (register selectable) RAM - 64 x 4 bit, direct addressable - 64 x 4 bit, indexed addressable 4-Bit Bi-directional Port B - All different functions bit-wise selectable - Direct input read on the port terminals - Data output latches - CMOS or Nch. open drain outputs - Pull-down or pull-up selectable - Weak pull-up in Nch. open drain mode - Selectable PWM, 32kHz, 1kHz and 1Hz output ROM - 4k x 16 bit (~8k Byte), metal mask programmable CPU - 4-bit RISC architecture - 2 clock cycles per instruction - 72 basic instructions Melody Generator - Dedicated Buzzer terminal - 7 tones plus silence output - The output can be put tristate (default) - Internal 4-bit timer, usable also in standalone mode - 4 different timer input clocks - Timer with automatic reload or single run - Timer interrupt request when reaching 0 Main Operating Modes and Resets - Active mode (CPU is running) - Standby mode (CPU in halt) - Sleep mode (no clock, reset state) - Initial reset on power on (POR) - Watchdog reset (logic and oscillation watchdogs) - Reset terminal - Reset with input combination on port A (register selectable) Voltage Level Detector (SVLD) - 8 different levels from 1.2 V to 4.0 V. - Busy flag during measure Prescaler - 15 stage system clock divider down to 1Hz - 3 Interrupt requests; 1Hz, 32Hz or 8Hz, Blink - Prescaler reset (4kHz to 1Hz) 10-Bit Universal Counter - 10, 8, 6 or 4 bit up/down counting - Parallel load - Event counting (PA[0] or PA[3]) - 8 different input clocks- Full 10 bit or limited (8, 6, 4 bit) compare function - 2 interrupt requests (on compare and on 0) - Hi-frequency input on PA[3] and PA[0] - Pulse width modulation (PWM) output Liquid Crystal Display Driver (LCD) - 20 Segments 3 or 4 times multiplexed - Internal or external voltage multiplier - Free Segment allocation architecture (metal option) - LCD switch off for power save - LCD frequency 32 Hz/42.7 Hz/64 Hz Millisecond Counter - 3 digits binary coded decimal counter (12 bits) - PA[3] input signal pulse width and period measurement - Internal 1000 Hz clock generation - Hardware or software controlled start stop mode - Interrupt request on either 1/10 Sec or 1Sec 8-Bit Serial Interface - 3 wire (Clock, DataIn , DataOut) master/slave mode - READY output during data transfer - Maximum shift clock is equal to the main system clock - Interrupt request to the CPU after 8 bits data transfer - Supports different serial formats - Can be configured as a parallel 4 bit input/output port - Direct input read on the port terminals - All outputs can be put tristate (default) - Selectable pull-downs in input mode - CMOS or Nch. open drain outputs - Weak pull-up selectable in Nch. open drain mode Interrupt Controller - 5 external and 8 internal interrupt request sources - Each interrupt request can individually be masked - Each interrupt flag can individually be reset - Automatic reset of each interrupt request after read - General interrupt request to CPU can be disabled - Automatic enabling of general interrupt request flag when going into HALT mode. Copyright © 2005, EM Microelectronic-Marin SA 2 www.emmicroelectronic.com R EM6625 Table of Contents FEATURES __________________________________1 DESCRIPTION _______________________________1 TYPICAL APPLICATIONS _______________________1 EM6625 AT A GLANCE _________________________2 1. PIN DESCRIPTION FOR EM6625 _____________4 2. OPERATING MODES ______________________6 2.1 ACTIVE MODE __________________________6 2.2 STANDBY MODE ________________________6 2.3 SLEEP MODE __________________________6 3. POWER SUPPLY__________________________7 4. RESET __________________________________8 4.1 OSCILLATION DETECTION CIRCUIT ___________9 4.2 RESET TERMINAL _______________________9 4.3 INPUT PORT A RESET FUNCTION ____________9 4.4 DIGITAL WATCHDOG TIMER RESET __________10 4.5 CPU STATE AFTER RESET ________________10 5. OSCILLATOR AND PRESCALER____________11 5.1 OSCILLATOR __________________________11 5.2 PRESCALER __________________________11 6. INPUT AND OUTPUT PORTS _______________12 6.1 PORTS OVERVIEW ______________________12 6.2 PORT A _____________________________13 6.2.1 IRQ on Port A ____________________13 6.2.2 Pull-up or Pull-down _______________14 6.2.3 Software Test Variables ____________14 6.2.4 Port A for 10-Bit Counter and MSC ___14 6.3 PORT A REGISTERS _____________________14 6.4 PORT B _____________________________16 6.4.1 Input / Output Mode _______________16 6.4.2 Pull-up or Pull-down _______________17 6.4.3 CMOS / NCH. Open Drain Output ____17 6.4.4 PWM and Frequency Output ________18 6.5 PORT B REGISTERS _____________________18 6.6 PORT SERIAL _________________________19 6.6.1 4-bit Parallel I/O __________________19 6.6.2 Pull-up or Pull-down _______________20 6.6.3 Nch. Open Drain Outputs ___________21 6.6.4 General Functional Description ______21 6.6.5 Detailed Functional Description ______22 6.6.6 Output Modes ____________________22 6.6.7 Reset and Sleep on Port SP_________23 6.7 SERIAL INTERFACE REGISTERS _____________24 7. MELODY, BUZZER _______________________26 7.1 4-BIT TIMER __________________________26 7.1.1 Single Run Mode _________________27 7.1.2 Continuos Run Mode ______________27 7.2 PROGRAMMING ORDER __________________28 7.3 MELODY REGISTERS ____________________28 8. 10-BIT COUNTER ________________________30 8.1 FULL AND LIMITED BIT COUNTING ___________30 8.2 FREQUENCY SELECT AND UP/DOWN COUNTING _31 8.3 EVENT COUNTING ______________________32 8.4 COMPARE FUNCTION ____________________32 8.5 PULSE WIDTH MODULATION (PWM) _________32 8.5.1 How the PWM Generator works. _____33 8.5.2 PWM Characteristics ______________33 8.6 COUNTER SETUP _______________________34 8.7 10-BIT COUNTER REGISTERS ______________ 34 9. MILLISECOND COUNTER _________________ 36 9.1 PA[3] INPUT FOR MSC __________________ 36 9.2 IRQ FROM MSC _______________________ 36 9.3 MSC-MODES _________________________ 37 9.4 MODE SELECTION ______________________ 37 9.5 MILLISECOND COUNTER REGISTERS _________ 39 10. INTERRUPT CONTROLLER ______________ 40 10.1 INTERRUPT CONTROL REGISTERS ___________ 41 11. SUPPLY VOLTAGE LEVEL DETECTOR ____ 42 11.1 SVLD REGISTER ______________________ 42 12. STROBE OUTPUT______________________ 43 12.1 STROBE REGISTER _____________________ 43 13. RAM ___________________