Ultra-low power microcontroller

EM MICROELECTRONIC - MARIN SA EM6622 Ultra Low Power Microcontroller with 4x32 LCD Driver Features • Low Power - 3.0 µA active mode, LCD On - 0.6 µA standby mode, LCD Off - 0.2 µA sleep mode @ 1.5 V, 32 KHz, 25 ºC Low Voltage - 1.2 to 3.6 V 2 clocks per instruction cycle 72 basic instructions ROM 4k x 16 bits RAM 128 x 4 bits Max. 12 inputs ; port A, port B, port SP Max. 8 outputs ; port B, port SP Voltage Level Detector, 8 levels software selectable from 1.2 V up to 4.0 V Melody, 7 tones + silence inclusive 4-bit timer Universal 10-bit counter, PWM, event counter Prescaler down to 1 second ( crystal = 32 KHz ) 1/1000 sec 12 bit binary coded decimal counter with hard or software start/stop function LCD 32 Segments, 3 or 4 times multiplexed 3 wire serial port , 8 bit, master and slave mode 5 external interrupts (port A, serial interface) 8 internal interrupts (3x prescaler, BCD counter 2x10-bit counter, melody timer, serial interface) timer watchdog and oscillation supervisor Figure 1. Architecture • • • • • • • • • • • • • • • • • Description The EM6622 is an advanced single chip low cost CMOS 4-bit microcontroller. It contains ROM, RAM, LCD driver, power on reset, watchdog timer, oscillation detection circuit, 10-bit up/down and event counter, 1ms BCD counter, prescaler, voltage level detector (Vld), serial interface and several clock functions. The low voltage feature and low power consumption make it the most suitable controller for battery, stand alone and mobile equipment. The EM6622 is manufactured using EM Microelectronic's advanced low power (ALP) CMOS process. Figure 2. Pin Configuration, TQFP64 10 * 10 * 1 mm Typical • • • • • • • • • Applications Timing device Automotive controls with display Intelligent display driver Measurement equipment Domestic appliance Interactive system with display Timer / sports timing devices Bicycle computers Safety and security devices 03/02 REV. C/445 Copyright  2002, EM Microelectronic-Marin SA 1 www.emmicroelectronic.com EM6622 EM6622 at a glance • Power Supply - Low voltage low power architecture including internal voltage regulator - 1.2 ... 3.6 V battery voltage - 3.0 µA in active mode (Xtal, LCD on, 25 °C) - 0.6 µA in standby mode (Xtal, LCD off, 25 °C) - 0.2 µA in sleep mode (25 °C) - 32 KHz Oscillator • 4-Bit Input Port A - Direct input read on the port terminals - Debouncer function available on all inputs - Interrupt request on positive or negative edge - Pull-up or pull-down or none selectable by register - Test variables (software) for conditional jumps - PA[0] and PA[3] are inputs for the event counter - PA[3] is Start/Stop input for the millisecond counter - Reset with input combination (register selectable) • RAM - 64 x 4 bit, direct addressable - 64 x 4 bit, indexed addressable • 4-Bit Bi-directional Port B - All different functions bit-wise selectable - Direct input read on the port terminals - Data output latches - CMOS or Nch. open drain outputs - Pull-down or pull-up selectable - Weak pull-up in Nch. open drain mode - Selectable PWM, 32kHz, 1kHz and 1Hz output • ROM - 4k x 16 bit, metal mask programmable • CPU - 4-bit RISC architecture - 2 clock cycles per instruction - 72 basic instructions • Melody Generator - Dedicated Buzzer terminal - 7 tones plus silence output - The output can be put tristate (default) - Internal 4-bit timer, usable also in standalone mode - 4 different timer input clocks - Timer with automatic reload or single run - Timer interrupt request when reaching 0 • Main Operating Modes and Resets - Active mode (CPU is running) - Standby mode (CPU in halt) - Sleep mode (no clock, reset state) - Initial reset on power on (POR) - Watchdog reset (logic and oscillation watchdogs) - Reset terminal - Reset with input combination on port A (register selectable) • Voltage Level Detector (SVLD) - 8 different levels from 1.2 V to 4.0 V. - Busy flag during measure • Prescaler - 15 stage system clock divider down to 1Hz - 3 Interrupt requests; 1Hz, 32Hz or 8Hz, Blink - Prescaler reset (4kHz to 1Hz) • 10-Bit Universal Counter - 10, 8, 6 or 4 bit up/down counting - Parallel load - Event counting (PA[0] or PA[3]) - 8 different input clocks- Full 10 bit or limited (8, 6, 4 bit) compare function - 2 interrupt requests (on compare and on 0) - Hi-frequency input on PA[3] and PA[0] - Pulse width modulation (PWM) output • Liquid Crystal Display Driver (LCD) - 32 Segments 3 or 4 times multiplexed - Internal or external voltage multiplier - Free Segment allocation architecture (metal 2 mask) - LCD switch off for power save • 8-Bit Serial Interface - 3 wire (Clock, DataIn , DataOut) master/slave mode - READY output during data transfer - Maximum shift clock is equal to the main system clock - Interrupt request to the CPU after 8 bits data transfer - Supports different serial formats - Can be configured as a parallel 4 bit input/output port - Direct input read on the port terminals - All outputs can be put tristate (default) - Selectable pull-downs in input mode - CMOS or Nch. open drain outputs - Weak pull-up selectable in Nch. open drain mode • Millisecond Counter - 3 digits binary coded decimal counter (12 bits) - PA[3] input signal pulse width and period measurement - Internal 1000 Hz clock generation - Hardware or software controlled start stop mode - Interrupt request on either 1/10 Sec or 1Sec • Interrupt Controller - 5 external and 8 internal interrupt request sources - Each interrupt request can individually be masked - Each interrupt flag can individually be reset - Automatic reset of each interrupt request after read - General interrupt request to CPU can be disabled - Automatic enabling of general interrupt request flag when going into HALT mode. 03/02 REV. C/445 Copyright  2002, EM Microelectronic-Marin SA 2 www.emmicroelectronic.com EM6622 Table of Contents FEATURES __________________________________ 1 DESCRIPTION _______________________________ 1 TYPICAL APPLICATIONS ______________________ 1 EM6622 AT A GLANCE ________________________ 2 1. PIN DESCRIPTION FOR EM6622 ____________ 4 2. OPERATING MODES ______________________ 6 2.1 ACTIVE MODE__________________________ 6 2.2 STANDBY MODE ________________________ 6 2.3 SLEEP MODE __________________________ 6 3. POWER SUPPLY _________________________ 7 4. RESET__________________________________ 8 4.1 OSCILLATION DETECTION CIRCUIT ___________ 9 4.2 RESET TERMINAL ______________________ 10 4.3 INPUT PORT A RESET FUNCTION ___________ 10 4.4 DIGITAL WATCHDOG TIMER RESET __________ 11 4.5 CPU STATE AFTER RESET _______________ 11 5. OSCILLATOR AND PRESCALER ___________ 12 5.1 OSCILLATOR__________________________ 12 5.2 PRESCALER __________________________ 12 6. INPUT AND OUTPUT PORTS ______________ 13 6.1 PORTS OVERVIEW _____________________ 13 6.2 PORT A _____________________________ 14 6.2.1 IRQ on Port A____________________ 14 6.2.2 Pull-up or Pull-down_______________ 15 6.2.3 Software Test Variables____________ 15 6.2.4 Port A for 10-Bit Counter and MSC ___ 15 6.3 PORT A REGISTERS ____________________ 15 6.4 PORT B _____________________________ 17 6.4.1 Input / Output Mode _______________ 17 6.4.2 Pull-up or Pull-down_______________ 18 6.4.3 PWM and Frequency Output ________ 19 6.5 PORT B REGISTERS ____________________ 19 6.6 PORT SERIAL _________________________ 20 6.6.1 4-bit Parallel I/O __________________ 20 6.6.2 Pull-up or Pull-down_______________ 21 6.6.3 Nch. Open Drain Outputs___________ 22 6.6.4 General Functional Description ______ 22 6.6.5 Detailed Functional Description ______ 23 6.6.6 Output Modes ___________________ 23 6.6.7 Reset and Sleep on Port SP ________ 24 6.7 SERIAL INTERFACE REGISTERS ____________ 25 7. MELODY, BUZZER _______________________ 27 7.1 4-BIT TIMER __________________________ 27 7.1.1 Single Run Mode _________________ 28 7.1.2 Continuos Run Mode ______________ 28 7.2 PROGRAMMING ORDER __________________ 29 7.3 MELODY REGISTERS ____________________ 29 8. 10-BIT COUNTER ________________________ 31 8.1 FULL AND LIMITED BIT COUNTING ___________ 31 8.2 FREQUENCY SELECT AND UP/DOWN COUNTING_ 32 8.3 EVENT COUNTING ______________________ 33 8.4 COMPARE FUNCTION____________________ 33 8.5 PULSE WIDTH MODULATION (PWM)_________ 33 8.5.1 How the PWM Generator works. _____ 34 8.5.2 PWM Characteristics ______________ 34 8.6 COUNTER SETUP ______________________ 8.7 10-BIT COUNTER REGISTERS _____________ 9. MILLISECOND COUNTER_________________ 9.1 PA[3] INPUT FOR MSC _________________ 9.2 IRQ FROM MSC ______________________ 9.3 MSC-MODES ________________________ 9.4 MODE SELECTION______________________ 9.5 MILLISECOND COUNTER REGISTERS ________ 10. INTERRUPT CONTROLLER _____________ 10.1 INTERRUPT CONTROL REGISTERS __________ 11. SUPPLY VOLTAGE LEVEL DETECTOR ___ 11.1 SVLD REGISTER______________________ 12. STROBE OUTPUT _____________________ 12.1 STROBE REGISTER ____________________ 13. RAM ________________________________ 14. LCD DRIVER _________________________ 14.1 LCD CONTROL _______________________ 14.2 LCD ADDRESSING _____________________ 14.3 FREE SEGMENT ALLOCATION _____________ 14.4 LCD REGISTERS ______________________ 15. PERIPHERAL MEMORY MAP ____________ 16. OPTION REGISTER MEMORY MAP _______ 17. ACTIVE SUPPLY CURRENT TEST ________ 18. MASK OPTIONS ______________________ 18.1 INPUT / OUTPUT PORTS _________________ 18.1.1 Port A Metal Options ______________ 18.1.2 Port A Metal Options ______________ 18.1.3 Port B Metal Options ______________ 18.1.4 Port SP Metal Options_____________ 18.1.5 Voltage Regulator Option __________ 18.1.6 Debouncer Frequency Option_______ 18.1.7 User defined LCD Segment Allocation 19. TEMP. AND VOLTAGE BEHAVIORS ______ 19.1 IDD CURRENT (TYPICAL) ________________ 19.2 PULL-DOWN RESISTANCE (TYPICAL) ________ 19.3 PULL-UP RESISTANCE (TYPICAL) ___________ 19.4 OUTPUT CURRENTS (TYPICAL) ____________ 20. ELECTRICAL SPECIF