Ultra-low power microcontroller

EM MICROELECTRONIC - MARIN SA EM6617 Ultra Low Power Microcontroller with ADC AND EEPROM Features • Low Power - 3.2 µA active mode, ADC off - 9.0 µA active mode, ADC on - 0.6 µA standby mode - 0.1µA sleep mode @ 3.0V, 32kHz, 25°C Voltage range logic incl. EEPROM 2.0 to 5.5 V System operating clock : 32 or 128KHz (metal option) Voltage range for the ADC is 2.6 to 5.5 V 2 clocks per instruction cycle 72 basic instructions ROM 3k × 16 bit RAM 128 × 4 bit E2PROM 64 × 8 bit Voltage Level Detector, 3 levels software selectable :2.2, 2.5, 3.0 V 2 channel ADC, successive approximation method; conversion time at 32 kHz : 305µs Max. 12 inputs (3 ports); port A, port B, port C Max. 8 outputs (2 ports); port B, port C Serial Write Buffer, 256 bit wide , 4 bit rates Oscillation supervisor and timer watchdog Universal 10-bit counter, PWM, event counter 8 internal interrupt sources (2 × timer , 2 × prescaler, ADC, VLD, FIFO, EEPROM) 4 external interrupt sources (input port A ) Frequency output; 32kHz, 2kHz, 1kHz, PWM Figure 1. Architecture • • • • • • • • • • • • • • • • • • Figure 2. Pin Configuration Description The EM6617 is an advanced single chip CMOS 4-bit microcontroller. It contains ROM, RAM, power on reset, watchdog timer, oscillation detection circuit, combined timer , event counter, prescaler, E2PROM, 2 channel ADC, serial write buffer, voltage level detector and several clock functions. The low voltage feature and low power consumption make it the most suitable controller for battery, stand alone and mobile equipment. The EM6617 is manufactured using EM Microelectronic’s advanced low power (ALP) CMOS Process. Typical Applications • • • • • • • • Sensor & detector interface Heat meter interface Security systems Household equipment controls Automotive controls Measurement equipment R/F and IR. control Voltage control Copyright © 2005, EM Microelectronic-Marin SA 1 www.emmicroelectronic.com EM6617 EM6617 at a glance • Power Supply - Low voltage low power architecture including internal voltage regulator - 2.0 ... 5.5 V battery voltage for all logic functions - 2.6 ... 5.5 V battery voltage for the ADC (0.2LSB) - 3.2 µA in active mode, ADC off • 2 Channel 8-bit ADC - Conversion time is 305µs @32kHz - 2 operating modes (continuous, single) - Interrupt request at the end of conversion - 9.0 µA active mode, ADC on - 0.6µA in standby mode - 0.1µA in sleep mode - 32 KHz crystal oscillator • Prescaler - 15 stage system clock divider down to 1 Hz - 2 Interrupt requests; 1 Hz, 32 Hz or 8 Hz - Prescaler reset (4 KHz to 1Hz) • RAM - 64 x 4 bit, direct addressable - 64 x 4 bit, indirect addressable • 4-Bit Bi-directional Port B - All different functions bit-wise selectable - Direct input read on the port terminals - Data output latches - CMOS or Nch. open drain outputs - Pull-down or pull-up selectable - Weak pull-up in Nch. open drain mode - Selectable PWM, 1kHz, 32kHz and 2kHz output • ROM - 3072 x 16 bit metal mask programmable • E2PROM - 64 x 8 bit, indirect addressable - Interrupt request at the end of a write operation • 4Bit Bi-directional Port C - Input or output mode as whole port - Direct input read on port terminal - Data output latches - CMOS or Nch. open drain outputs - Pull-down or pull-up selectable - Weak pull-up in Nch. open drain mode • CPU - 4 bit RISC architecture - 2 clock cycles per instruction - 72 basic instructions • Main Operating Modes and Resets - Active Mode (CPU is running) - Standby Mode (CPU in halt) - Sleep Mode (No clock, reset state) - Initial reset on power on (POR) - Watchdog resets (logic and oscillation watchdogs) - Reset terminal - Reset with input combination on port A register selectable, ¨AND¨ or ¨OR¨ type by metal mask • Voltage Level Detector - 3 levels software selectable (2.0, 2.5, 3.0 V) - Busy flag during measure - Interrupt request at end of measure • 10-Bit Universal Counter - 10, 8, 6 or 4bit up/down counting - Parallel load - 8 different input clocks - Event counting (PA[0] or PA[3] ) - Full 10 bit or limited (8, 6, 4 bit) compare function - 2 interrupt requests (on compare and on 0) - Hi-frequency input on PA[3] and PA[0] - Pulse-width modulation (PWM) output • 4-Bit Input Port A - Direct input read on the port terminals - Debouncer function available on all inputs - Interrupt request on positive or negative edge - Pull-up or pull-down or none selectable by register - Test variables (software) for conditional jumps - PA[0] and PA[3] are inputs for the event counter - Reset with input combination (register selectable) • Interrupt Controller - 4 external and 8 internal interrupt request sources - Each interrupt can individually be maskable - Each interrupt can individually be reset - Automatic reset of each interrupt request after read - General interrupt request to CPU can be disabled - Automatic enabling of general interrupt request flag when going into HALT mode • Serial Write Buffer (output) - Max 256 bits long bit rates of 16kHz,8kHz,2kHz,1kHz - Automatic or interactive send mode - Interrupt request when buffer is empty Copyright © 2005, EM Microelectronic-Marin SA 2 www.emmicroelectronic.com EM6617 Table of Contents FEATURES 1 DESCRIPTION _______________________________ 1 TYPICAL APPLICATIONS _______________________ 1 EM6617 AT A GLANCE ________________________ 2 1. Pin Description for EM6617 ________________ 4 2. Typical configurations ____________________ 5 3. Operating Modes ________________________ 6 3.1 Active Mode ________________________ 6 3.2 Standby Mode_______________________ 6 3.3 Sleep Mode_________________________ 6 4. Power Supply ___________________________ 7 5. Reset _________________________________ 8 5.1 Oscillation Detection Circuit ____________ 9 5.2 Reset Terminal ______________________ 9 5.3 Input Port A Reset Function ____________ 9 5.3.1 AND-Type Reset function __________ 9 5.3.2 OR -Type Reset function __________ 10 5.4 Digital Watchdog Timer Reset _________ 10 5.5 CPU State after Reset _______________ 11 6. Oscillator and Prescaler __________________ 12 6.1 Oscillator __________________________ 12 6.2 Prescaler__________________________ 12 7. Input and Output ports ___________________ 13 7.1 Ports overview _____________________ 13 7.2 Port A ____________________________ 14 7.2.1 IRQ on Port A __________________ 14 7.2.2 Pull-up or Pull-down______________ 15 7.2.3 Software Test Variables___________ 15 7.2.4 Port A for 10-Bit Counter __________ 15 7.3 Port A registers _____________________ 15 7.4 Port B ____________________________ 17 7.4.1 Input / Output Mode ______________ 17 7.4.2 Pull-up or Pull-down______________ 18 7.4.3 CMOS or Nch. Output ____________ 18 7.4.4 PWM and Frequency Output _______ 19 7.5 Port B registers _____________________ 19 7.6 Port C ____________________________ 20 7.6.1 Pull-up or Pull-down______________ 20 7.6.2 CMOS or Nch. Output ____________ 21 7.7 Port C Registers ____________________ 22 8. 10-bit Counter _________________________ 23 8.1 Full and Limited Bit Counting __________ 23 8.2 Frequency Select and Up/Down Counting 24 8.3 Event Counting _____________________ 25 8.4 Compare Function __________________ 25 8.5 Pulse Width Modulation (PWM) ________ 25 8.5.1 How the PWM Generator works. ____ 26 8.5.2 PWM Characteristics _____________ 26 8.6 Counter Setup______________________ 27 8.7 10-bit Counter Registers ______________ 27 9. Serial (Output) Write Buffer - SWB _________ 29 9.1 SWB Automatic send mode ____________ 29 9.2 SWB Interactive send mode ___________ 31 9.3 SWB registers ______________________ 32 10. 2-Channel ADC (8-bit digital converter)_____ 33 10.1 Continuous mode____________________ 34 10.2 Single mode ________________________ 34 10.3 2-Channel ADC registers ______________ 35 11. EEPROM ( 64 × 8 Bit ) _________________ 36 11.1 EEPROM registers___________________ 37 12. Supply Voltage Level Detector ___________ 38 12.1 SVLD Register ______________________ 38 13. Interrupt Controller_____________________ 39 13.1 Interrupt control registers ______________ 40 14. RAM________________________________ 41 15. Strobe Output ________________________ 42 15.1 Strobe register ______________________ 42 16. PERIPHERAL MEMORY MAP ___________ 43 17. Option Register Memory Map ____________ 46 18. Active Supply Current Test ______________ 47 19. Mask Options_________________________ 48 19.1 Input / Output Ports __________________ 48 19.1.1 Port A Metal Options______________ 48 19.1.2 Port B Metal Options______________ 49 19.1.3 Port C Metal Options _____________ 50 19.1.4 SWB high impedance state ________ 51 19.1.5 Debouncer Frequency Option_______ 51 19.1.6 System Frequency _______________ 51 19.1.7 Additional mask options ___________ 51 20. Temp. and Voltage Behavior _____________ 52 20.1 I(VDD) Current ______________________ 52 20.2 IOL, IOH___________________________ 53 20.3 Pull-up, Pull-down ___________________ 54 20.4 Vreg, EEPROM _____________________ 54 20.5 ADC8 _____________________________ 55 21. Electrical Specification__________________ 57 21.1 Absolute Maximum Ratings ____________ 57 21.2 Handling Procedures _________________ 57 21.3 Standard Operating Conditions _________ 57 21.4 DC Characteristics - Power Supply ______ 58 21.5 Oscillator __________________________ 58 21.6 DC characteristics - I/O Pins ___________ 59 21.7 Supply Voltage Level Detector__________ 60 21.8 ADC 8 Bit __________________________ 60 21.9 EEPROM __________________________ 60 22. Pad Location Diagram __________________ 61 23. Package & Ordering information __________ 62 23.1 Ordering Information _________________ 65 23.2 Package Marking ____________________ 65 23.3 Customer Marking ___________________ 65 Copyright © 2005, EM Microelectronic-Marin SA 3 www.emmicroelectronic.com EM6617 1. Pin Description for EM6617 PDIP24 SO24 17 21 18 15 14 16 19 20 10 11 12 13 6 7 5 8 4 9 22 23 24 1 PDIP28