Ultra-low power microcontroller

R EM MICROELECTRONIC - MARIN SA EM6607 Ultra-low power microcontroller with 4 high drive outputs Features Low Power typical 1.8µA active mode typical 0.5µA standby mode typical 0.1µA sleep mode @ 1.5V, 32kHz, 25 °C Figure 1. Architecture V DD VREG V SS Low Voltage 1.2 to 3.3 V ROM 2k × 16 (Mask Programmed) RAM 96 × 4 (User Read/Write) 2 clocks per instruction cycle RISC architecture 5 software configurable 4-bit ports 1 High drive output port Up to 20 inputs (5 ports) Up to 16 outputs (4 ports) buzzer three tone Serial Write buffer – SWB Supply Voltage level detection (SVLD). Analogue and timer watchdog 8 bit timer / event counter Internal interrupt sources (timer, event counter, prescaler) External interrupt sources (portA + portC) 32KHz Crystal Osc ROM 2k X 16Bit RAM 96 X 4Bit Power Supply VLD 3 Levels Power on Reset Prescaler 8-Bit Event Count/Timer Core EM6600 3 Tone Buzzer Interrupt Controller Serial Write Buffer Watchdog Timer Port A 0 1 2 3 Port B 0 1 2 3 High Drive Outputs Port C 0 1 2 3 Port D 0 1 2 3 Clk Data Port E 0 1 2 3 Buzzer Description The EM6607 is a single chip low power, mask programmed CMOS 4-bit microcontroller. It contains ROM, RAM, watchdog timer, oscillation detection circuit, combined timer / event counter, prescaler, voltage level detector and a number of clock functions. Its low voltage and low power operation make it the most suitable controller for battery, stand alone and mobile equipment. The EM6607 microcontroller is manufactured using EM’s Advanced Low Power CMOS Process. In 24 Pin package it is direct replacement for EM6603. Figure 2. PA0 PA2 PA3 PB0 PB1 PB2 PB3 TEST 1 Pin Configuration 24 VDD 23 VREG 22 RESET 21 PD3 20 PD2 PA0 PA2 PA3 PE0 PB0 PB1 PB2 PB3 1 28 27 26 25 24 23 VDD VREG RESET PE3 PD3 PD2 PD1 PD0 PE2 PC3 PC2 PC1 PC0 STB/RST PA1 2 PA1 2 3 4 5 6 7 8 9 Typical Applications sensor interfaces domestic appliances clocks security systems bicycle computers automotive controls TV & audio remote controls measurement equipment R/F and IR. control motor driving 3 4 5 6 7 8 9 EM6607 19 PD1 18 PD0 17 PC3 16 15 14 13 EM6607 22 21 20 19 PC2 PC1 PC0 STB/RST QOUT 10 QIN 11 VSS 12 PE1 10 TEST 11 QOUT 12 QIN 13 VSS 14 EM6680 18 17 16 15 (TS)SOP-24 (TS)SOP-28 Copyright © 2005, EM Microelectronic-Marin SA 1 www.emmicroelectronic.com R EM6607 EM6607 at a glance Power Supply - Low Voltage, low power architecture including internal voltage regulator - 1.2V ... 3.3 V battery voltage - 1.8μA in active mode - 0.5μA in standby mode - 0.1μA in sleep mode @ 1.5V, 32kHz, 25 °C - 32 kHz Oscillator or external clock RAM - 96 x 4 bit, direct addressable ROM - 2048 x 16 bit metal mask programmable CPU - 4 bit RISC architecture - 2 clock cycles per instruction - 72 basic instructions Main Operating Modes and Resets - Active mode (CPU is running) - Standby mode (CPU in Halt) - Sleep mode (No clock, Reset State) - Initial reset on Power-On (POR) - External reset pin - Watchdog timer (time-out) reset - Oscillation detection watchdog reset - Reset with input combination on PortA 4-Bit Input PortA - Direct input read - Debounced or direct input selectable (reg.) - Interrupt request on input’s rising or falling edge, selectable by register. - Pull-down or Pull-up selectable by metal mask - Software test variables for conditional jumps - PA3 input for the event counter - Reset with input combination on PortA (metal option) 4-Bit Input/Output PortB - Separate input or output selection by register - Pull-up, Pull-down or none, selectable by metal mask if used as Input 4-Bit Input/Output PortD - Input or Output port as a whole port - Pull-up, Pull-down or none, selectable by metal mask if used as Input - CMOS or N-channel open drain mode - Serial Write Buffer clock and data output 4-Bit Input/Output PortE - Separate input or output selection by register - Pull-up, Pull-down or none, selectable by metal mask if used as Input Serial (output) Write Buffer - max. 256 bits long clocked with 16/8/2/1kHz - automatic send mode - interactive send mode : interrupt request when buffer is empty Buzzer Output - if used output on PB0 (24 pin) or PE0 (28 pin) - 3 tone buzzer - 1kHz, 2kHz, 2.66kHz/4kHz (TBC) Prescaler - 32kHz output possible on the STB/RST pin - 15 stage system clock divider down to 1 Hz - 3 interrupt requests: 1Hz/8Hz/32Hz - Prescaler reset (from 8kHz to 1Hz) 8-bit Timer / Event Counter - 8-bit auto-reload count-down timer - 6 different clocks from prescaler - or event counter from the PA3 input - parallel load - interrupt request when comes to 00 hex. Supply Voltage Level Detector - 3 software selectable levels (1.3V, 2.0V, 2.3V or user defined between 1.3V and 3.0V) - Busy flag during measure - Active only on request during measurement to reduce power consumption Interrupt Controller - Buzzer output on PB0 (24-pin) / PE0 (28-pin) 4-Bit Input/Output PortC - Input or Output port as a whole port - Debounced or direct input selectable (reg.) - Interrupt request on input’s rising or falling edge, selectable by register. - Pull-up, pull-down or none, selectable by metal mask if used as input - CMOS or N-channel open drain mode - 9 external interrupt sources: 4 from PortA, 4 from PortC. - 3 internal interrupt sources, prescaler, timer and Serial Write Buffer - Each interrupt request is individually selectable - Interrupt request flag is cleared automatically on register read Copyright © 2005, EM Microelectronic-Marin SA 2 www.emmicroelectronic.com R EM6607 Table of Contents 1 2 2.1 2.2 2.3 3 4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 5 5.1 6 7 7.1 7.2 7.3 7.4 7.5 8 8.1 9 9.1 PIN DESCRIPTION FOR EM6607 0H 5 7 7 7 7 1H 2H 3H 4H 18.7 OSCILLATOR 18.8 INPUT TIMING CHARACTERISTICS 56H 57H 43 43 44 58H OPERATING MODES ACTIVE MODE STANDBY MODE SLEEP MODE POWER SUPPLY 5H 19 20 PAD LOCATION DIAGRAM PACKAGE DIMENSIONS 59H 60H 45 47 47 47 61H 62H 8 9 9 9 10 10 10 11 11 6H 7H 8H 9H 10H 1H 12H 13H 21 ORDERING INFORMATION 21.1 PACKAGE MARKING 21.2 CUSTOMER MARKING RESET OSCILLATION DETECTION CIRCUIT RESET PIN INPUT PORT (PA0..PA3) RESET WATCHDOG TIMER RESET SOFTWARE POWER-ON-RESET CPU STATE AFTER RESET POR WITH POWER-CHECK RESET OSCILLATOR PRESCALER 14H 15H Table of Figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Architecture Pin Configuration Typical Configuration: VDD 1.4V up to 3.3V Typical Configuration: VDD 1.2V up to 1.8V Mode Transition Diagram System reset generation Port A Port B Port C Port D Port E Timer / Event Counter Interrupt Request generation Serial write buffer Automatic Serial Write Buffer transmission Interactive Serial Write Buffer transmission Dimensions of SOP24 Package SOIC Dimensions of TSSOP24 Package Dimensions of SOP28 Package SOIC Dimensions of TSSOP28 Package 69H 70H 71H 72H 73H 74H 75H 76H 7H 78H 79H 80H 81H 82H 12 12 12 16H WATCHDOG TIMER INPUT AND OUTPUT PORTS PORTA 17H 18H 13 13 14 19H 7.1.1 7.2.1 7.3.1 7.4.1 7.5.1 PortA registers 20H PORTB PortB registers 15 15 21H PORTC 2H 16 16 23H PortC registers 24H PORTD PortD registers 18 18 25H 1 1 6 6 7 9 14 15 17 18 19 21 24 27 28 29 45 45 46 46 63H 64H 65H 6H 67H 68H PORTE 26H 19 19 27H PortE registers 28H BUZZER BUZZER REGISTER 29H 20 20 21 22 30H 31H TIMER/EVENT COUNTER TIMER/COUNTER REGISTERS 32H 10 INTERRUPT CONTROLLER 10.1 INTERRUPT CONTROL REGISTERS 3H 23 23 34H 11 SUPPLY VOLTAGE LEVEL DETECTOR (SVLD) 25 26 28 29 35H 36H 37H 12 SERIAL WRITE BUFFER – SWB 12.1 SWB AUTOMATIC SEND MODE 12.2 SWB INTERACTIVE SEND MODE 13 14 15 STROBE / RESET OUTPUT 38H 30 39H TEST AT EM - ACTIVE SUPPLY CURRENT TEST30 METAL MASK OPTIONS 40H 31 32 32 32 41H 42H 43H 15.1.1 15.1.2 15.1.3 Power-Check Level Option PortA reset Option, see paragraph 3.3 SVLD levels Option, see paragraph 10.0 SVLD 4H 16 17 17.1 17.2 17.3 18 18.1 18.2 18.3 18.4 18.5 18.6 PERIPHERAL MEMORY MAP TEMPERATURE AND VOLTAGE BEHAVIOURS IDD CURRENT (TYPICAL) PULL-DOWN RESISTANCE (TYPICAL) OUTPUT CURRENTS (TYPICAL) 45H 46H 47H 48H 33 36 36 37 38 40 40 40 40 40 42 49H 50H 51H 52H 53H 54H ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS STANDARD OPERATING CONDITIONS HANDLING PROCEDURES DC CHARACTERISTICS - POWER SUPPLY PINS DC CHARACTERISTICS - INPUT/OUTPUT PINS DC CHARACTERISTICS - SUPPLY VOLTAGE DETECTOR LEVELS 5H 43 3 www.emmicroelectronic.com Copyright © 2005, EM Microelectronic-Marin SA R EM6607 Table of Tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Table 19. Table 20. Table 21. Table 22. Table 23. Table 24. Table 25. Table 26. Table 27. Table 28. Table 29. Table 30. Table 31. Table 32. Table 33. Table 34. Table 35. Table 36. Table 37. Table 38. Table 39. Table 40. Table 41. Table 42. Table 43. Table 44. Table 45. Table 46. Table 47. IntRq register 7 8 Watchdog register - WD Internal state in Active, Stand-by and Sleep mode 8 PortA Inputs RESET options (metal Hardware option) 10 10 Watchdog-Timer Option (software option) Software Power-On-Reset 10 Initial Value after RESET 11 12 Prescaler interrupts source Prescaler control register - PRESC 12 Watchdog register - WD 12 13 Input / Output Ports Overview Option register - Option 13 PortA input status register - PortA 14 14 PortA Interrupt request register - IRQpA PortA interrupt mask register - MportA 14 PortB input/output status register - PortB 15 15 PortB Input/Output control register - CIOportB Ports A&C Interrupt 16 PortC input/output register - PortC 16 PortC Interrupt request register - IRQpC 16 16 PortC interrupt mask register - MportC Option2 register - Option2 17 PortD Input/Output register - PortD 18 18 Ports control register - CPIOB PortE Input/Output status register - PortE 19 PortE Input/Output control register - CIOPortE 19 20