16-BIT DIGITAL-TO-ANALOG CONVERTER with 16-Bit Bus Interface

® DAC FPO 715 DAC715 DAC 715 16-BIT DIGITAL-TO-ANALOG CONVERTER with 16-Bit Bus Interface FEATURES q HIGH-SPEED 16-BIT PARALLEL DOUBLEBUFFERED INTERFACE q VOLTAGE OUTPUT: 0 to +10V q 13-, 14-, 15-BIT LINEARITY GRADES q 16-BIT MONOTONIC OVER TEMPERATURE (L GRADE) q POWER DISSIPATION: 600mW max q GAIN AND OFFSET ADJUST: Convenient for Auto-Cal D/A Converters q 28-LEAD DIP AND SOIC PACKAGES DESCRIPTION The DAC715 is a complete monolithic digital-toanalog converter including a +10V temperature compensated reference, current-to-voltage amplifier, 16-bit parallel interface that is double buffered, and an asynchronous clear function which immediately sets the output voltage to one-half of full-scale. The output voltage range is 0 to +10V while operating from ±12V or ±15V supplies. The gain and bipolar offset adjustments are designed so that they can be set via external potentiometers or external D/A converters. The output amplifier is protected against short circuit to ground. The 28-pin DAC715 is available in a 0.3" plastic DIP and wide-body plastic SOIC package. The DAC715P, U, PB, and UB are specified over the –40°C to +85°C temperature range while the DAC715PK, UK, PL, and UL are specified over the 0°C to +70°C range. D0 D15 A1 A0 WR CLR Input Latch 16 D/A Latch 16 Reference Circuit 16-Bit D/A Converter VOUT Gain Adjust VREF OUT +10V Offset Adjust International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111 Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 © 1995 Burr-Brown Corporation PDS-1306D Printed in U.S.A. July, 1997 SPECIFICATIONS ELECTRICAL At TA = +25°C, VCC = ±15V, and after a 10-minute warm-up, unless otherwise noted. DAC715P, U PARAMETER INPUT RESOLUTION DIGITAL INPUTS Input Code Logic Levels(1): VIH V IL IIH (V I = +2.7V) IIL (VI = +0.4V) TRANSFER CHARACTERISTICS ACCURACY Linearity Error TMIN to TMAX Differential Linearity Error TMIN to TMAX Monotonicity Over Temp Gain Error(3) TMIN to TMAX Offset Error(3) TMIN to TMAX Power Supply Sensitivity Of Full Scale DYNAMIC PERFORMANCE Settling Time (to ±0.003%FSR, 5kΩ ll 500pF Load)(4) 10V Output Step 1 LSB Output Step(5) Output Slew Rate Total Harmonic Distortion + Noise 0dB, 1001Hz, fS = 100kHz –20dB, 1001Hz, fS = 100kHz –60dB, 1001Hz, fS = 100kHz SINAD 1001Hz, fS = 100kHz Digital Feedthrough(5) Digital-to-Analog Glitch Impulse(5) Output Noise Voltage (includes Reference) ANALOG OUTPUT Output Voltage Range +VCC, –VCC = ±11.4V Output Current Output Impedance Short Circuit to ACOM Duration REFERENCE VOLTAGE Voltage TMIN to TMAX Output Resistance Source Current Short Circuit to ACOM, Duration POWER SUPPLY REQUIREMENTS Voltage: +VCC –VCC Current (no load, ±15V Supplies) +VCC –VCC Power Dissipation TEMPERATURE RANGE Specification All Grades Storage Thermal Resistance θJA DIP Package SOIC Package –40 –60 75 75 +85 +150 T T T T T T 0 T T T +70 T T T T T T T ±4 ±8 ±4 ±8 13 ±0.1 ±0.2 ±0.1 ±0.2 ±0.003 ±30 14 ±2 ±4 ±2 ±4 ±0.1 ±0.15 T T T T 15 T T T T T T ±2 ±2 ±2 ±2 16 T T T T T T ±2 ±2 ±1 ±1 LSB LSB LSB LSB Bits % % % FSR(2) % FSR % FSR/%VCC PPM FSR/%VCC 16 Binary Two’s Complement +2.0 +VCC – 1.4 0 +0.8 ±10 ±10 T T T T T T T T T T T T T T T T T T T T T T T V V µA µA T Bits MIN TYP MAX MIN DAC715PB, UB TYP MAX MIN DAC715PK, UK TYP MAX MIN DAC715PL, UL TYP MAX UNITS 6 4 10 0.005 0.03 3.0 87 2 15 120 10 T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T µs µs V/µs % % % dB nV-s nV-s nV√Hz 0 to +10 ±5 0.1 Indefinite +9.975 +9.960 2 Indefinite +11.4 –16.5 +15 –15 13 22 525 +16.5 –11.4 15 25 600 +10.000 1 +10.025 +10.040 T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T T V mA Ω V V Ω mA V V mA mA mW °C °C °C/W °C/W T Specifications are the same as grade to the left. NOTES: (1) Digital inputs are TTL and +5V CMOS compatible over the specification temperature range. (2) FSR means Full Scale Range. For example, for a 0 to +10V output, FSR = 10V. (3) Errors externally adjustable to zero. (4) Maximum represents greater than the 3σ limit. Not 100% tested for this parameter. (5) For the worst case code changes: FFFFH to 0000H and 0000H to FFFFH. These are Binary Two’s Complement (BTC) codes. (6) Typical supply voltages times maximum currents. ® DAC715 2 ABSOLUTE MAXIMUM RATINGS(1) +VCC to COMMON ...................................................................... 0V, +17V –VCC to COMMON ...................................................................... 0V, –17V +VCC to –VCC ........................................................................................................................... 34V Digital Inputs to COMMON ..................................................... –1V to +VCC External Voltage Applied to BPO and Range Resistors ..................... ±VCC VREF OUT ...................................................... Indefinite Short to COMMON VOUT ............................................................ Indefinite Short to COMMON Power Dissipation .......................................................................... 750mW Storage Temperature ...................................................... –60°C to +150°C Lead Temperature (soldering, 10s) ................................................ +300°C NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability. TIMING DIAGRAM tAW A0, A1 tAH tDW D0-D15 tDH WR tWP PACKAGE INFORMATION PRODUCT DAC715P DAC715U DAC715PB DAC715UB DAC715PK DAC715UK DAC715PL DAC715UL PACKAGE Plastic DIP Plastic SOIC Plastic DIP Plastic SOIC Plastic DIP Plastic SOIC Plastic DIP Plastic SOIC PACKAGE DRAWING NUMBER(1) 246 217 246 217 246 217 246 217 TIMING SPECIFICATIONS TA = –40°C to +85°C, +VCC = +12V or +15V, –VCC = –12V or –15V. SYMBOL tDW tAW tAH tDH tWP(1) tCP PARAMETER Data Valid to End of WR A0, A1 Valid to End of WR A0, A1 Hold after End of WR Data Hold after end of WR Write Pulse Width CLEAR Pulse Width MIN 50 50 10 10 50 200 MAX UNITS ns ns ns ns ns ns NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. NOTES: (1) For single-buffered operation, tWP is 80ns min. Refer to page 10. TRUTH TABLE ORDERING INFORMATION DIFFERENTIAL LINEARITY ERROR MAX at +25°C ±4LSB ±4LSB ±2LSB ±2LSB ±2LSB ±2LSB ±1LSB ±1LSB A0 0 1 1 0 X X A1 1 0 1 0 X X WR 1→0→1 1→0→1 1→0→1 0 1 X CLR 1 1 1 1 1 0 DESCRIPTION Load Input Latch Load D/A Latch No Change Latches Transparent No Change Reset D/A Latch PRODUCT DAC715P DAC715U DAC715PB DAC715UB DAC715PK DAC715UK DAC715PL DAC715UL PACKAGE Plastic DIP Plastic SOIC Plastic DIP Plastic SOIC Plastic DIP Plastic SOIC Plastic DIP Plastic SOIC TEMPERATURE RANGE –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C 0°C to 70°C 0°C to 70°C 0°C to 70°C 0°C to 70°C ELECTROSTATIC DISCHARGE SENSITIVITY Electrostatic discharge can cause damage ranging from performance degradation to complete device failure. Burr-Brown Corporation recommends that all integrated circuits be handled and stored using appropriate ESD protection methods. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet published specifications. The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems. ® 3 DAC715 PIN CONFIGURATION PIN DESCRIPTIONS PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 LABEL DCOM ACOM VOUT Offset Adjust VREF OUT Gain Adjust +VCC –VCC CLR WR A1 A0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 DESCRIPTION Digital Ground Analog Ground 0 to +10V D/A Output Offset Adjust Voltage Reference Output Gain Adjust +12V to +15V Supply –12V to –15V Supply CLEAR. Sets D/A output to Half Scale (Active Low) Write (Active Low) Enable for D/A latch (Active Low) Enable for Input latch (Active Low) Data Bit 15 (Most Significant Bit) Data Bit 14 Data Bit 13 Data Bit 12 Data Bit 11 Data Bit 10 Data Bit 9 Data Bit 8 Data Bit 7 Data Bit 6 Data Bit 5 Data Bit 4 Data Bit 3 Data Bit 2 Data Bit 1 Data Bit 0 (Least Significant Bit) DCOM ACOM VOUT Offset Adjust VREF OUT Gain Adjust +VCC –VCC CLR WR A1 A0 D15 (MSB) D14 1 2 3 4 5 6 7 DAC715 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 D0 (LSB) D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 ® DAC715 4 TYPICAL PERFORMANCE CURVES At TA = +25°C, and VCC = ±15V, unless otherwise noted. [Change in FSR]/[Change in Supply Voltage] (ppm of FSR/ %) POWER SUPPLY REJECTION vs POWER SUPPLY RIPPLE FREQUENCY 1k 2.0 LOGIC vs V LEVEL –VCC I Digital Input (µA) 100 +VCC 10 1.0 WR, A0, A1 CLR 0 DATA –1.0 1 0.1 10 100 1k 10k 100k 1M Frequency (Hz) –2.0 –0.85 0 0.85 1.7 2.55 3.4 4.25 5.1 5.95 6.8 V Digital Input FULL-SCALE OUTPUT SWING 2500 2000 1500 SETTLIN