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CR80P200
8-Bit Microcontroller
DATA SHEET
=========CR80P200=========
Crescenic Technology Corporation All rights reserved .
FR18005A 1
2002/12/27/Vr. 0.2/All rights reserved.
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CR80P200
Caution!
The information in this document is subject to change without notice and does not represent a commitment on part of the vendor, who assumes no liability or responsibility for any errors that may appear in this data sheet. No warranty or representation, either expressed or implied, is made with respect to the quality, accuracy, or fitness for any particular part of this document. In no event shall the manufacturer be liable for direct, indirect, special, incidental or consequential damages arising from any defect or error in this data sheet or product. Product names appearing in this data sheet are for identification purpose only, and trademarks and product names or brand names appearing in this document are property of their respective owners. This data sheet contains materials protected under International Copyright Laws. All rights reserved. No part of this data sheet may be reproduced, transmitted, or transcribed without the expressed written permission of the manufacturer and authors of this data sheet.
FR18005A 2
2002/12/27/Vr. 0.2/All rights reserved.
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CR80P200
CR80P200 Data Sheet Table of Contents
Item
Page
1. General Description................................................................................................4 1.1 Device options included in this data sheet............................................................4 1.2 Features ............................................................................................................4 2. Pins Assignment.....................................................................................................5 2.1 Pins Description ................................................................................................7 3. Block Diagram of Structure.....................................................................................9 4. Memory Mapping ..................................................................................................9 4.1 Special Register&Internal RAM .........................................................................9 5. Function Control Registers ......................................................................................11 5.1 Special Function Control Registers......................................................................11 5.2 Implicit Function Control Registers.....................................................................12 5.3 Program Memory and Reset&Interrupt Vectors....................................................13 6. Program Memory Map and Stack............................................................................14 6.1 Special Registers ...............................................................................................14 6.2 Implicit Registers...............................................................................................22 7. Absolute Maximum Ratings ....................................................................................27 8. Electrical Characteristics .........................................................................................28 9. Instruction Set........................................................................................................30 10. Special Register Condition ....................................................................................33 11. Oscillator Configurations .......................................................................................34 Annex 1 ....................................................................................................................35 Interrupt Function ...................................................................................................35 Watchdog Timer .....................................................................................................36 Clear Interrupt Flag.................................................................................................36 Instruction Cycle.....................................................................................................36 Start-up Vector........................................................................................................36 Configuration Byte (code options)............................................................................36 Setting for boosting wake-up speed from sleep ..........................................................37 Bonding Option......................................................................................................37 Annex 2 ....................................................................................................................39 Package type available ............................................................................................39
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2002/12/27/Vr. 0.2/All rights reserved.
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CR80P200
1. General Description
The CR80P200 is an EPROM microcontroller with 8 bits, which takes advantage of a thorough CMOS technology improved with low cost, high speed, and high noise immunity. Preferably, integrated into this single chip are a Watchdog Timer, a RAM, an EPROM, a tri-state I/O port, a power-down mode, and a real time programmable clock/counter. CR80P200 works with 48 instructions, wherein all of them are single instruction cycles except that the program branches take 2 cycles. 1.1 Device options included in this data sheet: CR80P200A CR80P200B CR80P200D CR80P200E 1.2 Features l Full CMOS static design. l Very flexible 4 comparators application l Better noise immunity l Additional instructions BCTR and BRTC for easy use of transferring between Carry bit and Register bit l Operating voltage range: 2.3V to 5.5V (without using comparator mode application) 3.0 V to 5.5 V (with using comparator mode application) l Operating temperature ranging from 0¢J~70¢J l Operating frequency at 0 up to 20M Hz, Vdd = 5 V, in a high frequency crystal mode; (An additional product operating at a higher frequency is provided for customers to choose; please contact our local sales for said specification if necessary.) l 8-bit data bus l Internal EPROM with 2K words in size l 72-byte internal RAM with Bank control l 16 special purpose registers l Both 22 general purpose I/O pins and 1 counter input pin for I/O pins l 5-level stacks of a program counter l Four types of event vectors, including 3 interrupt vectors and 1 reset vector l Three interrupt sources:
FR18005A 4
2002/12/27/Vr. 0.2/All rights reserved.
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CR80P200
a Port A interrupt a Timer/counter interrupt and a Watchdog timer timeout interrupt l Bonding options: n Multiple Vref. comparator or single Vref. Comparator n Parallel programming or serial programming lConfigure options: -- 4 oscillator types selected by code option: RC -- RC oscillator LFXT -- Low frequency crystal oscillator XTAL -- Crystal oscillator HFXT -- High frequency crystal oscillator -- 4 oscillator start-up time selected by code option: 172µs, 22ms, 44ms, and 88ms --Watchdog timer: enabled, disabled, and disabled during sleep, selected by code option Serial programming needs only 5 pins (Vdd, Vss, CNTI, PA0, PA1) to program EPROM and configurations. It is suitable for on-board programming or packages with fewer pins.
2. Pins Assignment
The package patterns of CR80P200, corresponding to the programming mode for EPROM and the reference voltage of comparators, are respectively divided as follows: CR80P200A for single Vref. in parallel programming mode CR80P200B for multiple Vref. in parallel programming mode CR80P200D for single Vref. in serial programming mode CR80P200E for multiple Vref. in serial programming mode Illustrated as below are the package patterns mentioned above and said pins configuration.
FR18005A 5
2002/12/27/Vr. 0.2/All rights reserved.
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CR80P200
1. CR80P200BN28/CR80P200EN28 (for 28-pin package) SOP, SSOP, PDIP, and Skinny PDIP CNTI VDD PB5 VSS PB4 Vref0/PB0 Vref1/PB1 Vref2/PB2 Vref3/PB3 CMP0/PAI0/PA0 CMP1/PAI1/PA1 CMP2/PAI2/PA2 CMP3/PAI3/PA3 PAI4/PA4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 /ERST OSC1 OSC2 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 PA7/PAI7 PA6/PAI6 PA5/PAI5
2. CR80P200AN28/CR80P200DN28 (for 28-pin package) SOP, SSOP, PDIP, and Skinny PDIP CNTI VDD PB5 VSS PB4 Vref0/PB0 PB1 PB2 PB3 CMP0/PAI0/PA0 CMP1/PAI1/PA1 CMP2/PAI2/PA2 CMP3/PAI3/PA3 PAI4/PA4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 /ERST OSC1 OSC2 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 PA7/PAI7 PA6/PAI6 PA5/PAI5
FR18005A 6
2002/12/27/Vr. 0.2/All rights reserved.
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CR80P200
2.1 Pins Description 2.1.1 CR80P200BN28/CR80P200EN28 (for 28-pin package) Name PA0/CMP0/PAI0 PA1/CMP1/PAI1 PA2/CMP2/PAI2 PA3/CMP3/PAI3 PA4/PAI4 PA5/PAI5 PA6/PAI6 PA7/PAI7 PB0/VREF0 PB1/VREF1 PB2/VREF2 PB3/VREF3 PB4 PB5 PC0 PC1 PC2 PC3 PC4 PC5 PC6 PC7 CNTI No. I/O Type Input Level Description 10 I/O TTL PA0 - - PA3 are bi-directional I/O ports. CMP0- -CMP3 are comparator inputs. 11 I/O TTL PAI0 - - PAI3 are port A interrupt inputs. 12 I/O TTL 13 I/O TTL 14 I/O TTL PA4 - - PA7 are bi-directional I/O ports. PAI4 - - PAI7 are port A interrupt inputs. 15 I/O TTL 16 I/O TTL 17 I/O TTL 6 I/O TTL PB0 - - PB5 are bi-directional I/O ports. Vref0 - - Vref3 are comparator reference 7 I/O TTL inputs. 8 I/O TTL 9 I/O TTL 5 I/O TTL 3 I/O TTL 18 I/O TTL PC0 - - PC7 are bi-directional I/O ports. 19 I/O TTL 20 I/O TTL 21 I/O TTL 22 I/O TTL 23 I/O TTL 24 I/O TTL 25 I/O TTL 1 I Schmitt Trigger A clock input to TCR; in order to avoid the leakage current, this pin must be tied to pullhigh or pull-low. 28 I Schmitt Trigger An external reset input pin; this pin is an active-low reset to t
