www.DataSheet4U.com
PROCESS
Small Signal Transistor
PNP - High Current Transistor Chip
CP705
Central
TM
Semiconductor Corp.
PROCESS DETAILS Process Die Size Die Thickness Base Bonding Pad Area Emitter Bonding Pad Area Top Side Metalization Back Side Metalization GEOMETRY GROSS DIE PER 4 INCH WAFER 11,300 PRINCIPAL DEVICE TYPES 2N4033 CMPT4033 CXT4033 CZT4033 EPITAXIAL PLANAR 31 x 31 MILS 9.0 MILS 5.9 x 11.8 MILS 6.5 x 13.8 MILS Al - 30,000Å Au - 18,000Å
BACKSIDE COLLECTOR
145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com
R2 (1-August 2002)
www.DataSheet4U.com
Central
TM
PROCESS
CP705
Semiconductor Corp.
Typical Electrical Characteristics
145 Adams Avenue Hauppauge, NY 11788 USA Tel: (631) 435-1110 Fax: (631) 435-1824 www.centralsemi.com
R2 (1-August 2002)
