DTMF Codec

CMX865A Telecom Signalling Device D/865A/3 February 2007 Provisional Issue CMX865A – DTMF CODEC AND TELECOM SIGNALLING COMBO Features • V.23 1200/75, 1200/1200, 75, 1200 bps FSK • Bell 202 1200/150, 1200/1200, 150, 1200 bps FSK • V.21 or Bell 103 300/300 bps FSK • Low Voice Falsing DTMF Decoder • DTMF/Tones Transmit and Receive • Low Power - High Performance Applications • Wireless Local Loops • SMS Phones • Security Systems • Remote Utility Meter Reading • Industrial Control Systems • Pay-Phones • Set-Top Boxes CMX865A TX USART FSK MODULATOR www.DataSheet4U.com TONE / DTMF GENERATOR RX USART FSK RECEIVER TONE / DTMF DETECTOR LINE LINE INTERFACE C-BUS SERIAL INTERFACE HOST µC 1. Brief Description The CMX865A is a multi-standard modem for use in Wireless Local Loop, Short Message Service telephone based information and telemetry systems. Flexible line driver, hybrid and receiver circuits are integrated on chip, requiring only passive external components to build a 2 or 4-wire line interface. A high-quality DTMF decoder with excellent immunity to falsing on voice and a standard DTMF encoder are included. Alternatively, these blocks can be used to transmit and detect user-specific, programmed single and dual-tone signals, simple melodies, call progress signals or modem calling and answering tones. Host control and data transfer is via a high-speed serial bus that operates in normal and Powersave modes and which is compatible with most simple types of µC serial interface. An embedded USART allows multi-format asynchronous data and unformatted synchronous data to be received or transmitted as 8-bit bytes. The CMX865A operates from a single 3.0V to 3.6V supply over a temperature range of -40°C to +85°C and is available in 16-pin SOIC (D4) and 16-pin TSSOP (E4) packages. © 2007 CML Microsystems Plc Telecom Signalling Device CMX865A CONTENTS Section 1. 2. 3. 4. Brief Description ..................................................................................... 1 Block Diagram ......................................................................................... 3 Signal List ................................................................................................ 4 External Components............................................................................. 5 4.1. Line Interface (DAA) .................................................................... 6 4.1.1. 2-Wire Line Interface....................................................... 6 4.1.2. 4-Wire Line Interface....................................................... 7 4.1.3. Wireless Local Loop Interface ........................................ 8 General Description................................................................................ 9 5.1. Tx USART .................................................................................. 10 5.2. FSK Modulator ........................................................................... 11 5.3. Tx Filter and Equaliser ............................................................... 11 5.4. DTMF/Tone Generator............................................................... 11 5.5. Tx Level Control and Output Buffer ........................................... 11 5.6. Rx DTMF/Tones Detectors ........................................................ 12 5.7. Rx Modem Filtering and Demodulation ..................................... 13 5.8. Rx Modem Pattern Detectors .................................................... 14 5.9. Rx Data Register and USART ................................................... 14 5.10. C-BUS Interface......................................................................... 15 5.10.1. General Reset Command ............................................. 17 www.DataSheet4U.com 5.10.2. General Control Register .............................................. 17 5.10.3. Transmit Mode Register ............................................... 19 5.10.4. Receive Mode Register ................................................ 22 5.10.5. Tx Data Register ........................................................... 24 5.10.6. Rx Data Register........................................................... 24 5.10.7. Status Register ............................................................. 25 5.10.8. Programming Register .................................................. 28 Application Notes ................................................................................. 31 Performance Specification................................................................... 32 7.1. Electrical Performance............................................................... 32 7.1.1. Absolute Maximum Ratings .......................................... 32 7.1.2. Operating Limits............................................................ 32 7.1.3. Operating Characteristics ............................................. 33 7.2. Packaging .................................................................................. 40 Page 5. 6. 7. Table Page Table 1 Status Register ................................................................................................................ 25 Table 2 Received DTMF Code: Status Register b3-0 .................................................................. 27 Table 3 Programming Register: Filter Coefficients ....................................................................... 30 It is always recommended that you check for the latest product datasheet version from the Datasheets page of the CML website: [www.cmlmicro.com]. © 2007 CML Microsystems Plc 2 D/865A/3 2. Telecom Signalling Device © 2007 CML Microsystems Plc Tx Output Buffer TXA TXAN Tx Level Control LOCAL ANALOGUE LOOPBACK FSK DEMODULATOR Block Diagram IRQN DTMF/TONE GENERATOR FSK MODULATOR TRANSMIT FILTER & EQUALISER SERIAL CLOCK COMMAND DATA CSN RECEIVE MODEM FILTER & EQUALISER REPLY DATA Rx Gain Control VBIAS + RXAN RXAFB Rx Input Amplifier Figure 1 Block Diagram MODEM ENERGY DETECTOR www.DataSheet4U.com 3 DTMF/TONE/ CALL PROG/ ANSWER TONE DETECTOR Xtal Osc and Clock Dividers XTALN VBIAS VDD VDEC XTAL / CLOCK VSSD VSSA CMX865A D/865A/3 Telecom Signalling Device CMX865A 3. Signal List CMX865A (D4 and E4) Pin No. 1 Signal Name VDEC Type Power Internally generated 2.5V supply voltage. Must be decoupled to VSSD by capacitors mounted close to the device pins. No other connections allowed. The output of the on-chip Xtal oscillator inverter. The input to the oscillator inverter from the Xtal circuit or external clock source. A ‘wire-ORable’ output for connection to a µC Interrupt Request input. This output is pulled down to VSS when active and is high impedance when inactive. An external pull-up resistor is required i.e. R1 of Figure 2. The digital negative supply rail (ground). The analogue negative supply rail (ground). The inverting input to the Rx Input Amplifier The output of the Rx Input Amplifier. www.DataSheet4U.com Description 2 3 4 XTALN XTAL/CLOCK IRQN O/P I/P O/P 5 6 7 8 9 VSSD VSSA RXAN RXAFB VBIAS Power Power I/P O/P O/P 10 11 12 13 14 15 16 TXAN TXA VDD CSN COMMAND DATA SERIAL CLOCK REPLY DATA O/P O/P Power I/P I/P I/P T/S Internally generated bias voltage of approximately VDD /2, except when the device is in ‘Powersave’ mode when VBIAS will discharge to VSS. Should be decoupled to VSS by a capacitor mounted close to the device pins. The inverted output of the Tx Output Buffer. The non-inverted output of the Tx Output Buffer. The positive supply rail. Levels and thresholds within the device are proportional to this voltage. The C-BUS chip select input from the µC. The C-BUS serial data input from the µC. The C-BUS serial clock input from the µC. A 3-state C-BUS serial data output to the µC. This output is high impedance when not sending data to the µC. Notes: I/P O/P BI T/S NC = = = = = Input Output Bidirectional 3-state Output No Connection © 2007 CML Microsystems Plc 4 D/865A/3 Telecom Signalling Device CMX865A 4. VDD External Components VDEC 1 XTALN 2 X1 XTAL 3 16 REPLY DATA SERIAL CLOCK 15 COMMAND DATA 14 CMX865A CSN IRQN 4 13 5 6 RXAN Rx Line Interface RXFB 7 8 12 11 TXA TXAN 10 V 9 BIAS VDD Tx Line Interface C3 VSSA + VDEC C7 VSSD R1 X1 C1 R1 VSSD C2 C-BUS to/from µC VSSD VSSA C6 + C5 VDD C4 VSSA Ground plane connection VSSA VSSD VSSD VSSA 68kΩ 6.144MHz (+ 300ppm) www.DataSheet4U.com C1, C2 C3, C4, C7 C5, C6 22pF 100nF 10uF Resistors ±5%, capacitors ±20% unless otherwise stated. Figure 2 Recommended External Components for a Typical Application This device is capable of detecting and decoding small amplitude signals. To achieve this, VDD, VDEC and VBIAS should be decoupled close to the package and the receive path protected from extraneous in-band signals. It is recommended that the printed circuit board is laid out with low impedance analogue and digital ground planes. The analogue ground plane should be a solid area under the analogue section of the device defined by pins 6 – 11, plus associated external components. The digital ground plane should be a solid area under the digital section of the device defined by pins 1 – 5 and 13 –16, plus associated external components. The two ground planes should be connected together at a suitable point and connected into the board ground. The VSS connections to the Xtal oscillator capacitors C1 and C2 should also be low impedance and preferably be part of the digital VSS ground plane to ensure reliable start up of the oscillator. For best results, an Xtal oscillator design should drive the clock inverter input with signal levels of at least 40% of VDD peak-to-peak. To obtain Xtal oscillator design assistance, please consult your Xtal manufacturer. © 2007 CML Microsystems Plc 5 D/865A/3 Telecom Signalling Device CMX865A 4.1. Line Interface (DAA) A line interface circuit is needed to provide dc isolation and