HIGH-SPEED CMOS LOGIC ANALOG MULTIPLEXER/DEMULTIPLEXER

CD74HCT4051 Q1 HIGH SPEED CMOS LOGIC ANALOG MULTIPLEXER/DEMULTIPLEXER SCLS569A − JANUARY 2004 − FEBRUARY 2004 D Qualification in Accordance With D D D D D D D D AEC-Q100† Qualified for Automotive Applications Customer-Specific Configuration Control Can Be Supported Along With Major-Change Approval Wide Analog Input Voltage Range: +5 V Max Low ON Resistance − 70 W Typical (VCC − VEE = 4.5 V) − 40 W Typical (VCC − VEE = 9 V) Low Crosstalk Between Switches Fast Switching and Propagation Speeds Break-Before-Make Switching Wide Operating Temperature Range: −405C to 1255C D Operation Control Voltage: 4.5 V to 5.5 V D Switch Voltage: 0 V to 10 V D Direct LSTTL Input Logic Compatibility: D VIL = 0.8 V Max, VIH = 2 V Min CMOS Input Compatibility: II v 1 mA at VOL, VOH M PACKAGE (TOP VIEW) † Contact factory for details. Q100 qualification data available on request. A4 A6 COM OUT/IN A A7 A5 E VEE GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC A2 A1 A0 A3 S0 S1 S2 description/ordering information This device is a digitally controlled analog switch that utilizes silicon-gate CMOS technology to achieve operating speeds similar to LSTTL, with the low power consumption of standard CMOS integrated circuits. www.DataSheet4U.com This analog multiplexer/demultiplexer controls analog voltages that may vary across the voltage supply range (i.e., VCC to VEE ). It is a bidirectional switch that allows any analog input to be used as an output and vice-versa. The switch has low ON resistance and low OFF leakages. In addition, this device has an enable control that, when high, disables all switches to their OFF state. ORDERING INFORMATION TA PACKAGE‡ ORDERABLE PART NUMBER§ TOP-SIDE MARKING −40°C to 125°C SOIC − M Reel of 2500 CD74HCT4051QM96Q1 HCT4051Q ‡ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. § The suffix 96 denotes tape and reel. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright  2004, Texas Instruments Incorporated POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SCLS569A − JANUARY 2004 − FEBRUARY 2004 CD74HCT4051 Q1 HIGH SPEED CMOS LOGIC ANALOG MULTIPLEXER/DEMULTIPLEXER FUNCTION TABLE INPUTS ENABLE L L L L L L L L H X = Don’t care S2 L L L L H H H H X S1 L L H H L L H H X S0 L H L H L H L H X ON CHANNELS A0 A1 A2 A3 A4 A5 A6 A7 None logic diagram (positive logic) Channel In/Out VCC 16 4 A7 2 A6 5 A5 1 A4 A3 A2 A1 A0 12 15 14 13 TG TG S0 11 TG Address Select S1 10 Logic Level Conversion S2 9 Binary to 1 of 8 Decoder With Enable TG 3 TG COM OUT/IN A TG TG E 8 TG 8 GND VCC 7 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 CD74HCT4051 Q1 HIGH SPEED CMOS LOGIC ANALOG MULTIPLEXER/DEMULTIPLEXER SCLS569A − JANUARY 2004 − FEBRUARY 2004 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range: VCC − VEE (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 10.5 V VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to +7 V VEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to −7 V Input clamp current, IIK (VI < −0.5 V or VI > VCC + 0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < VEE − 0.5 V or VO > VCC + 0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Switch current (VI > VEE − 0.5 V or VI < VCC + 0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA VEE current, IEE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA Package thermal impedance, θJA (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W Maximum junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C Lead temperature (during soldering): At distance 1/16 ± 1/32 inch (1,59 ± 0,79 mm) from case for 10 s max . . . . . . . . . . . . . . . . . . . . . . . 300°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltages referenced to GND unless otherwise specified. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 3) MIN VCC VEE VIH VIL VI VIS tt Supply voltage Supply voltage, VCC − VEE (see Figure 1) Supply voltage (see Note 4 and Figure 2) High-level input voltage Low-level input voltage Input control voltage Analog switch I/O voltage Input transition (rise and fall) time VCC = 4.5 V 0 VEE 0 4.5 2 0 2 0.8 VCC VCC 500 MAX 5.5 10 −6 UNIT V V V V V V V ns TA Operating free-air temperature −40 125 °C NOTES: 3. All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 4. In certain applications, the external load resistor current may include both VCC and signal-line components. To avoid drawing VCC current when switch current flows into the transmission gate inputs, the voltage drop across the bidirectional switch must not exceed 0.6 V (calculated from ron values shown in electrical characteristics table). No VCC current flows through RL if the switch current flows into the COM OUT/IN A terminal. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SCLS569A − JANUARY 2004 − FEBRUARY 2004 CD74HCT4051 Q1 HIGH SPEED CMOS LOGIC ANALOG MULTIPLEXER/DEMULTIPLEXER recommended operating area as a function of supply voltages 8 8 (VCC – GND) – V 6 HCT 4 HC (VCC – GND) – V 6 HCT 4 HC 2 2 0 0 2 4 6 8 10 12 0 0 −2 −4 −6 −8 (VCC – VEE) – V (VEE – GND) – V Figure 1 Figure 2 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VEE 0V ron IO = 1 mA, VI = VIH or VIL, See Figure 9 VIS = VCC or VEE VIS = VCC to VEE −4.5 V 0V −4.5 V 0V Between any two channels For switch OFF: When VIS = VCC, VOS = VEE; When VIS = VEE, VOS = VCC For switch ON: All applicable combinations of VIS and VOS voltage levels, VI = VIH or VIL VI = VCC or GND IO = 0, VI = VCC or GND Control input When VIS = VEE, VOS = VCC When VIS = VCC, VOS = VEE 0V −4.5 V −4.5 V 0V VCC MIN 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 6V TA = 25°C TYP 70 40 90 45 10 5 ±0.2 ±2 A µA −5 V 5V 5.5 V 5.5 V 5.5 V 4.5 V to 5.5 V ±0.4 ±0.1 8 16 ±4 ±1 160 A µA 320 µA µA MAX 160 120 180 130 TA = −40°C TO 125°C MIN MAX 240 180 270 195 Ω Ω UNIT ∆ron IIZ IIL ICC ∆ICC Per input pin: 1 unit load, See Note 5, VIN = VCC − 2.1 V 100 360 490 NOTE 5: For dual-supply systems, theoretical worst case (VI = 2.4 V, VCC = 5.5 V) specification is 1.8 mA. HCT input loading TYPE INPUT UNIT LOADS† 4051 All 0.5 † Unit load is ∆ICC limit specified in the electrical characteristics table, e.g., 360 µA max at 25°C. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 CD74HCT4051 Q1 HIGH SPEED CMOS LOGIC ANALOG MULTIPLEXER/DEMULTIPLEXER SCLS569A − JANUARY 2004 − FEBRUARY 2004 switching characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Figure 8) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE CL = 15 pF tpd IN OUT CL = 50 pF CL = 50 pF CL = 15 pF ten S or E OUT CL = 50 pF CL = 50 pF CL = 15 pF tdis CI S or E Control OUT CL = 50 pF CL = 50 pF 0V −4.5 V 0V −4.5 V 0V −4.5 V VEE VCC MIN 5V 4.5 V 4.5 V 5V 4.5 V 4.5 V 5V 4.5 V 4.5 V 19 45 32 10 68 48 10 pF ns 23 55 39 83 59 ns TA = 25°C TYP 4 12 8 18 12 ns MAX TA = −40°C TO 125°C MIN MAX UNIT operating characteristics, VCC = 5 V, TA = 25°C, input tr, tf = 6 ns PARAMETER Cpd Power dissipation capacitance (see Note 6) NOTE 6: Cpd is used to determine the dynamic power consumption (PD), per package. PD = (Cpd × VCC2 × fI) + Σ (CL + CS) VCC2 × fO fO = output frequency fI = input frequency CL = output load capacitance CS = switch capacitance VCC = supply voltage TYP 52 UNIT pF analog channel characteristics, TA = 25°C PARAMETER CI CCOM fmax Switch input capacitance Common output capacitance Minimum switch frequency response at −3 dB Sine-wave distortion E or address select (S0, S1, S2) to switch feedthrough noise Switch OFF signal feedthrough See Figure 3 and Figure 10 and Notes 7 and 8 See Figure 5 See Figure 6 and Notes 8 and 9 See Figure 7 and Figure 11 and Notes 8 and 9 −2.25 V −4.5 V −2.25 V −4.5 V −2.25 V −4.5 V −2.25 V −4.5 V 2.25 V 4.5 V 2.25 V 4.5 V 2.25 V 4.5 V 2.25 V 4.5 V TEST CONDITIONS VEE