(CA3028 / CA3053) Differential/Cascode Amplifiers

www.DataSheet4U.com SEMICONDUCTOR CA3028A, CA3028B, CA3053 Differential/Cascode Amplifiers for Commercial and Industrial Equipment from DC to 120MHz Description The CA3028A and CA3028B are differential/cascode amplifiers designed for use in communications and industrial equipment operating at frequencies from DC to 120MHz. The CA3028B is like the CA3028A but is capable of premium performance particularly in critical DC and differential amplifier applications requiring tight controls for input offset voltage, input offset current, and input bias current. The CA3053 is similar to the CA3028A and CA3028B but is recommended for IF amplifier applications. November 1996 Features • Controlled for Input Offset Voltage, Input Offset Current and Input Bias Current (CA3028 Series Only) • Balanced Differential Amplifier Configuration with Controlled Constant Current Source • Single-Ended and Dual-Ended Operation Applications • RF and IF Amplifiers (Differential or Cascode) • DC, Audio and Sense Amplifiers • Converter in the Commercial FM Band • Oscillator • Mixer • Limiter • Related Literature - Application Note AN5337 “Application of the CA3028 Integrated Circuit Amplifier in the HF and VHF Ranges.” This note covers characteristics of different operating modes, noise performance, mixer, limiter, and amplifier design considerations Ordering Information PART NUMBER (BRAND) CA3028A CA3028AE CA3028AM (3028A) CA3028AM96 (3028A) CA3028B CA3028BE CA3028BM (3028B) CA3053 CA3053E TEMP. RANGE (oC) -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 PACKAGE 8 Pin Metal Can 8 Ld PDIP 8 Ld SOIC 8 Ld SOIC Tape and Reel 8 Pin Metal Can 8 Ld PDIP 8 Ld SOIC 8 Pin Metal Can 8 Ld PDIP PKG. NO. T8.C E8.3 M8.15 M8.15 T8.C E8.3 M8.15 T8.C E8.3 Pinouts CA3028A/B, CA3053 (METAL CAN) TOP VIEW 8 1 7 Schematic Diagram CA3028A/B, (PDIP, SOIC) CA3053 (PDIP) TOP VIEW (Terminal Numbers Apply to All Packages) 8 6 1 2 8 7 6 5 1 7 2 R1 5kΩ Q1 Q2 5 2 – + 3 4 5 6 3 4 Q3 R2 2.8kΩ 4 R3 500Ω 3 SUBSTRATE AND CASE CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © Harris Corporation 1996 File Number 382.3 7-6 CA3028A, CA3028B, CA3053 Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Thermal Information Thermal Resistance (Typical, Note 1) θJA (oC/W) θJC (oC/W) Metal Can Package . . . . . . . . . . . . . . . 225 140 PDIP Package . . . . . . . . . . . . . . . . . . . 155 N/A SOIC Package . . . . . . . . . . . . . . . . . . . 185 N/A Maximum Junction Temperature (Metal Can Package) . . . . . . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Absolute Maximum Voltage Ratings TA = 25oC The following chart gives the range of voltages which can be applied to the terminals listed horizontally with respect to the terminals listed vertically. For example, the voltage range of the horizontal Terminal 4 with respect to Terminal 2 is -1V to +5V. TERM NO. 1 2 3 (Note 2) 4 5 6 7 8 8 NOTES: 2. Terminal No. 3 is connected to the substrate and case. 3. Voltages are not normally applied between these terminals. Voltages appearing between these terminals will be safe, if the specified voltage limits between all other terminals are not exceeded. 4. Limit is -12V for CA3053. 5. Limit is +15V for CA3053. 6. Limit is +12V for CA3053. 7. Limit is +24V for CA3028A and +18V for CA3053. +10 to 0 1 2 0 to -15 (Note 4) 3 0 to -15 (Note 4) +5 to -11 4 0 to -15 (Note 4) +5 to -1 5 +5 to -5 +15 to 0 (Note 6) +15 to 0 (Note 6) +15 to 0 (Note 6) 6 Note 3 Note 3 +30 to 0 (Note 7) Note 3 +20 to 0 (Note 5) 7 Note 3 +15 to 0 (Note 6) +15 to 0 (Note 6) Note 3 Note 3 Note 3 8 +20 to 0 (Note 5) Note 3 2 +30 to 0 (Note 7) Note 3 4 Note 3 5 Note 3 6 Note 3 7 3 Absolute Maximum Current Ratings TERM NO. 1 IIN mA 0.6 4 0.1 20 0.6 20 4 20 IOUT mA 0.1 0.1 23 0.1 0.1 0.1 0.1 0.1 Electrical Specifications PARAMETER DC CHARACTERISTICS Input Offset Voltage (Figures 1, 14) Input Offset Current (Figures 2, 14) Input Bias Current (Figures 2, 3, 15, 16) VIO IIO II TA = 25oC CA3028A CA3028B MAX MIN 70 106 TYP 0.98 0.89 0.56 1.06 16.6 36 MAX MIN 5.0 5.0 5.0 6.0 40 80 CA3053 TYP 29 36 MAX UNIT 85 125 mV mV µA µA µA µA µA µA SYMBOL TEST CONDITIONS VCC = 6V, VEE = -6V VCC = 12V, VEE = -12V VCC = 6V, VEE = -6V VCC = 12V, VEE = -12V VCC = 6V, VEE = -6V VCC = 12V, VEE = -12V VCC = 9V VCC = 12V MIN - TYP 16.6 36 - 7-7 CA3028A, CA3028B, CA3053 Electrical Specifications PARAMETER Quiescent Operating Current (Figures 2, 3, 17, 18, 19) TA = 25oC (Continued) CA3028A SYMBOL I6, I8 TEST CONDITIONS VCC = 6V, VEE = -6V VCC = 12V, VEE = -12V VCC = 9V VCC = 12V AGC Bias Current (Into Constant Current Source Terminal 7) (Figures 4, 20) Input Current (Terminal 7) Power Dissipation (Figures 2, 3, 21) I7 VCC = 12V, VAGC = 9V VCC = 12V, VAGC = 12V VCC = 9V VCC = 12V I7 PT VCC = 6V, VEE = -6V VCC = 12V, VEE = -12V VCC = 6V, VEE = -6V VCC = 12V, VEE = -12V VCC = 9V VCC = 12V DYNAMIC CHARACTERISTICS Power Gain (Figures 5, 6, 7, 22, 24, 26) GP f = 100MHz Cascode VCC = 9V Diff. Amp. f = 10.7MHz Cascode (Note 8) VCC = 9V Noise Figure (Figures 5, 6, 7, 23, 25, 26) Input Admittance (Figures 27, 28) NF Y11 Diff. Amp. (Note 8) 16 14 35 28 20 17 39 32 7.2 6.7 0.6 + j1.6 0.5 + j0.5 0.0003 - j0 0.01 j0.0002 99 j18 -37 + j0.5 0+ j0.08 0.04 + j0.23 5.7 9.0 9.0 16 14 35 28 20 17 39 32 7.2 6.7 0.6 + j1.6 0.5 + j0.5 0.0003 - j0 0.01 j0.0002 99 j18 -37 + j0.5 0+ j0.08 0.04 + j0.23 5.7 9.0 9.0 35 28 39 32 0.6 + j1.6 0.5 + j0.5 0.0003 - j0 0.01 j0.0002 99 j18 -37 + j0.5 0+ j0.08 0.04 + j0.23 dB dB dB dB dB dB mS mS mS mS mS mS mS mS µW MIN 0.8 2.0 0.5 1.0 24 120 TYP 1.25 3.3 1.28 1.65 0.85 1.65 36 175 MAX MIN 2.0 5.0 1.0 2.1 54 260 1.0 2.5 0.5 1.0 24 120 CA3028B TYP 1.25 3.3 1.28 1.65 0.85 1.65 36 175 MAX MIN 1.5 4.0 1.0 2.1 42 220 1.2 2.0 CA3053 TYP 2.2 3.3 1.15 1.55 50 100 MAX UNIT 3.5 5.0 80 150 mA mA mA mA mA mA mA mA mA mA mW mW mW mW f = 100MHz, Cascode VCC = 9V Diff. Amp. f = 10.7MHz, Cascode VCC = 9V Diff. Amp. Reverse Transfer Admittance (Figures 29, 30) Forward Transfer Admittance (Figures 31, 32) Output Admittance (Figures 33, 34) Y12 f = 10.7MHz, Cascode VCC = 9V Diff. Amp. Y21 f = 10.7MHz, Cascode VCC = 9V Diff. Amp. Y22 f = 10.7MHz, Cascode VCC = 9V Diff. Amp. Output Power (Untuned) (Figures 8, 35) AGC Range (Maximum Power Gain to Full Cutoff) (Figures 9, 36) Voltage Gain (Figures 10, 11, 37, 38) Differential Voltage Gain at f = 1kHz (Figure 12) PO f = 10.7MHz, Diff. Amp., VCC = 9V 50Ω InputOutput f = 10.7MHz, Diff. Amp. VCC = 9V f = 10.7MHz, Cascode VCC = 9V, Diff. Amp. RL = 1kΩ VCC = 6V, VEE = -6V, RL = 2kΩ VCC = 12V, VEE = -12V, RL = 1.6kΩ AGC - 62 - - 62 - - - - dB A - 40 30 - - 35 40 40 30 38 42.5 42 45 - 40 30 - - dB dB dB dB A 7-8 CA3028A, CA3028B, CA3053 Electrical Specifications PARAMETER Max Peak-to-Peak Output Voltage at f = 1kHz (Figure 12) Bandwidth at -3dB Point (Figure 12) TA = 25oC (Continued) CA3028A SYMBOL VO(P-P) TEST CONDITIONS VCC = 6V, VEE = -6V, RL = 2kΩ VCC = 12V, VEE = -12V, RL = 1.6kΩ BW VCC = 6V, VEE = -6V, RL = 2kΩ VCC = 12V, VEE = -12V, RL = 1.6kΩ Common Mode Input Voltage Range (Figure 13) Common Mode Rejection Ratio (Figure 13) Input Impedance at f = 1kHz Peak-to-Peak Output Current VCMR VCC = 6V, VEE = -6V VCC = 12V, VEE = -12V CMRR ZIN IP-P VCC = 6V, VEE = -6V VCC = 12V, VEE = -12V VCC = 6V, VEE = -6V VCC = 12V, VEE = -12V f = 10.7MHz, VCC = 9V eIN = VCC = 12V 400mV, Diff. Amp. MIN 2.0 3.5 TYP 4.0 6.0 MAX MIN 7.0 10 7.0 15 -2.5 -5.0 60 60 2.5 4.5 CA3028B TYP 11.5 23 7.3 8.0 -3.2 to -4.5 -7 to -9 110 90 5.5 3.0 4.0 6.0 MAX MIN 4 7 6.0 8.0 2.0 3.5 CA3053 TYP 4.0 6.0 MAX UNIT 7.0 10 VP-P VP-P MHz MHz V V dB dB kΩ kΩ mA mA NOTE: 8. Does not apply to CA3053. Test Circuits VCC VCC 3µF 1kΩ 1kΩ DC DIFF. VOLTMETER FLUKE TYPE 80 OR EQUIV. I6 + + 3µF I8 270Ω 6 2.7Ω 2.7Ω 1 + 2.7Ω R1 10Ω NOTE 9 VIO NOTE 10 DC VTVM 5 2.7Ω ICUT 8 VOUT 6 8 - 3V 1 I1 3 + ICUT 3 270Ω 7 3µF + VEE 5 + I5 7+ I7 I3 3µF VEE NOTES: 9. Adjust R1 for VOUT = 0V ±0.1V. 10. Record Input Offset Voltage. FIGURE 1. INPUT OFFSET VOLTAGE TEST CIRCUIT FOR CA3028B NOTE: Power Dissipation = I3 V EE + ( I 6 + I 8 )V CC . FIGURE 2. INPUT OFFSET CURRENT, INPUT BIAS CURRENT, POWER DISSIPATION, AND QUIESCENT OPERATING CURRENT TEST CIRCUIT FOR CA3028A AND CA3028B 7-9 CA3028A, CA3028B, CA3053 Test Circuits (Continued) VCC 1kΩ 7 I1 1 I7 I8 8 5 CA3053 5 6 ICUT 6 3 I3 I6 8 7 I7 3 1 2kΩ 1kΩ VCC I5 2kΩ 5kΩ VCC NOTE: Power Dissipation = VCCI3. FIGURE 3. INPUT BIAS CURRENT, POWER DISSIPATION AND QUIESCENT OPERATING CURRENT TEST CIRCUIT FOR CA3053 FIGURE 4. AGC BIAS CURRENT TEST CIRCUIT (DIFFERENTIAL AMPLIFIER CONFIGURATION) FOR CA3028A AND CA3028B VCC 7 470pF 2 C1 L1 4 50Ω SIGNAL SOURCE (NOTE 11) OR NOISE DIODE (NOTE 12) 3 0.001µF 0.001µF 2kΩ ICUT 1 5 6 8 C2 L1 50Ω RF VOLTMETER (NOTE 11) OR NOISE AMP (NOTE 12) 3 1kΩ 0.001 µF C1 1 ICUT 5 8 7 6 C2 1kΩ L2 VCC L2 50Ω SIGNAL SOURCE (NOTE 14) OR NOISE DIODE (NOTE 15) 50Ω RF VOLTMETER (NOTE 14 OR NOISE AMP (NOTE 15) 0.001µF 2kΩ f (MHz) 10.7 100 NOTES: C1 (pF) C2 (pF) L1 (µH) 3-5 L2 (µH) 3-5 f (MHz) 10.7 100 NOTES: C1 (pF) C2 (pF) L1 (µH) 3-6 0.2 -