Microcontroller

Features • • • • • • • Single Package Fully-integrated 4-bit Flash Microcontroller with RF Transmitter Low Power Consumption in Sleep Mode (< 1 µA Typically) Maximum Output Power (10 dBm) with Low Supply Current (9.5 mA Typically) 2.0 V to 4.0 V Operation Voltage for Single Li-cell Power Supply -40° C to +125° C Operation Temperature SSO24 Package About Seven External Components Description The ATAM862-4 is a single package dual-chip circuit. It combines a UHF ASK/FSK transmitter with a 4-bit microcontroller. It supports highly integrated solutions in car access and tire pressure monitoring applications, as well as manifold applications in the industrial and consumer segment. It is available for the transmitting frequency range of 429 MHz to 439 MHz with data rates up to 32 kbaud Manchester coded. For further frequency ranges such as 310 MHz to 330 MHz and 868 MHz to 928 MHz separate datasheets are available. The device contains a flash microcontroller. Microcontroller with UHF ASK/FSK Transmitter ATAM862-4 Figure 1. Application Diagram www.DataSheet4U.com ATAM862 Antenna Microcontroller Keys PLLTransmitter UHF ASK/FSK Receiver Microcontroller Rev. 4551E–4BMCU–09/04 Pin Configuration Figure 2. Pinning SSO24 XTAL VS GND ENABLE NRESET BP63/T3I BP20/NTE BP23 BP41/T2I/VMI BP42/T2O BP43/SD/INT3 VSS 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 ANT1 ANT2 PA_ENABLE CLK BP60/T3O OSC2 OSC1 BP50/INT6 BP52/INT1 BP53/INT1 BP40/SC/INT3 VDD Pin Description: RF Part Pin Symbol Function Configuration VS 1.5k 1.2k VS 1 XTAL Connection for crystal XTAL 182 µA 2 3 4 VS GND ENABLE Supply voltage Ground Enable input ESD protection circuitry (see Figure 8 on page 11) ESD protection circuitry (see Figure 8 on page 11) ENABLE 200k 2 ATAM862-4 4551E–4BMCU–09/04 ATAM862-4 Pin Description: RF Part (Continued) Pin Symbol Function Configuration VS 21 CLK Clock output signal for microcontroller, the clock output frequency is set by the crystal to fXTAL/4. 100 100 CLK PA_ENABLE 50k Uref=1.1V 22 PA_ENABLE Switches on power amplifier, used for ASK modulation 20 µA ANT1 23 24 ANT2 ANT1 Emitter of antenna output stage Open collector antenna output ANT2 Pin Description: Microcontroller Part Name VDD VSS BP20 BP40 BP41 BP42 BP43 BP50 BP52 BP53 BP60 BP63 OSC1 OSC2 NRESET Type – – I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I O I/O Function Supply voltage Circuit ground Bi-directional I/O line of Port 2.0 Bi-directional I/O line of Port 4.0 Bi-directional I/O line of Port 4.1 Bi-directional I/O line of Port 4.2 Bi-directional I/O line of Port 4.3 Bi-directional I/O line of Port 5.0 Bi-directional I/O line of Port 5.2 Bi-directional I/O line of Port 5.3 Bi-directional I/O line of Port 6.0 Bi-directional I/O line of Port 6.3 Oscillator input Oscillator output Bi-directional reset pin Alternate Function – – NTE-test mode enable, see section “Master Reset” on page 21 SC-serial clock or INT3 external interrupt input VMI voltage monitor input or T2I external clock input Timer 2 T2O Timer 2 output SD serial data I/O or INT3 external interrupt input INT6 external interrupt input INT1 external interrupt input INT1 external interrupt input T3O Timer 3 output T3I Timer 3 input 4-MHz crystal input or 32-kHz crystal input or external clock input or external trimming resistor input 4-MHz crystal output or 32-kHz crystal output or external clock input – Pin No. 13 12 7 14 9 10 11 17 16 15 20 6 18 19 5 Reset State NA NA Input Input Input Input Input Input Input Input Input Input Input Input I/O 3 4551E–4BMCU–09/04 UHF ASK/FSK Transmitter Block Features • • • • • • • • • Integrated PLL Loop Filter ESD Protection (4 kV HBM/200 V MM, Except Pin 2: 4 kV HBM/100 V MM) also at ANT1/ANT2 Maximum Output Power (10 dBm) with Low Supply Current (9.5 mA Typically) Modulation Scheme ASK/FSK – FSK Modulation is Achieved by Connecting an Additional Capacitor between the XTAL Load Capacitor and the Opendrain Output of the Modulating Microcontroller Easy to Design-in Due to Excellent Isolation of the PLL from the PA and Power Supply Supply Voltage 2.0 V to 4.0 V in the Temperature Range of -40° C to +125° C Single-ended Antenna Output with High Efficient Power Amplifier External CLK Output for Clocking the Microcontroller 125° C Operation for Tire Pressure Systems Description The PLL transmitter block has been developed for the demands of RF low-cost transmission systems, at data rates up to 32 kbaud. The transmitting frequency range is 429 MHz to 439 MHz. It can be used in both FSK and ASK systems. 4 ATAM862-4 4551E–4BMCU–09/04 ATAM862-4 Figure 3. Block Diagram ATAM862 Power up / down CLK f 4 f 32 ENABLE PFD VS PA_ENABLE GND CP ANT2 LF ANT1 PA PLL VCO XTO XTAL OSC2 OSC1 V DD V SS µC NRESET Brown-out protect. RESET Voltage monitor External input VMI BP10 Port 1 BP13 BP20/NTE Data direction RC Crystal oscillators oscillators External clock input UTCM Timer 1 interval- and watchdog timer Timer 2 T2I T2O SD Clock management EEPROM 4 K x 8 bit RAM 256 x 4 bit 8/12-bit timer with modulator SSI Serial interface SC T3O T3I 4-bit CPU core Timer 3 8-bit timer / counter with modulator and demodulator BP22 BP23 Port 2 BP21 I/O bus Data direction + alternate function Port 4 Data direction + interrupt control Port 5 Data direction + alternate function Port 6 EEPROM 2 x 32 x 16 bit BP51 INT6 BP40 BP41 BP42 BP43 BP50 INT3 VMI T2O INT3 INT6 SC T2I SD BP52 BP53 INT1 INT1 BP60 T3O BP63 T3I 5 4551E–4BMCU–09/04 General Description The fully-integrated PLL transmitter that allows particularly simple, low-cost RF miniature transmitters to be assembled. The VCO is locked to 32 × fXTAL, thus, a 13.56 MHz crystal is needed for a 433.92 MHz transmitter. All other PLL and VCO peripheral elements are integrated. The XTO is a series resonance oscillator so that only one capacitor together with a crystal connected in series to GND are needed as external elements. The crystal oscillator together with the PLL needs maximum < 1 ms until the PLL is locked and the CLK output is stable. A wait time of ≥ 1 ms until the CLK is used for the microcontroller and the PA is switched on. The power amplifier is an open-collector output delivering a current pulse which is nearly independent from the load impedance. The delivered output power is controllaed via the connected load impedance. This output configuration enables a simple matching to any kind of antenna or to 50 Ω. A high power efficiency of η= Pout/(IS,PA × VS) of 36% for the power amplifier results when an optimized load impedance of ZLoad = (166 + j223) Ω is used at 3 V supply voltage. Functional Description If ENABLE = L and PA_ENABLE = L, the circuit is in standby mode consuming only a very small amount of current so that a lithium cell used as power supply can work for several years. With ENABLE = H, the XTO, PLL and the CLK driver are switched on. If PA_ENABLE remains L, only the PLL and the XTO are running and the CLK signal is delivered to the microcontroller. The VCO locks to 32 times the XTO frequency. With ENABLE = H and PA_ENABLE = H, the PLL, XTO, CLK driver and the power amplifier are on. With PA_ENABLE, the power amplifier can be switched on and off, which is used to perform the ASK modulation. ASK Transmission The PLL transmitter block is activated by ENABLE = H. PA_ENABLE must remain L for t ≥ 1 ms, then the CLK signal can be taken to clock the microcontroller and the output power can be modulated by means of pin PA_ENABLE. After transmission, PA_ENABLE is switched to L and the microcontroller switches back to internal clocking. The PLL transmitter block is switched back to standby mode with ENABLE = L. The PLL transmitter block is activated by ENABLE = H. PA_ENABLE must remain L for t ≥ 1 ms, then the CLK signal can be taken to clock the microcontroller and the power amplifier is switched on with PA_ENABLE = H. The chip is then ready for FSK modulation. The microcontroller starts to switch on and off the capacitor between the XTAL load capacitor and GND with an open-drain output port, thus changing the reference frequency of the PLL. If the switch is closed, the output frequency is lower than if the switch is open. After transmission PA_ENABLE is switched to L and the microcontroller switches back to internal clocking. The PLL transmitter block is switched back to standby mode with ENABLE = L. The accuracy of the frequency deviation with XTAL pulling method is about ±25% when the following tolerances are considered. FSK Transmission 6 ATAM862-4 4551E–4BMCU–09/04 ATAM862-4 Figure 4. Tolerances of Frequency Modulation ~ VS CStray1 XTAL CStray2 CM LM C0 Crystal equivalent circuit RS C4 C5 CSwitch Using C4 = 9.2 pF ±2%, C5 = 6.8 pF ±5%, a switch port with CSwitch = 3 pF ±10%, stray capacitances on each side of the crystal of C Stray1 = C Stray2 = 1 pF ±10%, a parallel capacitance of the crystal of C0 = 3.2 pF ±10% and a crystal with CM = 13 fF ±10%, an FSK deviation of ±21 kHz typical with worst case tolerances of ±16.3 kHz to ±28.8 kHz results. ~ CLK Output Clock Pulse Take Over An output CLK signal is provided for a connected microcontroller. The delivered signal is CMOS compatible if the load capacitance is lower than 10 pF. The clock of the crystal oscillator can be used for clocking the microcontroller. the microcontroller block has the special feature of starting with an integrated RC-oscillator to switch on the PLL transmitter block with ENABLE = H, and after 1 ms to assume the clock signal of the transmission IC, so the message can be sent with crystal accuracy. The output power is set by the load impedance of the antenna. The maximum output power is achieved with a load impedance of ZLoad,opt = (166 + j223) Ω. There must be a low resistive path to VS to deliver the DC current. The delivered current pulse of the power amplifier