AT91 ARM Thumb-based Microcontrollers

www.DataSheet4U.com Features • Incorporates the ARM7TDMI® ARM® Thumb® Processor – High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Leader in MIPS/Watt – EmbeddedICE™ In-circuit Emulation, Debug Communication Channel Support Internal High-speed Flash – 512 Kbytes (AT91SAM7X512) Organized in Two Banks of 1024 Pages of 256 Bytes (Dual Plane) – 256 Kbytes (AT91SAM7X256) Organized in 1024 Pages of 256 Bytes (Single Plane) – 128 Kbytes (AT91SAM7X128) Organized in 512 Pages of 256 Bytes (Single Plane) – Single Cycle Access at Up to 30 MHz in Worst Case Conditions – Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed – Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms – 10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities, Flash Security Bit – Fast Flash Programming Interface for High Volume Production Internal High-speed SRAM, Single-cycle Access at Maximum Speed – 128 Kbytes (AT91SAM7X512) – 64 Kbytes (AT91SAM7X256) – 32 Kbytes (AT91SAM7X128) Memory Controller (MC) – Embedded Flash Controller, Abort Status and Misalignment Detection Reset Controller (RSTC) – Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout Detector – Provides External Reset Signal Shaping and Reset Source Status Clock Generator (CKGR) – Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and one PLL Power Management Controller (PMC) – Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and Idle Mode – Four Programmable External Clock Signals Advanced Interrupt Controller (AIC) – Individually Maskable, Eight-level Priority, Vectored Interrupt Sources – Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected Debug Unit (DBGU) – 2-wire UART and Support for Debug Communication Channel interrupt, Programmable ICE Access Prevention Periodic Interval Timer (PIT) – 20-bit Programmable Counter plus 12-bit Interval Counter Windowed Watchdog (WDT) – 12-bit key-protected Programmable Counter – Provides Reset or Interrupt Signals to the System – Counter May Be Stopped While the Processor is in Debug State or in Idle Mode Real-time Timer (RTT) – 32-bit Free-running Counter with Alarm – Runs Off the Internal RC Oscillator • AT91 ARM Thumb-based Microcontrollers AT91SAM7X512 AT91SAM7X256 AT91SAM7X128 • • • Summary Preliminary • • • • • • NOTE: This is a summary document. The complete document is available on the Atmel website at www.atmel.com. • 6120DS–ATARM–03-Oct-06 • Two Parallel Input/Output Controllers (PIO) – Sixty-two Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os – Input Change Interrupt Capability on Each I/O Line – Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output Thirteen Peripheral DMA Controller (PDC) Channels One USB 2.0 Full Speed (12 Mbits per second) Device Port – On-chip Transceiver, 1352-byte Configurable Integrated FIFOs One Ethernet MAC 10/100 base-T – Media Independent Interface (MII) or Reduced Media Independent Interface (RMII) – Integrated 28-byte FIFOs and Dedicated DMA Channels for Transmit and Receive One Part 2.0A and Part 2.0B Compliant CAN Controller – Eight Fully-programmable Message Object Mailboxes, 16-bit Time Stamp Counter One Synchronous Serial Controller (SSC) – Independent Clock and Frame Sync Signals for Each Receiver and Transmitter – I²S Analog Interface Support, Time Division Multiplex Support – High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer Two Universal Synchronous/Asynchronous Receiver Transmitters (USART) – Individual Baud Rate Generator, IrDA® Infrared Modulation/Demodulation – Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support – Full Modem Line Support on USART1 Two Master/Slave Serial Peripheral Interfaces (SPI) – 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects One Three-channel 16-bit Timer/Counter (TC) – Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel – Double PWM Generation, Capture/Waveform Mode, Up/Down Capability One Four-channel 16-bit Power Width Modulation Controller (PWMC) One Two-wire Interface (TWI) – Master Mode Support Only, All Two-wire Atmel EEPROMs Supported One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os SAM-BA™ Boot Assistance – Default Boot program – Interface with SAM-BA Graphic User Interface IEEE® 1149.1 JTAG Boundary Scan on All Digital Pins 5V-tolerant I/Os, Including Four High-current Drive I/O lines, Up to 16 mA Each Power Supplies – Embedded 1.8V Regulator, Drawing up to 100 mA for the Core and External Components – 3.3V VDDIO I/O Lines Power Supply, Independent 3.3V VDDFLASH Flash Power Supply – 1.8V VDDCORE Core Power Supply with Brownout Detector Fully Static Operation: Up to 55 MHz at 1.65V and 85°C Worst Case Conditions Available in 100-lead LQFP Green and 100-ball TFBGA Green Packages • • • • • • • • • • • • • • • • • 2 AT91SAM7X512/256/128 Preliminary Summary 6120DS–ATARM–03-Oct-06 AT91SAM7X512/256/128 Preliminary Summary 1. Description Atmel's AT91SAM7X512/256/128 is a member of a series of highly integrated Flash microcontrollers based on the 32-bit ARM RISC processor. It features 512/256/128 Kbyte high-speed Flash and 128/64/32 Kbyte SRAM, a large set of peripherals, including an 802.3 Ethernet MAC and a CAN controller. A complete set of system functions minimizes the number of external components. The embedded Flash memory can be programmed in-system via the JTAG-ICE interface or via a parallel interface on a production programmer prior to mounting. Built-in lock bits and a security bit protect the firmware from accidental overwrite and preserve its confidentiality. The AT91SAM7X512/256/128 system controller includes a reset controller capable of managing the power-on sequence of the microcontroller and the complete system. Correct device operation can be monitored by a built-in brownout detector and a watchdog running off an integrated RC oscillator. By combining the ARM7TDMI processor with on-chip Flash and SRAM, and a wide range of peripheral functions, including USART, SPI, CAN Controller, Ethernet MAC, Timer Counter, RTT and Analog-to-Digital Converters on a monolithic chip, the AT91SAM7X512/256/128 is a powerful device that provides a flexible, cost-effective solution to many embedded control applications requiring communication over, for example, Ethernet, CAN wired and Zigbee ™ wireless networks. 1.1 Configuration Summary of the AT91SAM7X512/256/128 The AT91SAM7X512, AT91SAM7X256 and AT91SAM7X128 differ only in memory sizes. Table 1-1 summarizes the configurations of the three devices. Table 1-1. Device AT91SAM7X512 AT91SAM7X256 AT91SAM7X128 Configuration Summary Flash 512 Kbytes 256 Kbytes 128 Kbytes Flash Organization dual plane single plane single plane SRAM 128 Kbytes 64 Kbytes 32 Kbytes 3 6120DS–ATARM–03-Oct-06 2. AT91SAM7X512/256/128 Block Diagram Figure 2-1. TDI TDO TMS TCK JTAGSEL AT91SAM7X512/256/128 Block Diagram JTAG SCAN ICE ARM7TDMI Processor 1.8 V Voltage Regulator VDDIN GND VDDOUT VDDCORE TST FIQ System Controller AIC PIO IRQ0-IRQ1 Memory Controller PDC PDC VDDIO DRXD DTXD DBGU Embedded Flash Controllers Abort Status SRAM 128/64/32 Kbytes Address Decoder Misalignment Detection PCK0-PCK3 PLLRC XIN XOUT VDDFLASH PLL OSC RCOSC PMC Peripheral Bridge Flash 512/256/128 Kbytes ERASE VDDCORE VDDFLASH VDDCORE NRST BOD POR Reset Controller Peripheral DMA Controller 13 Channels ROM Fast Flash Programming Interface PGMRDY PGMNVALID PGMNOE PGMCK PGMM0-PGMM3 PGMD0-PGMD15 PGMNCMD PGMEN0-PGMEN1 PIT APB WDT RTT PIOA RXD0 TXD0 SCK0 RTS0 CTS0 RXD1 TXD1 SCK1 RTS1 CTS1 DCD1 DSR1 DTR1 RI1 SPI0_NPCS0 SPI0_NPCS1 SPI0_NPCS2 SPI0_NPCS3 SPI0_MISO SPI0_MOSI SPI0_SPCK SPI1_NPCS0 SPI1_NPCS1 SPI1_NPCS2 SPI1_NPCS3 SPI1_MISO SPI1_MOSI SPI1_SPCK ADTRG AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 ADVREF SAM-BA DMA FIFO Ethernet MAC 10/100 PDC PIOB USART0 PDC PDC FIFO Transceiver ETXCK-ERXCK-EREFCK ETXEN-ETXER ECRS-ECOL, ECRSDV ERXER-ERXDV ERX0-ERX3 ETX0-ETX3 EMDC EMDIO EF100 VDDFLASH DDM DDP USART1 USB Device PIO PDC PDC PWMC PDC SPI0 PDC PDC SSC PDC Timer Counter SPI1 TC0 PDC PDC TC1 TC2 ADC TWI CAN PWM0 PWM1 PWM2 PWM3 TF TK TD RD RK RF TCLK0 TCLK1 TCLK2 TIOA0 TIOB0 TIOA1 TIOB1 TIOA2 TIOB2 TWD TWCK CANRX CANTX PIO 4 AT91SAM7X512/256/128 Preliminary Summary 6120DS–ATARM–03-Oct-06 PIO AT91SAM7X512/256/128 Preliminary Summary 3. Signal Description Table 3-1. Signal Name Signal Description List Function Power Type Active Level Comments VDDIN VDDOUT VDDFLASH VDDIO VDDCORE VDDPLL GND Voltage Regulator and ADC Power Supply Input Voltage Regulator Output Flash and USB Power Supply I/O Lines Power Supply Core Power Supply PLL Ground Power Power Power Power Power Power Ground 3V to 3.6V 1.85V 3V to 3.6V 3V to 3.6V 1.65V to 1.95V 1.65V to 1.95V Clocks, Oscillators and PLLs XIN XOUT PLLRC PCK0 - PCK3 Main Oscillator Input Main Oscillator Output PLL Filter Programmable Clock Output Input Output Input Output ICE and JTAG TCK TDI TDO TMS JTAGSEL Test Clock Test Data In Test Data Out Test Mode Select JTAG Selection Input Input Output Input Input Flash Memory ERASE Flash and NVM Configuration Bits Erase Command Reset/Test NRST TST Microcontroller Reset Test Mode Select Debug Unit DRXD DTXD Debug Receive Data Debug Transmit Data AIC IRQ0 - IRQ1 FIQ External Interrupt Inputs Fast Interrupt Input PIO PA0 - PA30 PB0 - PB30 Parallel IO Controller A Parallel IO Controller B I/O I/O Pulled-up input at reset Pulled-up input at reset Input Input Input Output I/O Input Low High Pull-up resistor, Open Drain Output Pull-down resistor Input High Pull-down resistor No pull-up resis