ARM Thumb Microcontrollers

Features • Utilizes the ARM7TDMI ™ ARM Thumb Processor Core – High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Leader in MIPS/Watt – Embedded ICE (In-Circuit Emulation) • 8K Bytes Internal RAM • Fully-programmable External Bus Interface (EBI) – Maximum External Address Space of 128M Bytes – 8 Chip Selects – Software Programmable 8/16-bit External Databus • 8-level Priority, Individually Maskable, Vectored Interrupt Controller www.DataSheet4U.com – 8 External Interrupts, Including a High-priority, Low-latency Interrupt Request • 58 Programmable I/O Lines • 6-channel 16-bit Timer/Counter – 6 External Clock Inputs and 2 Multi-purpose I/O Pins per Channel • 3 USARTs • Master/Slave SPI Interface – 8-bit to 16-bit Programmable Data Length – 4 External Slave Chip Selects • Programmable Watchdog Timer • 8-channel 10-bit ADC • 2-channel 10-bit DAC • Clock Generator with On-chip Main Oscillator and PLL for Multiplication – 3 to 20 MHz Frequency Range Main Oscillator • Real-time Clock with On-chip 32 kHz Oscillator – Battery Backup Operation and External Alarm • 10-channel Peripheral Data Controller for USARTs, SPIs and DACs • Advanced Power Management Controller (APMC) – Normal, Wait, Slow, Standby and Power-down modes • IEEE 1149.1 JTAG Boundary-scan on all Digital Pins • Fully Static Operation: 0 Hz to 33 MHz • 1.8V to 3.6V Core Operating Range • 2.7V to 5.5V I/O Operating Range • 2.4V to 3.6V Analog Operating Range • 1.8V to 3.6V Backup Battery Operating Range • 2.4V to 3.6V Oscillator and PLL Operating Range • -40°C to +85°C Temperature Range • Available in a 176-lead TQFP or 176-ball BGA Package AT91 ARM® Thumb® Microcontrollers AT91M55800 Description The AT91M55800 is a member of the Atmel AT91 16/32-bit microcontroller family, which is based on the ARM7TDMI processor core. This processor has a high-performance 32-bit RISC architecture with a high-density 16-bit instruction set and very low power consumption. In addition, a large number of internally banked registers result in very fa st exception hand ling, making the d evice id eal for real-time contro l applications. The fully programmable External Bus Interface provides a direct connection to off-chip memory in as fast as one clock cycle for a read or write operation. An eight-level priority vectored interrupt controller in conjunction with the Peripheral Data Controller significantly improve the real-time performance of the device. The device is manufactured using Atmel’s high-density CMOS technology. By combining the ARM7TDMI processor core with an on-chip RAM and a wide range of peripheral functions on a monolithic chip, the Atmel AT91M55800 is a powerful microcontroller that provides a highly-flexible and cost-effective solution to many ultra lowpower applications. Rev. 1288A–06/00 1 Pin Configurations Table 1. Pin Configuration for 176-lead TQFP Package Pin 1 2 3 4 5 6 AT91M55800 GND GND NCS0 NCS1 NCS2 NCS3 Pin 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 AT91M55800 GND GND D8 D9 D10 D11 D12 D13 D14 D15 PB19/TCLK0 PB20/TIOA0 PB21/TIOB0 PB22/TCLK1 VDDIO GND PB23/TIOA1 PB24/TIOB1 PB25/TCLK2 PB26/TIOA2 PB27/TIOB2 PA0/TCLK3 PA1/TIOA3 PA2/TIOB3 PA3/TCLK4 PA4/TIOA4 PA5/TIOB4 PA6/TCLK5 VDDIO GND PA7/TIOA5 PA8/TIOB5 PA9/IRQ0 PA10/IRQ1 PA11/IRQ2 PA12/IRQ3 PA13/FIQ PA14/SCK0 PA15/TXD0 PA16/RXD0 PA17/SCK1 PA18/TXD1/NTRI VDDCORE VDDIO Pin 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 AT91M55800 GND GND PA19/RXD1 PA20/SCK2 PA21/TXD2 PA22/RXD2 PA23/SPCK PA24/MISO PA25/MOSI PA26/NPCS0/NSS PA27/NPCS1 PA28/NPCS2 PA29/NPCS3 VDDIO GND VDDPLL XIN XOUT GNDPLL PLLRC VDDBU (2) XIN32 (2) XOUT32 (2) NRSTBU WAKEUP SHDN (2) Pin 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 AT91M55800 GND GND NCS4 NCS5 NCS6 NCS7 PB0 PB1 PB2 PB3/IRQ4 PB4/IRQ5 PB5/IRQ6 PB6/AD0TRIG PB7/AD1TRIG VDDIO GND PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 NWDOVF MCKO VDDIO GND PB18/BMS JTAGSEL TMS TDI TDO TCK NTRST NRST NWAIT NOE/NRD NWE/NWR0 NUB/NWR1 VDDCORE VDDIO 7 NLB/A0 www.DataSheet4U.com 8 A1 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 A2 A3 A4 A5 A6 A7 VDDIO GND A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 VDDIO GND A20 A21 A22 A23 D0 D1 D2 D3 D4 D5 D6 D7 VDDCORE VDDIO GNDBU (2) (2) GNDBU (2) VDDA (1) AD0 (1) AD1 (1) AD2 (1) AD3 (1) AD4 (1) AD5 (1) AD6 (1) AD7 (1) ADVREF (1) DAVREF (1) DA0 (1) DA1 (1) GNDA (1) VDDCORE VDDIO Notes: 1. Analog pins 2. Battery backup pins 2 AT91M55800 AT91M55800 Table 2. Pin Configuration for 176-ball BGA Package Pin A1 A2 A3 A4 A5 AT91M55800 NCS1 NWAIT NRST NTRST PB18/BMS Pin C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 AT91M55800 A0/NLB NCS0 VDDIO VDDCORE TMS VDDIO MCK0 PB13 PB6/AD0TRIG VDDIO PB4/IRQ5 PB0 VDDIO DA0 ADVREF A2 A1 NCS3 GND TCK JTAGSEL GND PB15 PB14 PB5/IRQ6 PB1 GND VDDCORE AD7 VDDA Pin E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E11 E12 E13 E14 E15 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 AT91M55800 A4 A3 A5 GND – – – – – – – AD6 AD5 NRSTBU GNDBU A10 A7 VDDIO A6 – – – – – – – GND AD4 VDDBU XOUT32 Pin G1 G2 G3 G4 G5 G6 G7 G8 G9 G10 G11 G12 G13 G14 G15 H1 H2 H3 H4 H5 H6 H7 H8 H9 H10 H11 H12 H13 H14 H15 AT91M55800 A12 A9 A8 GND – – – – – – – AD3 AD2 GND XIN32 A15 A14 A13 A11 – – – – – – – AD1 AD0 WAKEUP GND A6 www.DataSheet4U.com NWDOVF A7 A8 A9 A10 A11 A12 A13 A14 A15 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 PB16 PB12 PB10 PB9 PB8 NCS7 NCS6 GND DAVREF NCS2 NUB/NWR1 NWE/NWR0 NOE/NRD TD0 TDI PB17 PB11 PB7/AD1TRIG PB3/IRQ4 PB2 NCS5 NCS4 DA1 GNDA 3 Table 2. Pin Configuration for 176-ball BGA Package (Continued) Pin J1 J2 J3 J4 J5 J6 AT91M55800 A17 A18 VDDIO A16 – – – – – – – PA29/NPCS3 SHDN VDDPLL PLLRC A19 A22 A21 GND – – – – – – – PA28/NPCS2 VDDIO PA27/NPCS1 GNDPLL Pin L1 L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 L12 L13 L14 L15 M1 M2 M3 M4 M5 M6 M7 M8 M9 M10 M11 M12 M13 M14 M15 AT91M55800 A20 A23 D0 D1 – – – – – – – PA25/MOSI PA22RXD2 PA26/NPCS0/NS S XOUT D2 D3 VDDCORE GND GND PB21/TIOB0 GND PB27/TIOB2 PA0/TCLK3 GND PA23/SPCK GND PA21/TXD2 PA24/MISO XIN Pin N1 N2 N3 N4 N5 N6 N7 N8 N9 N10 N11 N12 N13 N14 N15 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 AT91M55800 D4 D6 VDDIO D14 PB19/TCLK0 VDDIO PB25/TCLK2 PA1/TIOA3 VDDIO PA8/TIOB5 PA9/IRQ0 VDDCORE VDDIO PA19/RXD1 GND D5 D7 D8 D9 D15 PB22/TCLK1 PB26/TIOA2 PA2/TIOB3 PA7/TIOA5 PA10/IRQ1 PA11/IRQ2 PA13/FIQ PA17SCK1 PA18/TXD1/NTRI PA20/SCK2 Pin R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 AT91M55800 D10 D11 D12 D13 PB20/TIOA0 PB23/TIOA1 PB24/TIOB1 PA3/TCLK4 PA4/TIOA4 PA5/TIOB4 PA6/TCLK5 PA12/IRQ3 PA14/SCK0 PA15/TXD0 PA16/RXD0 www.DataSheet4U.com J7 J8 J9 J10 J11 J12 J13 J14 J15 K1 K2 K3 K4 K5 K6 K7 K8 K9 K10 K11 K12 K13 K14 K15 4 AT91M55800 AT91M55800 Figure 1. 176-lead TQFP Pinout 132 133 89 88 www.DataSheet4U.com 176 45 1 44 Figure 2. 176-ball BGA Pinout 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 A B C D E F G H J K L M N P R 5 Pin Description Module Name A0 - A23 D0 - D15 NCS0 - NCS7 NWR0 NWR1 www.DataSheet4U.com Function Address bus Data bus Chip select Lower byte 0 write signal Lower byte 1 write signal Read signal Write enable Output enable Upper byte-select Lower byte-select Wait input Boot mode select External interrupt request Fast external interrupt request Timer external clock Multipurpose timer I/O pin A Multipurpose timer I/O pin B External serial clock Transmit data output Receive data input SPI clock Master in slave out Master out slave in Slave select Peripheral chip select Parallel I/O port A Parallel I/O port B Watchdog timer overflow Analog input channels 0 - 7 ADC0 external trigger ADC1 external trigger Analog reference Analog output channels 0 - 1 Analog reference Type Output I/O Output Output Output Output Output Output Output Output Input Input Input Input Input I/O I/O I/O Output Input I/O I/O I/O Input Output I/O I/O Output Analog in Input Input Analog ref Analog out Analog ref Active Level – – Low Low Low Low Low Low Low Low Low – – – – – – – – – – – – Low Low – – Low – – – – – – Comments Used in Byte-write option Used in Byte-write option Used in Byte-write option Used in Byte-select option Used in Byte-select option Used in Byte-select option Used in Byte-select option NRD NWE NOE NUB NLB NWAIT BMS IRQ0 - IRQ6 EBI Sampled during reset PIO-controlled after reset PIO-controlled after reset PIO-controlled after reset PIO-controlled after reset PIO-controlled after reset PIO-controlled after reset PIO-controlled after reset PIO-controlled after reset PIO-controlled after reset PIO-controlled after reset PIO-controlled after reset PIO-controlled after reset PIO-controlled after reset Input after reset Input after reset Open drain AIC FIQ TCLK0 - TCLK5 Timer TIOA0 - TIOA5 TIOB0 - TIOB5 SCK0 - SCK2 USART TXD0 - TXD2 RXD0 - RXD2 SPCK MISO SPI MOSI NSS NPCS0 - NPCS3 PA0 - PA29 PIO PB0 - PB27 WD NWDOVF AD0-AD7 AD0TRIG ADC AD1TRIG ADVREF DA0 - DA1 DAC DAVREF PIO-controlled after reset PIO-controlled after reset 6 AT91M55800 AT91M55800 Pin Description (Continued) Module Name XIN XOUT PLLRC Clock XIN32 XOUT32 www.DataSheet4U.com Function Main oscillator input Main oscillator output RC filter for PLL 32 kHz oscillator input 32 kHz oscillator output System clock Wakeup request Shutdown request Hardware reset input Hardware reset input for battery part Tri-state mode select Selects between ICE and JTAG mode Test mode