Features
• 80C52X2 Core (6 Clocks per Instruction)
– Maximum Core Frequency 48 MHz in X1 Mode, 24 MHz in X2 Mode – Dual Data Pointer – Full-duplex Enhanced UART (EUART) – Three 16-bit Timer/Counters: T0, T1 and T2 – 256 Bytes of Scratchpad RAM 16/32-Kbyte On-chip Flash EEPROM In-System Programming through USB – Byte and Page (128 bytes) Erase and Write – 100k Write Cycles 3-KbyteFlash EEPROM for Bootloader – Byte and Page (128 bytes) Erase and Write – 100k Write Cycles 1-Kbyte EEPROM Data ( – Byte and Page (128 bytes) Erase and Write – 100k Write Cycles On-chip Expanded RAM (ERAM): 1024 Bytes Integrated Power Monitor (POR/PFD) to Supervise Internal Power Supply USB 1.1 and 2.0 Full Speed Compliant Module with Interrupt on Transfer Completion – Endpoint 0 for Control Transfers: 32-byte FIFO – 6 Programmable Endpoints with In or Out Directions and with Bulk, Interrupt or Isochronous Transfers Endpoint 1, 2, 3: 32-byte FIFO Endpoint 4, 5: 2 x 64-byte FIFO with Double Buffering (Ping-pong Mode) Endpoint 6: 2 x 512-byte FIFO with Double Buffering (Ping-pong Mode) – Suspend/Resume Interrupts – 48 MHz PLL for Full-speed Bus Operation – Bus Disconnection on Microcontroller Request www.DataSheet4U.com 5 Channels Programmable Counter Array (PCA) with 16-bit Counter, High-speed Output, Compare/Capture, PWM and Watchdog Timer Capabilities Programmable Hardware Watchdog Timer (One-time Enabled with Reset-out): 100 ms to 3s at 8 MHz Keyboard Interrupt Interface on Port P1 (8 Bits) TWI (Two Wire Interface) 400Kbit/s SPI Interface (Master/Slave Mode) 34 I/O Pins 4 Direct-drive LED Outputs with Programmable Current Sources: 2-6-10 mA Typical 4-level Priority Interrupt System (11 sources) Idle and Power-down Modes 0 to 24 MHz On-chip Oscillator with Analog PLL for 48 MHz Synthesis Industrial Temperature Range Extended Range Power Supply: 2.7V to 5.5V (3.3V to 5.5V required for USB) Packages: PLCC52, VQFP64, QFN32
• • • • • •
8-bit Flash Microcontroller with Full Speed USB Device
AT89C5130A-M AT89C5131A-M
• • • • • • • • • • • • •
Rev. 4337G–USB–11/06
Description
AT89C5130A/31A-M is a high-performance Flash version of the 80C51 single-chip 8-bit microcontrollers with full speed USB functions. AT89C5130A/31A-M features a full-speed USB module compatible with the USB specifications Version 1.1 and 2.0. This module integrates the USB transceivers with a 3.3V voltage regulator and the Serial Interface Engine (SIE) with Digital Phase Locked Loop and 48 MHz clock recovery. USB Event detection logic (Reset and Suspend/Resume) and FIFO buffers supporting the mandatory control Endpoint (EP0) and up to 6 versatile Endpoints (EP1/EP2/EP3/EP4/EP5/EP6) with minimum software overhead are also part of the USB module. AT89C5130A/31A-M retains the features of the Atmel 80C52 with extended Flash capacity (16/32-Kbytes), 256 bytes of internal RAM, a 4-level interrupt system, two 16bit timer/counters (T0/T1), a full duplex enhanced UART (EUART) and an on-chip oscillator. In addition, AT89C5130A/31A-M has an on-chip expanded RAM of 1024 bytes (ERAM), a dual data pointer, a 16-bit up/down Timer (T2), a Programmable Counter Array (PCA), up to 4 programmable LED current sources, a programmable hardware watchdog and a power-on reset. AT89C5130A/31A-M has two software-selectable modes of reduced activity for further reduction in power consumption. In the idle mode the CPU is frozen while the timers, the serial ports and the interrupt system are still operating. In the power-down mode the RAM is saved, the peripheral clock is frozen, but the device has full wake-up capability through USB events or external interrupts.
2
AT89C5130A/31A-M
4337G–USB–11/06
AT89C5130A/31A-M
Block Diagram
MISO MOSI T2EX VDD
VSS
CEX
SCK AVDD
SS
RxD
TxD
ECI
T2
SDA
SCL
(2) (2) XTAL1 XTAL2 EEPROM RAM 256x8 ERAM
1Kx8
(1) (1)
(1) (1)
(3) (3)
(1) (1) (1) (1)
EUART + BRG
16/32Kx8Flash
4Kx8
PCA
Timer2
TWI
SPI
ALE PSEN CPU EA RD WR (2) (2)
C51 CORE
Timer 0 Timer 1
INT Ctrl
Parallel I/O Ports & Ext. Bus Port 0 Port 1 Port 2 Port 3 Port 4
Key Watch USB Board Dog
Regulator
VREF
(2) (2) RST T0 T1
(2) (2) INT0 INT1 AVSS P1 P2 P0 P3 P4
KIN [0..7]
Notes:
1. Alternate function of Port 1 2. Alternate function of Port 3 3. Alternate function of Port 4
D+
D-
3
4337G–USB–11/06
Pinout Description
Pinout
Figure 1. AT89C5130A/31A-M 52-pin PLCC Pinout
P1.7/CEX4/KIN7/MOSI P1.5/CEX2/KIN5/MISO P1.6/CEX3/KIN6/SCK P1.1/T2EX/KIN1/SS
P1.4/CEX1/KIN4
P1.3/CEX0/KIN3
P1.2/ECI/KIN2
P2.2/A10
7 P4.1/SDA P2.3/A11 P2.4/A12 P2.5/A13 XTAL2 XTAL1 P2.6/A14 P2.7/A15 VDD AVDD UCAP AVSS P3.0/RxD 8 9 10 11 12 13 14 15 16 17 18 19 20
6
5 4
3
2
1 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 NC P0.1/AD1 P0.2/AD2 RST P0.3/AD3
VSS
PLCC52
P0.0/AD0
P4.0/SCL
P1.0/T2/KIN0 P0.4/AD4 P3.7/RD/LED3 P0.5/AD5 P0.6/AD6 P0.7/AD7 P3.6/WR/LED2 NC P3.5/T1/LED1
P2.1/A9
21 22 23 24 25 26 27 28 29 30 31 32 33
D+ VREF UVSS ALE DPSEN P3.1/TxD P3.2/INT0 P3.3/INT1/LED0 P3.4/T0
PLLF
4
AT89C5130A/31A-M
4337G–USB–11/06
EA
P2.0/A8
AT89C5130A/31A-M
Figure 2. AT89C5130A/31A-M 64-pin VQFP Pinout
P4.1/SDA P4.0/SCL P1.7/CEX4/KIN7/MOSI P1.5/CEX2/KIN5/MISO P1.6/CEX3/KIN6/SCK P1.1/T2EX/KIN1/SS
P1.3/CEX0/KIN3
P1.4/CEX1/KIN4
P1.2/ECI/KIN2
P1.0/T2/KIN0
P0.0/AD0
P2.2/A10
P2.1/A9 P2.0/A8
NC
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 NC P2.3/A11 P2.4/A12 P2.5/A13 XTAL2 XTAL1 P2.6/A14 P2.7/A15 VDD AVDD UCAP 1 2 3 4 5 6 7 8 9 10 48 47 46 45 44 43 42 41 40 39 38 37 36 35 NC NC P0.1/AD1 P0.2/AD2 RST P0.3/AD3
VSS
NC
VQFP64
NC P0.4/AD4 P3.7/RD/LED3 P0.5/AD5 P0.6/AD6 P0.7/AD7
11 AVSS 12 NC 13 NC NC 14 15 16
P3.0/RxD
P3.6/WR/LED2 34 NC 33 NC
17 18 19 20 21 22 23 24 25 26 27 28 29 30 3132
P3.3/INT1/LED0 P3.5/T1/LED1 NC NC NC ALE PSEN P3.1/TxD P3.2/INT0 P3.4/T0 VREF UVSS
PLLF
EA
D-
D+
5
4337G–USB–11/06
Figure 3. AT89C5130A/31A-M 32-pin QFN Pinout
P1.7/CEX4/KIN7/MOSI P1.5/CEX2/KIN5/MISO P1.6/CEX3/KIN6/SCK P1.1/T2EX/KIN1/SS 24 23 22 21 20 19 18 17 9 10 11 12 13 14 15 16 D+ VREF UVSS DP3.2/INT0 P3.1/TxD P3.3/INT1/LED0 P3.4/T0 P1.4/CEX1/KIN4 P1.3/CEX0/KIN3
32 31 30 29 28 27 26 25 P4.1/SDA XTAL2 XTAL1 VDD UCAP AVSS P3.0/RxD PLLF 1 2 3 4 5 6 7 8 P1.0/T2/KIN0 RST
NC VSS NC
QFN32
P1.2/ECI/KIN2
P4.0/SCL
P3.7/RD/LED3 P3.6/WR/LED2 P3.5/T1/LED1
Note : The metal plate can be connected to Vss
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AT89C5130A/31A-M
4337G–USB–11/06
AT89C5130A/31A-M
Signals
All the AT89C5130A/31A-M signals are detailed by functionality on Table 1 through Table 12. Table 1. Keypad Interface Signal Description
Signal Name KIN[7:0) Type I Description Keypad Input Lines Holding one of these pins high or low for 24 oscillator periods triggers a keypad interrupt if enabled. Held line is reported in the KBCON register. Alternate Function P1[7:0]
Table 2. Programmable Counter Array Signal Description
Signal Name ECI Type I Description External Clock Input Capture External Input CEX[4:0] I/O Compare External Output Alternate Function P1.2 P1.3 P1.4 P1.5 P1.6 P1.7
Table 3. Serial I/O Signal Description
Signal Name RxD TxD Type I O Description Serial Input Port Serial Output Port Alternate Function P3.0 P3.1
Table 4. Timer 0, Timer 1 and Timer 2 Signal Description
Signal Name Type Description Timer 0 Gate Input INT0 serves as external run control for timer 0, when selected by GATE0 bit in TCON register. INT0 I External Interrupt 0 INT0 input set IE0 in the TCON register. If bit IT0 in this register is set, bits IE0 are set by a falling edge on INT0. If bit IT0 is cleared, bits IE0 is set by a low level on INT0. Timer 1 Gate Input INT1 serves as external run control for Timer 1, when selected by GATE1 bit in TCON register. INT1 I External Interrupt 1 INT1 input set IE1 in the TCON register. If bit IT1 in this register is set, bits IE1 are set by a falling edge on INT1. If bit IT1 is cleared, bits IE1 is set by a low level on INT1. P3.3 P3.2 Alternate Function
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4337G–USB–11/06
Table 4. Timer 0, Timer 1 and Timer 2 Signal Description (Continued)
Signal Name T0 Type I Description Timer Counter 0 External Clock Input When Timer 0 operates as a counter, a falling edge on the T0 pin increments the count. Timer/Counter 1 External Clock Input When Timer 1 operates as a counter, a falling edge on the T1 pin increments the count. Timer/Counter 2 External Clock Input Timer/Counter 2 Clock Output Timer/Counter 2 Reload/Capture/Direction Control Input Alternate Function P3.4
T1
I I O I
P3.5
T2 T2EX
P1.0 P1.1
Table 5. LED Signal Description
Signal Name Type Description Direct Drive LED Output These pins can be directly connected to the Cathode of standard LEDs without external current limiting resistors. The typical current of each output can be programmed by software to 2, 6 or 10 mA. Several outputs can be connected together to get higher drive capabilities. Alternate Function P3.3 P3.5 P3.6 P3.7
LED[3:0]
O
Table 6. TWI Signal Description
Signal Name SCL Type I/O Description SCL: TWI Serial Clock SCL output the serial clock to slave peripherals. SCL input the serial clock from master. SDA: TWI Serial Data SCL is the bidirectional TWI data line. Alternate Function P4.0
SDA
I/O
P4.1
Table 7. SPI Signal Description
Signal Name SS Type I/O Description SS: SPI Slave Select MISO: SPI Master Input Slave Output line MISO I/O When SPI is in master mode, MISO receives data from the slave peripheral. When SPI is in slave mode, MISO outputs data to the master controller. SCK: SPI Serial Clock SCK outputs clock to the slave peripheral or receive clock from the master MOSI: SPI Master Output Slave Input line When SPI is in master mode, MOSI outputs data to the slave peripheral. When SPI is in slave mode, MOSI receives data from the master controller P1.7 P1.5 Alternate Function P1.1
SCK
I/O
P1.6
MOSI
I/O
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AT89C5130A/31A-M
4337G–USB–11/06
AT89C5130A/31A-M
Table 8. Ports Signal Description
Signal Name Type Descr
