Single Chip Digital Audio Decoder - Encoder

www.DataSheet4U.com Features • Audio Processor – Proprietary Digital Signal Processor – MP3 (Full MPEG I/II-Layer 3) Decoder (1) – Windows Media ® Audio (WMA) Decoder (1) – OGG (Vorbis) Decoder (2) – WAV PCM Decoder/Encoder – ADPCM Decoder/Encoder (G726: 40, 32, 24, 16 Kbps) Audio Codec – 16-bit Stereo D/A Converters (3) – Headphone Amplifier with Analog Volume Control(3) – Microphone Pre-Amplifier with Bias Control – 16-bit Mono A/D Converter: Microphone or Line Inputs Recording – Stereo Lines Input for FM Playback or Mono Recording – Baseband Sound Processor with Digital Volume Control, Bass, Medium, and Treble Control, Bass Boost and Virtual Surround Effects Digital Audio DAC Interface – PCM / I2S Format Compatible USB Rev 2.0 Controller – High Speed Mode (480 Mbps) – Full Speed Mode (12 Mbps) – On The Go Full Speed Mode Data Flow Controller – 16-bit Multimedia Bus with 2 DMA Channels for high speed transfer with USB Nand Flash Controller – Up to four Memories with Page Size: 512B, 1KB, 2KB or 4KB – Built-in ECC and Hardware Write Protection – xD-Picture Card™ and SmartMedia ® Card Interface MultiMediaCard® Controller – MultiMediaCard 1-bit / 4-bits Modes (V4.0 compatible) – Secure Digital Card 1-bit / 4-bit Modes Man Machine Interface – Glueless Generic LCD Interface – Keyboard Interface Remote Controlled / Streaming – PSI I80 Slave Interface (EBI Compatible) up to 6Mbyte/s – SPI Master and Slave Modes – Full Duplex UART with Baud Rate Generator up to 6 Mbit/s (Rx, Tx, RTS, CTS) Control Processor – Enhanced 8-bit MCU C51 Core (FMAX = 24 MHz) – 64K Bytes of Internal RAM for application code and data – Boot ROM Memory: Secured Nand Flash Boot Strap (standard), USB Boot Loader – Two 16-bit Timers/Counters – Hardware Watchdog Timer Power Management – 1.8V 40 mA Single AAA or AA Battery Powered (4) – Direct USB VBUS Supply – 3V - 50 mA Regulator Output – 1.8V - 50 mA Regulator Output – Battery Voltage Monitoring – Power-on Reset – Software Programmable MCU Clock – Idle, Power-Down, Power-Off Modes On Chip Debug Operating Conditions – Supply 0.9V to 5V – 25 mA Typical Operating at 25°C (estimation to be confirmed) – Temperature Range: -40°C to +85°C • • • • • Single-Chip Digital Audio Decoder Encoder with USB 2.0 Interface AT85C51SND3B1 AT85C51SND3B2 AT85C51SND3B3 Preliminary • • • • • • • 7632A–MP3–03/06 1 www.DataSheet4U.com • Packages – LQFP100, BGA100, Dice Notes: 1. 2. 3. 4. See Ordering Information Future product AT85C51SND3B2 & AT85C51SND3B3 only AT85C51SND3B3 only Description Digital Music Players, Mobile Phones need ready to use low-cost solutions for very fast time to market. The AT85C51SND3Bx with associated firmware embeds in a single chip all features, hardware and software, for Digital Music Players, Mobile Phones and Car Audio Systems: MP3 decoder, WMA decoder, Display interface, serial interface, parallel interface, USB high speed and USB host. Close to a plug and play solution for most applications, the AT85C51SND3Bx drastically reduces system development for the best time to market. The AT85C51SND3Bx handles full file system management with Nand Flash and Flash Cards, including full detection and operation of a thumb drive. The AT85C51SND3A is used either as a master controller, or as a slave controller interfacing easily with most of the base-band or host processors available on the market. In addition to the MP3 and WMA format, the AT85C51SND3Bx associated firmware will also later support, the OGG format, basic MIDI features for low cost mobile phones and JPEG still pictures decoding. The AT85C51SND3B is ideally fitting mass production markets. The AT85C51SND3Bx includes Power Management with: 5V USB VBUS direct supply, 2.7V to 3.6V supply, 1.8V supply or alkaline battery supply (0.9V to 1.8V). External Nand Flash or Flash Card can be supplied by the AT85C51SND3B at 1.8V or 3V. The AT85C51SND3Bx supports many applications including: mobile phones, music players, portable navigation, car audio, music in shopping centers, applications including MMC/SD Flash Cards in Industrial applications. To facilitate custom applications with the AT85C51SND3Bx, a development kit AT85DVK-07 is available with hardware and firmware database. Key Features • Firmware to support – – – – MP3 WMA ADPCM/WAV voice or line recording and coming soon OGG, MIDI and JPEG Decoder Internal DAC FM inputs Up to 4x Nand-Flash SD/MMC cards High Speed, Full Speed OTG (reduced Host) • Audio Codec – – • Memory Support – – • USB – – 2 AT85C51SND3Bx 7632A–MP3–03/06 www.DataSheet4U.com AT85C51SND3Bx Block Diagram Figure 1. AT85C51SND3Bx Block Diagram AT85C51SND3Bx USB Controller HS / FS Device Controller Control Processor Unit Remote Interfaces Serial Peripheral Interface Host / OTG Controller Enhanced X2 C51 Core Serial I/O Interface Interrupt Controller MMI Controller Keyboard Interface LCD Interface Parallel Slave Interface Memory Unit Memory Controllers Clock Controller Oscillator PLL Clock Generator Configurable 64 Kbytes Code / Data RAM Nand Flash SM / xD Cards MMC V4 SD Cards Boot ROM Power Management Power Fail Detector 1.8V DC-DC (1) 3V Regulator 1.8V Regulator Timer Unit 2 x 16-bit Timers Watchdog Timer 16-bit Multimedia Bus Audio Controller Audio DAC Interface Audio Processor Baseband Processor Debug Unit On Chip Debug Multimedia Bus Manager Data Flow Controller Audio Codec(2) Notes: 1. AT85C51SND3B3 only 2. AT85C51SND3B2 & AT85C51SND3B3 only 3 7632A–MP3–03/06 www.DataSheet4U.com Application Information The AT85C51SND3Bx allow design of 2 typical applications which differentiate by the power supply voltage: • • The Very Low Voltage System The player operates at 1.8V and allows very low power consumption. The Low Voltage System The player operates at 3V and allows low power consumption. Very Low Voltage 1.8V System Figure 2. Typical Very Low Voltage 1.8V Application AT85C51SND3B3 1.8V NF Memories Battery Write Protect SD/MMC LVDD LCD FM Module PA 4 AT85C51SND3Bx 7632A–MP3–03/06 www.DataSheet4U.com AT85C51SND3Bx Low Voltage 3V System Figure 3. Typical Low Voltage 3V Application AT85C51SND3B2 3V NF Memories Write Protect SD/MMC Battery FM Module LCD 3V DC-DC HVDD 5 7632A–MP3–03/06 www.DataSheet4U.com Pin Description Pinouts Figure 4. AT85C51SND3Bx 100-pin QFP Package P1.3/KIN3 P1.2/KIN2 P1.1/KIN1 P1.0/KIN0 BVDD DCPWR(1) BVSS DCLI(1) LVDD(1) RLVDD HVDD UVCC VSS CVSS P3.6/UVCON P3.7/UID ULVDD DMF DPF UVSS UHVDD DPH DMH UVSS UBIAS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 P1.4 P1.5 P1.6 P1.7 P2.0/SDINS P2.1/SDLCK P2.2/SDCMD P2.3/SDCLK P2.4/SDDAT0 P2.5/SDDAT1 P2.6/SDDAT2 P2.7/SDDAT3 IOVSS IOVDD NFWP NFCE0 P4.4/NFCE1/SMLCK P4.5/NFCE2/SMINS P4.6/NFCE3/SMCE NFCLE NFALE NFWE NFRE NFD0 NFD1 AT85C51SND3Bx 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 NFD2 NFD3 NFD4 NFD5 NFD6 NFD7 P0.0/SD0/LD0 P0.1/SD1/LD1 P0.2/SD2/LD2 P0.3/SD3/LD3 P0.4/SD4/LD4 P0.5/SD5/LD5 P0.6/SD6/LD6 P0.7/SD7/LD7 IOVSS IOVDD P3.0/RXD/MISO P3.1/TXD/MOSI P3.2/INT0/RTS/SCK P3.3/INT1/CTS/SS P3.4/T0 P5.3/SWR/LWR/LRW P5.2/SA0/LA0/LRS P5.1/SCS/LCS P5.0/SRD/LRD/LDE Notes: 1. Leave these pins unconnected for AT85C51SND3B1 & AT85C51SND3B2 products 2. Leave these pins unconnected for AT85C51SND3B1 product 6 AT85C51SND3Bx 7632A–MP3–03/06 UPVDD UPVSS AVDD1 AVSS1 MICBIAS MICIN LINR LINL AVCM AREF OUTR(2) OUTL(2) AVDD2 AVSS2 APVSS X1 X2 APVDD OCDT/ISP OCDR P4.3/DSEL P4.2/DDAT P4.1/DCLK P4.0/OCLK RST 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 www.DataSheet4U.com AT85C51SND3Bx Signals Description System Table 1. System Signal Description Signal Name Type Description Reset Input Holding this pin low for 64 oscillator periods while the oscillator is running resets the device. The Port pins are driven to their reset conditions when a voltage lower than VIL is applied, whether or not the oscillator is running. This pin has an internal pull-up resistor (RRST) which allows the device to be reset by connecting a capacitor between this pin and VSS. Asserting RST when the chip is in Idle mode or Power-Down mode returns the chip to normal operation. In order to reset external components connected to the RST line a low level 96-clock period pulse is generated when the watchdog timer reaches its time-out period. In System Programming Assert this pin during reset phase to enter the in system programming mode. Alternate Function RST I/O - ISP I OCDT Table 2. Ports Signal Description Signal Name P0.7:0 Type I/O Description Port 0 P0 is an 8-bit bidirectional I/O port with internal pull-ups. Port 1 P1 is an 8-bit bidirectional I/O port with internal pull-ups. Alternate Function LD7:0 P1.7:0 I/O KIN3:0 SDINS SDLCK SDCMD SDCLK SDDAT3:0 RXD MISO TXD MOSI INT0 RTS SCK INT1 CTS SS T0 UVCON UID P2.7:0 I/O Port 2 P2 is an 8-bit bidirectional I/O port with internal pull-ups. P3.4:0 P3.7:6 I/O Port 3 P3 is a 7-bit bidirectional I/O port with internal pull-ups. 7 7632A–MP3–03/06 www.DataSheet4U.com Signal Name Type Description Alternate Function OCLK DCLK DDAT DSEL NFCE1/SMLCK NFCE2/SMINS NFCE3/SMCE LRD/LDE SDR P4.6:0 I/O Port 4 P4 is a 7-bit bidirectional I/O port with internal pull-ups. P5.3:0 I/O Port 5 P5 is a 4-bit bidirectional I/O port with internal pull-ups. LCS SCS LA0/LRS SA0 LWR/LRW SWR Table 3. Timer 0 and Timer 1 Signal Description Signal Name Type Description Timer 0 Gate Input INT0 serves as external run control for timer 0, when selected by GATE0 bit in TCON register. INT0 I External Interrupt 0 INT0 input sets IE0 in the TCON register. If bit IT0 in this register is set, bit IE0 is set by a falling edge on INT0. If bit IT0 is cleared, bi