Thermal Fingerprint Sensor

www.DataSheet4U.com Features • • • • • • • • • • • • Sensitive Layer Over a 0.8 µm CMOS Array Image Zone: 0.4 x 14 mm = 0.02" x 0.55" Image Array: 8 x 280 = 2240 pixels Pixel Pitch: 50 µm x 50 µm = 500 dpi Pixel Clock: up to 2 MHz Enabling up to 1780 Frames per Second Die Size: 1.7 x 17.3 mm Operating Voltage: 3 V to 5.5 V Naturally Protected Against ESD: > 16 kV Air Discharge Power Consumption: 20 mW at 3.3 V, 1 MHz, 25°C Operating Temperature Range: -40°C to +85°C Resistant to Abrasion: >1 Million Finger Sweeps Chip-on-Board (COB), Chip-on-Board (COB) with Connector, or 20-lead Ceramic DIP Available for Development, with Specific Protective Layer Applications • • • • • • • • • PDA (Access Control, Data Protection) Cellular Phones, SmartPhones (Access e-business) Notebook, PC-add on (Access Control, e-business) PIN Code Replacement Automated Teller Machines, POS Building Access Electronic Keys (Cars, Home,...) Portable Fingerprint Imaging for Law Enforcement TV Access Figure 1. FingerChip™ Packages Thermal Fingerprint Sensor with 0.4 mm x 14 mm (0.02" x 0.55") Sensing Area and Digital Output (On-chip ADC) AT77C101B FingerChip™ Chip-on-Board Package with connector Chip-on-Board Package (COB) Sweep your finger to make life easier Actual size Rev. 2150B–BIOM–09/03 1 Table 1. Pin Description for Chip-on-Board Package: AT77C101B-CB01Ι Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 Name GND AVE AVO TPP TPE VCC GND RST PCLK OE ACKN De0 Do0 De1 Do1 De2 Do2 De3 Do3 FPL GND Type GND Analog output Analog output Power Digital input Power GND Digital input Digital input Digital input Digital output Digital output Digital output Digital output Digital output Digital output Digital output Digital output Digital output GND GND The die attach is connected to pins 1, 7 and 21, and must be grounded. The FPL pin must be grounded. GND AVE AVO TPP TPE VCC GND RST PCLK OE ACKN De0 Do0 De1 Do1 De2 Do2 De3 Do3 FPL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 GND 21 2 AT77C101B FingerChip™ 2150B–BIOM–09/03 AT77C101B FingerChip™ Table 2. Pin Description for COB with Connector Package: AT77C101B-CB02Ι(1) Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 Note: Name FPL Not connected Not connected DE3 DO3 DE2 DO2 DE1 DO1 DE0 DO0 AVE AVO TPP TPE VCC GND RST PCLK OE ACKN Digital output Digital output Digital output Digital output Digital output Digital output Digital output Digital output Analog output Analog output Power Digital input Power GND Digital input Digital input Digital input Digital output Type GND 1. Ref Connector: FH18-21S-0.3SHW (HIROSE). 3 2150B–BIOM–09/03 Figure 2. COB with Flex(1) Flex with metallizations up Flex with metallizations down Figure 3. Flex Output Side Flex Output (FingerChip Connector Side) Metallizations Up 3 1 2 Note: 1. Flex is not provided by ATMEL. 4 AT77C101B FingerChip™ 2150B–BIOM–09/03 AT77C101B FingerChip™ Description The AT77C101B is part of the Atmel FingerChip monolithic fingerprint sensor family for which no optics, no prism and no light source are required. The AT77C101B is a single-chip, high-performance, low-cost sensor based on temperature physical effects for fingerprint sensing. The AT77C101B has a linear shape, which captures a fingerprint image by sweeping the finger across the sensing area. After capturing several images, Atmel proprietary software can reconstruct a full 8-bit fingerprint image. The AT77C101B has a small surface combined with CMOS technology, and a Chip-onBoard package assembly. These facts contribute to a low-cost device. The device delivers a programmable number of images per second, while an integrated analog-to-digital converter delivers a digital signal adapted to interfaces such as an EPP parallel port, a USB microcontroller or directly to microprocessors. No frame grabber or glue interface is therefore necessary to send the frames. These facts make AT77C101B an easy device to include in any system for identification or verification applications. Table 1. Absolute Maximum Ratings(1) Parameter Positive supply voltage Temperature stabilization power Front plane Digital input voltage Storage temperature Symbol VCC TPP FPL RST PCLK Tstg Comments Value GND to 6.5 GND to 6.5 GND to VCC GND to VCC -50 to +95 Unit V V V V °C Do not solder Forbidden °C Lead temperature (soldering, 10 seconds) Tleads Note: 1. Absolute maximum ratings are limiting values, to be applied individually, while other parameters are within specified operating conditions. Long exposure to maximum ratings may affect device reliability. Table 2. Recommended Conditions Of Use Parameter Positive supply voltage Front plane Digital input voltage Digital output voltage Digital load Analog load Operating temperature range Maximum current on TPP CL CA RA Tamb ITPP Not connected I grade 0 -40°C to +85°C 100 Symbol VCC FPL Must be grounded Comments Min 3V Typ 5V GND CMOS levels CMOS levels 50 Max 5.5 V Unit V V V V pF pF kΩ °C mA 5 2150B–BIOM–09/03 Table 3. Resistance Parameter ESD On pins. HBM (Human Body Model) CMOS I/O On die surface (Zapgun) Air discharge Mechanical Abrasion Number of cycles without lubricant multiply by a factor of 20 for correlation with a real finger Chemical Resistance Cleaning agent, acid, grease, alcohol, diluted acetone 4 hours Internal method 200 000 MIL E 12397B 2 kV ±16 kV MIL-STD-883 - method 3015.7 NF EN 6100-4-2 Min Value Standard Method Table 4. Specifications Explanation Of Test Levels I II III IV V VI D 100% production tested at +25°C 100% production tested at +25°C, and sample tested at specified temperatures (AC testing done on sample) Sample tested only Parameter is guaranteed by design and/or characterization testing Parameter is a typical value only 100% production tested at temperature extremes 100% probe tested on wafer at Tamb = +25°C Parameter Resolution Size Yield: number of bad pixels Equivalent resistance on TPP pin Test Level IV IV I I Min Typ 50 8 x 280 Max Unit µm Pixel 5 20 30 47 Bad pixels Ω 6 AT77C101B FingerChip™ 2150B–BIOM–09/03 AT77C101B FingerChip™ . Table 5. 3.3 V Power supply The following characteristics are applicable to the operating temperature -40°C ≤ Ta ≤ +85°C Typical conditions are: VCC = +3.3 V; Tamb = 25°C; FPCLK = 1 MHz; Duty cycle = 50% Cload 120 pF on digital outputs, analog outputs disconnected unless otherwise specified Parameter Power Requirements Positive supply voltage Active current on VCC pin, 1 MHz, 25°C Active current on VCC pin, Cload= 0 pF Power dissipation on VCC Cload = 0 Current on VCC in NAP mode Analog Output Voltage range Digital Inputs Logic compatibility Logic “0” voltage Logic “1” voltage Logic “0” current Logic “1”current TPE logic “0” voltage TPE logic “1” voltage Digital Outputs Logic compatibility Logic “0” voltage(1) Logic “1” voltage Note: (1) Symbol Test Level Min Typ Max Unit VCC ICC PCC ICCNAP I IV I IV I 3.0 3.3 6 5 20 17 3.6 10 6 36 22 10 V mA mA mW mW µA VAVx IV 0 2.9 V CMOS VIL VIH IIL IIH IILTPE IIHTPE I I I I 1 1 0 2.3 -10 0 -10 0 0.8 VCC 0 10 0 100 V V µA µA µA µA CMOS VOL VOH I I 2.4 0.6 V V 1. With IOL = 1 mA and IOH = -1 mA 7 2150B–BIOM–09/03 Table 6. 5 V Power Supply The following characteristics are applicable to the operating temperature -40°C ≤ Ta ≤ +85°C Typical conditions are: VCC = +5 V; Tamb = 25°C; FPCLK = 1 MHz; Duty cycle = 50% Cload 120 pF on digital outputs, analog outputs disconnected unless otherwise specified. Parameter Power Requirements Positive supply voltage Active current on VCC pin, 1 MHz, 25°C Active current on VCC pin Cload = 0 pF Power dissipation on VCC Cload = 0 Current on VCC in NAP mode Analog Output Voltage range Digital Inputs Logic compatibility Logic “0” voltage Logic “1” voltage Logic “0” current Logic “1”current TPE logic “0” voltage TPE logic “1” voltage Digital Outputs Logic compatibility Logic “0” voltage(1) Logic “1” voltage(1) Note: 1. With IOL = 1 mA and IOH = -1 mA VOL VOH I I 3.5 CMOS 1.5 V V VIL VIH IIL IIH IILTPE IIHTPE I I I I 1 1 0 3.6 -10 0 -100 0 CMOS 1.2 VCC 0 10 0 100 V V µA µA µA µA VAVx IV 0 2.9 V VCC ICC PCC ICCNAP I IV I IV I 4.5 5 7 5 35 25 5.5 10 6 55 33 10 V mA mA mW mW µA Symbol Test level Min Typ Max Unit 8 AT77C101B FingerChip™ 2150B–BIOM–09/03 AT77C101B FingerChip™ . Table 7. Switching Performances The following characteristics are applicable to the operating temperature -40°C ≤ Ta ≤ +85°C Typical conditions are: nominal voltage; Tamb = 25°C; FPCLK = 1 MHz; Duty cycle = 50% Cload 120 pF on digital and analog outputs unless otherwise specified Parameter Clock frequency Clock pulse width (high) Clock pulse width (low) Clock setup time (high)/reset falling edge No data change Reset pulse width high Symbol fPCLK tHCLK tLCLK tSetup tNOOE tHRST Test Level I I I I IV IV 100 50 Min 0.5 250 250 0 Typ 1 Max 2 Unit MHz ns ns ns ns ns Table 8. 5.0 V ±10% Power Supply Parameter Output delay from PCLK to ACKN rising edge Output delay from PCLK to ACKN falling edge Output delay from PCLK to data output Dxi Output delay from PCLK to analog output Avx Output delay from OE to data high-Z Output delay from OE to data output Symbol tPLHACKN tPHLACKN tPDATA tPAVIDEO tDATAZ tZDATA Test Level I I I I IV IV 25 29 Min Typ Max 125 125 90 260 Unit ns ns ns ns ns ns Table 9. 3.3 V ±10% Power Supply Parameter Output delay from PCLK to ACKN rising edge Output delay from PCLK to ACKN falling edge Output delay from PCLK to data output Dxi Output delay from PCLK to analog output AVx Output delay from OE to data high-Z Output delay from OE to data output Symbol tPLHACKN tPHLACKN tPDATA tPAVIDEO tDATAZ tZDATA Test Level I I I I IV IV 34 47 Min Typ Max 145 145 120 250 Unit ns ns ns ns ns ns 9 2150B–BIOM–09/03 Figure 4. Reset Reset RST tHRST