512K x 8 SRAM SRAM MEMORY ARRAY

SRAM Austin Semiconductor, Inc. 512K x 8 SRAM SRAM MEMORY ARRAY AVAILABLE AS MILITARY SPECIFICATION • SMD 5962-95600 • SMD 5962-95613 • MIL STD-883 AS5C4008 PIN ASSIGNMENT (Top View) 32-Pin DIP (CW), 32-Pin LCC (EC) 32-Pin SOJ (ECJ) A18 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 Vss 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 Vcc A15 A17 WE A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 FEATURES • • • • • • High Speed: 17, 20, 25, 35 and 45ns High-performance, low power military grade device Single +5V ±10% power supply Easy memory expansion with CE and OE options All inputs and outputs are TTL-compatible Ease of upgradability from 1 Meg using the 32 pin evolutionary version. OPTIONS • Timing 15ns access (contact factory) 17ns access 20ns access 25ns access 35ns access www.DataSheet4U.com 45ns access • Operating Temperature Range Military: -55oC to +125oC Industrial: -40oC to +85oC • Packages Ceramic Dip (600 mil) Ceramic Flatpack Ceramic LCC Ceramic SOJ Ceramic LCC (contact factory) • Options 2V data retention/ low power MARKING -15 -17 -20 -25 -35 -45 XT IT CW F EC ECJ ECA L No. 112 No. 304 No. 209 No. 502 No. 208 32-Pin Flat Pack (F) A18 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 Vss 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 Vcc A15 A17 WE A13 A8 A9 A11 OE A10 CE I/O7 I/O6 I/O5 I/O4 I/O3 GENERAL DESCRIPTION The AS5C4008 is a 4 megabit monolithic CMOS SRAM, organized as a 512K x 8. The evolutionary 32 pin device allows for easy upgrades from the 1 meg SRAM. For flexibility in high-speed memory applications, ASI offers chip enable (CE) and output enable (OE) capabilities. These enhancements can place the outputs in High-Z for additional flexibility in system design. Writing to these devices is accomplished when write enable (WE) and CE inputs are both LOW. Reading is accomplished when WE remains HIGH and CE and OE go LOW. This allows systems designers to meet low standby power requirements. All devices operate from a single +5V power supply and all inputs are fully TTL-Compatible. AS5C4008 Rev. 5.5 12/01 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 4 3 2 32 31 30 5 29 1 6 28 7 27 8 26 9 25 10 24 11 23 12 22 13 21 14 15 16 17 18 19 20 I/O6 I/O5 I/O4 I/O3 Vss I/O2 I/O1 A12 A14 A16 A18 Vcc A15 A17 NOTE: Not all combinations of operating temperature, speed, data retention and low power are necessarily available. Please contact factory for availability of specific part number combinations. 32-Pin LCC (ECA) WE A13 A8 A9 A11 OE A10 CE I/O 7 For more products and information please visit our web site at www.austinsemiconductor.com Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 1 SRAM Austin Semiconductor, Inc. FUNCTIONAL BLOCK DIAGRAM Vcc GND AS5C4008 Row Decoder Input Buffer A0:A18 2,097,152 Bit Memory Array I/O Control I/O7 I/O1 CE OE WE Column Decoder Power Down TRUTH TABLE MODE OE CE WE STANDBY X H X READ L L H NOT SELECTED H L H WRITE X L L DQ POWER High-Z STANDBY Q ACTIVE High-Z ACTIVE D ACTIVE AS5C4008 Rev. 5.5 12/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 2 SRAM Austin Semiconductor, Inc. ABSOLUTE MAXIMUM RATINGS* Voltage on Vcc Supply Relative to Vss...................-.5V to +7.0V Storage Temperature ............................................-65°C to +150°C Short Circuit Output Current (per I/O)….............................20mA Voltage on any Pin Relative to Vss......................-.5V to Vcc+1 V Maximum Junction Temperature**....................................+150°C AS5C4008 *Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. ** Junction temperature depends upon package type, cycle time, loading, ambient temperature and airflow. ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS (-55oC VIH; Vcc = MAX f = 0, Outputs Open SYM ICCSP ICCLP ISBTSP ISBTLP ISBCSP ISBCLP -15 225 180 60 30 25 10 -17 225 180 60 30 25 10 -35 225 180 60 30 25 10 -45 225 180 60 30 25 10 UNITS NOTES mA mA mA mA mA mA 3 Power Supply Current: Standby L Version Only CE < VCC -0.2V; Vcc = MAX VIN < Vss +0.2V or VIN > Vcc -0.2V; f = 0 L Version Only CAPACITANCE PARAMETER Input Capacitance Output Capactiance CONDITIONS TA = 25 C, f = 1MHz VIN = 0 o SYMBOL CI Co MAX 12 14 UNITS pF pF NOTES 4 4 AS5C4008 Rev. 5.5 12/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 3 SRAM Austin Semiconductor, Inc. AS5C4008 ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (-55oC (Vcc -0.2V) VIN > (Vcc -0.2V) or < 0.2V VCC = 2V SYMBOL VDR ICCDR tCDR tR 0 10 MIN 2 4.5 MAX UNITS V mA ns ms 4 4, 11 NOTES AS5C4008 Rev. 5.5 12/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 5 SRAM Austin Semiconductor, Inc. LOW VCC DATA RETENTION WAVEFORM DATA RETENTION MODE VDR >2V Vcc CDR tCDR AS5C4008 4.5V 4.5V t tR tR VDR VIH CE VIL READ CYCLE NO. 1 8, 9 (Write Enabled Controlled) t RC tRC ADDRESS VALID t AA tAA t OH tOH DQ PREVIOUS DATA VALID DATA VALID READ CYCLE NO. 2 7, 8, 10 (Write Enabled Controlled) tRC tRC CE AOE tAOE LZOE tLZOE t t tHZOE tHZOE OE LZCE tLZCE t ttACE ACE DATA VALID tHZCE tHZCE DQ ttPU PU Icc ttPD PD AS5C4008 Rev. 5.5 12/01 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 6 SRAM Austin Semiconductor, Inc. WRITE CYCLE NO. 1 12 (Chip Enabled Controlled) tWC tWC ADDRESS AS5C4008 tAW tAW tAS CE tAS tCW tCW t AH tAH ttWP WP WE tDS tDS D Q DATA VAILD t DH tDH HIGH Z WRITE CYCLE NO. 2 12, 13 (Write Enabled Controlled) WC