Automotive LCD TV signal processor IC

ICs for TV AN2546FH-A Automotive LCD TV signal processor IC I Overview The AN2546FH-A is a video signal processing IC built-in a 5-volt power-supply source driver for TFT color LCD (normally white type), and it supports the NTSC, PAL and PAL-M/PAL-N systems. The main circuitry of this IC includes video-signal processing circuit, color signal processing circuit, interface circuit, synchronizing circuit and many color quality adjusting circuits. This IC converts the composite video signal or separated Y/C signal or RGB signals into RGB signals available for TFT color LCD. 12.00±0.20 10.00±0.20 48 49 33 32 Unit: mm 64 1 0.50 16 17 (1.25) I Features • Supply voltage: 3 V/5 V/7.5 V • Built-in a 5-volt power-supply source driver for TFT type LCD • Low consumption power (typ. 200 mW) • Supporting the NTSC, PAL, PAL-M and PAL-N • Supporting composite, component and color differential signal input • Video signal analog RGB (2 systems) One is for OSD (analog/digital). • Each mode setting is possible with I2C Bus control. • Electronic volume (D/A converter) built in • Contrast/Brightness/γ correction circuit built in • Horizontal and vertical display position adjustment are possible by serial control. • Improvement of weak electric field characteristics (Compared to AN2526FH/AN2526NFH: −5 dB) • At reverse stop, built-in output gain down function 0.10±0.10 +0.10 0.18–0.05 +0.1 0.15–0.05 1.95±0.20 (1.25) 10.00±0.20 12.00±0.20 (1.00) Seating plane 0° to 10° 0.50±0.20 QFP064-P-1010 Note) The package of this product will be changed to lead-free type (QFP064-P-1010A). See the new package dimensions section later of this datasheet. I Applications • 4 inches to 7 inches middle size TFT LCD equipment of normally white, of such as an in-car TV and an LCD monitor for car navigation system. Publication date: February 2002 SDB00081AEB 1 2 L-det. Sync. in 0.47 µF NAVI VCC1 sync. (5.0 V) VDD NRGB POL C-sync. VSS 82 kΩ SCP 15 µF AFC 10 kΩ 3.3 kΩ det. 0.022 µF GND2 1 MΩ 0.02 µF 50 kΩ 100 kΩ 680 pF VCC3 68 kΩ AN2546FH-A VCC1 330 Ω SDATA SCLCK 15 kΩ 4.7 µF 1 500 pF 48 Reg. I2C Bus Sync. sepa. VCO 1/n Logic Logic Logic 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 1. Composite signal input Composite signal PONR 49 Logic 32 31 10 µF 33 kΩ HHKILL VSYNC drop Phase comp. f det. 2.2 µF 50 COM DC HD VD PWM 30 29 PWM VCC3 (3.0 V) DAC I Application Circuit Examples SECAM black level adj. Clamp SW Vert. count Delay Invert Sharpness ACC amp. R-Y, B-Y DEMOD GCA Gamma Limit Sync. cut 51 DAC 330 kΩ 1 kΩ 52 47 µH 4.7 µF Y-in 53 VCOM 28 27 VCOM R-out det. 2.2 µF 26 R-out 25 24 VCC2 (7.5 V) 23 2 kΩ NTSC = 39 pF 0.1 µF PAL = 27 pF 55 Y-det. 54 ACC det. BPF 56 SDB00081AEB Bright APC YUV SW GCA Killer Reg. Int./Ext. SW G-Y gene. VXO gene. VXO Tint Matrix OSD SW C-in 0.1 µF ACC det. 57 VCC1 (5.0 V) 58 Contrast 0.01 µF GND1 22 G-out det. 2.2 µF 21 G-out 20 59 GND3 0.1 µF 60 Kill det. 0.02 µF 61 APC det. 62 B-out det. 2.2 µF 19 B-out 18 Clamp. 17 BLAK YS 63 1 µF 5.1 kΩ Recommended crystal oscillator SC out NTSC: VSX0160 NTSC (KINSEKI, Limited) PAL: VSX0162 PAL or (KINSEKI, Limited) PAL-M 64 10 11 12 13 14 15 16 1 2 3 4 5 6 15 µF 7 8 9 Be sure to attach a power supply filter to a power supply pin. 47 µH 1 µF VCC1 (5.0 V) V REF R-in1 B-Y in G-in1 B-in1 1 µF 1 µF Power supply pin R-Y out B-Y out R-Y in 15 µF PAL-N R-in2 G-in2 B-in2 R-det. G-det. B-det. • C coupling input in an analog OSD mode. • Connect to GND in case of no use in a digital OSD mode. L-det. Sync. in 0.47 µF NAVI VCC1 sync. (5.0 V) VDD NRGB POL C-sync. 35 34 33 39 38 37 36 VCC3 50 kΩ 100 kΩ 82 kΩ SCP 680 pF 68 kΩ VSS VCC1 AFC 10 kΩ 3.3 kΩ det. 15 µF 41 40 48 47 46 45 44 43 42 330 Ω SDATA SCLCK 0.022 µF GND2 1 MΩ 0.02 µF 15 kΩ Brightness and syncronous signal Reg. I2C Bus Sync. sepa. VCO 1/n Logic Logic Logic 32 31 PWM 30 29 VCOM 28 27 Invert Sharpness ACC amp. R-Y, B-Y DEMOD GCA Gamma Limit 4.7 µF 1 500 pF 2. Component signal input PONR 49 10 µF 33 kΩ HHKILL VSYNC drop Phase comp. f det. 2.2 µF 50 COM DC Logic HD VD PWM VCC3 (3.0 V) VCOM DAC SECAM black level adj. Clamp SW Vert. count Delay Sync. cut 51 DAC 330 kΩ 1 kΩ 52 4.7 µF Y-in 53 I Application Circuit Examples (continued) 54 0.1 µF Y-det. 55 R-out det. 2.2 µF 26 R-out 25 24 VCC2 (7.5 V) 23 ACC det. BPF 56 0.1 µF ACC det. SDB00081AEB Bright APC YUV SW GCA Killer Reg. 1 2 3 4 5 6 7 8 C-in 57 VCC1 (5.0 V) 58 Contrast 0.01 µF GND1 22 G-out det. 21 2.2 µF G-out 20 59 GND3 0.1 µF 60 Kill det. 0.02 µF 61 APC det. Tint G-Y gene. VXO gene. VXO 1 µF 5.1 kΩ SC out 62 Matrix OSD SW B-out det. 19 2.2 µF B-out 18 Int./Ext. SW 10 11 9 63 BLAK Clamp. 12 13 14 15 16 Recommended crystal oscillator NTSC: VSX0160 NTSC (KINSEKI, Limited) PAL: VSX0162 PAL or (KINSEKI, Limited) PAL-M 15 µF VCC1 (5.0 V) V REF B-Y in 64 17 YS 1 µF R-in1 G-in1 B-in1 1 µF 1 µF Be sure to attach a power supply filter to a power supply pin. 47 µH Power supply pin R-Y out B-Y out R-Y in AN2546FH-A 15 µF PAL-N R-in2 G-in2 B-in2 R-det. G-det. B-det. • C coupling input in an analog OSD mode. • Connect to GND in case of no use in a digital OSD mode. 3 4 VCC1 510 kΩ 510 kΩ L-det. 50 kΩ 100 kΩ 82 kΩ POL C-sync. SCP GND2 NRGB 15 µF VDD VSS 1 MΩ 0.02 µF 680 pF VCC3 Required only when not using crystal oscillators. 0.022 µF Sync. in 0.47 µF NAVI VCC1 sync. (5.0 V) AFC 10 kΩ 3.3 kΩ det. AN2546FH-A 68 kΩ VCC1 330 Ω SDATA SCLCK 3. Analog RGB signal input 15 kΩ 4.7 µF 1 500 pF 48 Reg. I2C Bus Sync. sepa. VCO 1/n Logic Logic 47 46 45 44 43 42 41 40 39 38 37 36 35 34 Synchronous signal PONR 49 Logic Logic 33 32 31 PWM 30 29 VCOM 28 27 HD VD PWM VCC3 (3.0 V) VCOM 10 µF 33 kΩ HHKILL VSYNC drop Phase comp. f det. 2.2 µF 50 COM DC DAC SECAM black level adj. Clamp SW Vert. count Delay Invert Sharpness ACC amp. R-Y, B-Y DEMOD GCA Gamma Limit Sync. cut 51 DAC 330 kΩ 1 kΩ 52 I Application Circuit Examples (continued) 53 Possible to change the synchronous signal input pin according to the channnel 10 value. Possible to input to pin 45 by 3 V[p-p] positive polarity pulse. 54 55 R-out det. 2.2 µF 26 R-out 25 24 Contrast 23 22 Bright 0.01 µF GND1 VCC2 (7.5 V) SDB00081AEB BPF APC YUV SW GCA Killer Reg. Int./Ext. SW Clamp. VXO gene. VXO Tint G-Y gene. Matrix OSD SW 56 ACC det. 57 VCC1 (5.0 V) 58 GND3 59 60 G-out det. 2.2 µF 21 G-out 20 61 Recommended crystal oscillator NTSC: VSX0160 (KINSEKI, Limited) PAL: VSX0162 (KINSEKI, Limited) 62 B-out det. 2.2 µF 19 B-out 18 17 BLAK YS NTSC 63 Apply a half VCC1 voltage to pin 42 according to resistance division when not connecting crystal oscillators. PAL or PAL-M 64 10 11 12 13 14 15 16 1 2 3 4 5 6 Be sure to attach a power supply filter to a power supply pin. 47 µH 15 µF 4.7 µF 4.7 µF 4.7 µF VCC1 (5.0 V) V REF R-in1 G-in1 B-in1 7 8 9 1 µF 1 µF 1 µF Power supply pin 15 µF PAL-N R-in2 G-in2 B-in2 R-det. G-det. B-det. • C coupling input in an analog OSD mode. • Connect to GND in case of no use in a digital OSD mode. AN2546FH-A I Pin Descriptions Pin No. 1 2 3 4 5 6 Description Crystal oscillator connecting pin 3 (PAL-N) R-Y output pin B-Y output pin R-Y input pin B-Y input pin Signal processing system power supply (VCC1 = 5.0 V) 7 Internal reference power supply detection pin (2.0 V) 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 R-ch. analog signal input pin G-ch. analog signal input pin B-ch. analog signal input pin R-ch. clamp detection pin G-ch. clamp detection pin B-ch. clamp detection pin R-ch. OSD input pin G-ch. OSD input pin B-ch. OSD input pin Character picking up pulse input pin Side black control signal input pin B-ch. output pin B-ch. output DC feedback detection pin G-ch. output pin G-ch. output DC feedback detection pin GND 1 Drive output reference voltage input pin Drive system power supply (VCC2 = 7.5 V) R-ch. output pin R-ch. output DC feedback detection pin Common reverse signal output pin Pulse output system power supply (VCC3 = 3.0 V) 30 31 32 PWM output pin Vertical synchronous signal output pin Horizontal synchronous signal output pin 59 60 61 62 63 64 45 46 47 48 49 50 51 52 53 54 55 56 57 58 Pin No. 33 34 35 36 37 38 39 40 41 42 43 44 Description Sand castle pulse output pin Composite synchronous signal output pin Vertical synchronous signal input pin 1H reverse signal input pin Clock-system GND (VSS) Analog imposing control signal input pin Horizontal clock detection pin Clock-system power supply (3.0 V) GND 2 AFC loop filter connecting pin VCO frequency adjustment pin Synchronous system power supply (VCC1 = 5.0 V) NAVI signal synchronous signal input pin Synchronous signal input pin Serial data shift clock input pin Serial data input pin Power-on reset detection pin Common DC adjustment voltage output pin DAC output pin Luminance signal input pin Chrominance signal trap filter connection pin 1 Chrominance signal trap filter connection pin 2 Y-system clamp detection pin ACC detection pin Chrominance signal input pin Chrominance processing system power supply (VCC1 = 5.0 V) GND 3 Chrominance killer detection pin APC detection pin Subcarrier output pin Crystal oscillator connecting pin 1 (NTSC) Crystal oscillator connecting pin 2 (PAL/PAL-M) SDB00081AEB 5 AN2546FH-A I Absolute Maximum Ratings Parameter Supply voltage Symbol VCC1 VCC2 VCC3 Supply current Power dissipation *2 *1 Rating 5.5 8.5 5.2  423 −30 to +85 −55 to +150 Unit V ICC PD Topr Tstg *1 mA mW °C °C Operating ambient temperature Storage temperature Note) *1: Except for the operating ambient temperature and storage temperature, all ratings are for Ta = 25°C. *2: The power dissipation shown is the val