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Avance Logic,Inc.
ALC100
ALC100/ALC100P AC’97 Audio CODEC
Revision 1.1 May 25, 2000
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Avance Logic,Inc.
1. Features :
l l l l l l l l l l l l l l l l l
ALC100
Single chip audio CODEC with high S/N ratio. 16-bit ADC and DAC resolution. Compliant with AC’97 2.1 specification Supports AMR and CNR applications. 16-bit stereo full-duplex CODEC with fixed 48k sampling rate. 4 analog line-level stereo input with 5-bit volume control : LINE_IN,CD,VIDEO,AUX 2 analog line-level mono input : PC_BEEP,PHONE_IN. Mono output with 5-bit volume control. Stereo output with 5-bit volume control. 2 MIC inputs : Software selectable. Power management. 3D Stereo Enhancement True Line-Level output Multiple CODEC extension. External Amplifier power down capability. Dual power support : Digital :5V/3.3V Analog : 5V` Standard 48-Pin LQFP Package
2. Pin Description :
2.1
Name RESET# XTL-IN XTL-OUT SYNC BIT-CLK SDATA-OU T SDATA-IN ID0# ID1# EAPD PWRI# Type I I O I IO I O I I O I Type I I I I I I I I I I I I I O O O O O Pin No 11 2 3 10 6 5 8 45 46 47 48 Pin No 12 13 14 15 16 17 18 19 20 21 22 23 24 35 36 39 41 37
Digital I/O pins : 11 pins
Description AC'97 master H/W reset Crystal input pad (24.576Mhz) Crystal output pad Sample Sync (48Khz) Bit clock output (12.288Mhz) Serial TDM AC97 output Serial TDM AC97 input ID strap 0 ID strap 1 External Amplifier power down control Internal register reset (For test) Description PC speaker input speakerphone input AUX Left channel AUX Right channel Video audio Left channel Video audio Right channel CD audio Left channel CD audio analog GND CD audio Right channel First Mic input Second Mic input Line input Left channel Line input Right channel Line-Out Left channel Line-Out Right channel True Line Level output-Left True Line Level output-Right SpeakerPhone output Characteristic Definition CMOS input,Vt=0.35Vdd * Crystal input pad Crystal output pad CMOS input,Vt=0.35Vdd CMOS input/output Vt=0.35Vdd (Refer 6.2.5)* CMOS input,Vt=0.35Vdd CMOS output (Refer 6.2.5) CMOS input Vt=0.35Vdd with 50KW pull high CMOS input Vt=0.35Vdd with 50KW pull high 8mA CMOS output CMOS input Characteristic Definition Analog input (1Vrms) Analog input (1Vrms) Analog input (1Vrms) Analog input (1Vrms) Analog input (1Vrms) Analog input (1Vrms) Analog input (1Vrms) Analog input (1Vrms) Analog input (1Vrms) Analog input (1Vrms) Analog input (1Vrms) Analog input (1Vrms) Analog input (1Vrms) Analog output (1Vrms) Analog output (1Vrms) Analog output (1Vrms) Analog output (1Vrms) Analog output (1Vrms)
2.2
Analog I/O Pins : 18 pins
Name PC-BEEP PHONE AUX-L AUX-R VIDEO-L VIDEO-R CD-L CD-GND CD-R MIC1 MIC2 LINE-L LINE-R LINE-OUTL LINE-OUTR LNLVL-L LNLVL-R MONO-OU T
2.3
Name VREF
Filter/References : 11 pins
Type O Pin No 27 Description Reference voltage Characteristic Definition Analog output (2.25~2.75V)
-2–
Rev 1.1
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Avance Logic,Inc.
VREFOUT DALO DARO VRADDA DALI DALO ADLO ADRO ADLI ADRI O O O O O O O O O O 28 29 30 31 32 33 34 40 43 44 Reference voltage out with 5mA drive DA Left output filter DA Right output filter VRADDA filter DALI filter DARI filter AD Left filter AD Right filter ADLI filter ADRI filter Analog output (2.25~2.75V) Analog output Analog output Analog output Analog output Analog output Analog output Analog output Analog output Analog output
ALC100
2.4
Name AVDD1 AVDD2 AVSS1 AVSS2 VDD1 VDD2 VSS1 VSS2
Power/Ground : 8 pins
Type I I I I I I I I Pin No 25 38 26 42 1 9 4 7 Description Analog VDD (5.0V) Analog VDD (5.0V) Analog GND Analog GND Digital VDD (5.0V or 3.3V) Digital VDD (5.0V or 3.3V) Digital GND Digital GND Characteristic Definition
*When RESET# is active the BIT-CLK and SDATA-IN must be floating by internal pull low 100K resistors. So the ac-link signals are driven by another AC’97 on CNR board. This requirement is not mentioned in AC’97 specification rev2.1, please refer CNR (Communication Network Riser) specification rev1.0 page23~25 to get detail information.
-3–
Rev 1.1
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Avance Logic,Inc.
3. ALC100 Pin-Out Diagram :
LNLVL_OUT_R
ALC100
LNLVL_OUT_L
39
EAPD
ADRI
DVdd1 XTL_IN XTL_OUT DVss1 SDATA_OUT BIT_CLK DVss2 SDATA_IN DVdd2 SYNC RESET# PC_BEEP
1 2 3 4 5 6 7 8 9 10 11 12
48
47 46
45
44
43
42
41
40
38
MONO_OUT
37 36 35 34 33 32 31
ADRO
PWRI#
ID0#
ADLI
ID1#
AVdd2
AVss2
LINE_OUT_R LINE_OUT_L ADLO DARI DALI VRADDA DARO DALO Vrefout Vref AVss1 AVdd1
ALC100/ALC100P
30 29 28 27 26 25
13
14
15
16
17
18
19
20
21
22
23
24
LINE_IN_L
VIDEO_L
Pinout Diagram of ALC100/ALC100P
-4–
LINE_IN_R
VIDEO_R
CD_L
CD_GND
PHONE
AUX_L
AUX_R
CD_R
MIC1
MIC2
Rev 1.1
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Avance Logic,Inc.
4. Mixer Register :
All mixer register access with odd-number will return with 0. Reading unimplemented registers will return 0.
MX00 Bit 15 14:10 9 8 7 6 5 4 3 2 1 0 ignored. MX02 Bit 15 14:13 12:8 7:5 4:0
ALC100
Reset Default : 5800h Type Function Reserved R return 16H R Read as 0 (No support 20-bit ADC) R Read as 0 (No support 18-bit ADC) R Read as 0 (No support 20-bit DAC) R Read as 0 (No support 18-bit DAC) R Read as 0 (No support for Loudness) R Read as 0 (No HeadPhone-Out support) R Read as 0 (No simulated stereo ,for analog 3D block use) R Read as 0 (No Bess & Treble Control) R Reserved,Read as 0 R Read as 0 (No Dedicated Mic PCM input) Œ Write to this register will reset all mixer registe2r to their default value. The write data is Master Volume Default : 8000h Type Function R/W Mute Control 0 : Normal 1 : Mute (-¥ dB) Reserved R/W Master Left Volume (MLV[4..0]) in 1.5 dB step Reserved R/W Master Right Volume (MRV[4..0]) in 1.5 dB step Œ For MRV/MLV, 00h 0 dB attenuation 1Fh 46.5 dB attenuation • MRV/MLV are 5-bit R/W variables. The 6th bit implementation is optional. For this reason, when 6th bit is written by 1,it is equivalent to writing low 5-bit with 1. For example, writing 1xxxxx will read back 01111. Line Level Output Volume Default : 8000h Type Function R/W Mute Control 0 : Normal 1 : Mute (-¥ dB) Reserved R/W Line Level Output Left Volume (LNLV[4..0]) in 1.5 dB step Reserved R/W Line Level Output Right Volume (LNRV[4..0]) in 1.5 dB step Œ For LNRV/LNLV, 00h 0 dB attenuation 1Fh 46.5 dB attenuation •Implement 5-bit volume control only. Writing 1xxxxx will be interpreted as x11111 and response when read with x11111 too. MONO_OUT Volume Default : 8000H Type Function R/W Mute Control 0 : Normal 1 : Mute (-¥ dB) Reserved R/W Mono Master Volume (MMV[4..0]) in 1.5 dB step Œ For MMV, 00h 0 dB attenuation 1Fh 46.5 dB attenuation •Implement 5-bit volume control only. Writing 1xxxxx will be interpreted as x11111 and -5– Rev 1.1
MX04 Bit 15 14:13 12:8 7:5 4:0
MX06 Bit 15 14:5 4:0
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Avance Logic,Inc.
MX0A Bit 15 14:5 4:1 0
ALC100
MX0C Bit 15 14:5 4:0
MX0E Bit 15 14:7 6 5 4:0
MX10 Bit 15 14:13 12:8 7:5 4:0
MX12 Bit 15 14:13 12:8 7:5 4:0
MX14 Bit
response when read with x11111 too. PC BEEP Volume Default : 0000H Type Function R/W Mute Control 0 : Normal 1 : Mute (-¥ dB) Reserved R/W PC Beep Volume (PBV[3..0]) in 3 dB step Reserved Œ For PBV, 00h 0 dB attenuation 0Fh 45 dB attenuation PHONE Volume Default : 8008H Type Function R/W Mute Control 0 : Normal 1 : Mute (-¥ dB) Reserved R/W Phone Volume (PV[4..0]) in 1.5 dB step Œ For PV, 00h +12 dB Gain 08h 0dB gain 1Fh -34.5dB Gain MIC Volume Default : 8008H Type Function R/W Mute Control 0 : Normal 1 : Mute (-¥ dB) Reserved R/W 20 dB boost control 0 : Normal 1: 20 dB boost Reserved R/W Mic Volume (MV[4..0]) in 1.5 dB step Œ For MV, 00h +12 dB Gain 08h 0dB gain 1Fh -34.5dB Gain LINE_IN Volume Default : 8808H Type Function R/W Mute Control 0 : Normal 1 : Mute (-¥ dB) Reserved R/W Line-In Left Volume (NLV[4..0]) in 1.5 dB step Reserved R/W Line-In Right Volume (NRV[4..0]) in 1.5 dB step Œ For NLV/NRV, 00h +12 dB Gain 08h 0dB gain 1Fh -34.5dB Gain CD Volume Default : 8808H Type Function R/W Mute Control 0 : Normal 1 : Mute (-¥ dB) Reserved R/W CD Left Volume (CLV[4..0]) in 1.5 dB step Reserved R/W CD Right Volume (CRV[4..0]) in 1.5 dB step Œ For CLV/CRV, 00h +12 dB Gain 08h 0dB gain 1Fh -34.5dB Gain VIDEO Volume Default : 8808H Type Function
-6–
Rev 1.1
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Avance Logic,Inc.
15 14:13 12:8 7:5 4:0 Mute Control 0 : Normal 1 : Mute (-¥ dB) Reserved R/W Video Left Volume (VLV[4..0]) in 1.5 dB step Reserved R/W Video Right Volume (VRV[4..0]) in 1.5 dB step Œ For VLV/VRV, 00h +12 dB Gain 08h 0dB gain 1Fh -34.5dB Gain AUX Volume Default : 8808H Type Function R/W Mute Control 0 : Normal 1 : Mute (-¥ dB) Reserved R/W AUX Left Volume (ALV[4..0]) in 1.5 dB step Reserved R/W AUX Right Volume (ARV[4..0]) in 1.5 dB step Œ For ALV/ARV, 00h +12 dB Gain 08h 0dB gain 1Fh -34.5dB Gain PCM_OUT Volume Default 8808H Type Function R/W Mute Control 0 : Normal 1 : Mute (-¥ dB) Reserved R/W PCM Volume (PLV[4..0]) in 1.5 dB step Reserved R/W PCM Right Volume (PRV[4..0]) in 1.5 dB step Œ For PLV/PRV, 00h +12 dB Gain 08h 0dB gain 1Fh -34.5dB Gain Record Select Default : 0000H Type Function Reserved R/W Left record source select (LRS[2..0]) Reserved R/W Right record source select (RRS[2..0]) Œ For LRS 0 MIC 1 CD LEFT 2 VIDEO LEFT 3 AUX LEFT 4 LINE LEFT 5 STEREO MIXER OUTPUT LEFT 6 MONO MIXER OUTPUT 7 PHONE • For RRS 0 MIC 1 CD RIGHT 2 VIDEO RIGHT 3 AUX RIGHT 4 LINE RIGHT 5 STEREO MIXER OUTPUT RIGHT 6 MONO MIXER OUTPUT 7 PHONE R/W
ALC100
MX16 Bit 15 14:13 12:8 7:5 4:0
MX18 Bit 15 14:13 12:8 7:5 4:0
MX1A Bit 15:11 10:8 7:3 2:0
-7–
Rev 1.1
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Avance Logic,Inc.
MX1C Bit 15 14:12 11:8 7:4 3:0
ALC100
Record Gain Default : 8000H Type Function R/W Mute Control 0 : Normal 1 : Mute (-¥ dB) Reserved R/W Left Record Gain Select (LRG[3..0]) in 1.5 dB step Reserved R/W Right Record Gain Select (RRG[3..0]) in 1.5 dB step Œ For LRG/RRG 0Fh +22.5dB 00h 0 dB (No Gain) MX20 General Purpose Register Default : 0000H Bit Type Function 15 R/W PCM output path
