20MSPS Sampling A/D Converter

ADSD-1420S Dual 14-Bit, 20MSPS Sampling A/D Converter FEATURES ■ ■ ■ ■ ■ ■ ■ 14-bit resolution; 20MSPS sampling rate Functionally complete; ±2.5V input range No missing codes over full temperature range Edge-triggered ±5V supplies, 1.6 Watts 75dB SNR, –80dB THD Ideal for both time and frequency-domain applications INPUT/OUTPUT CONNECTIONS PIN FUNCTION PIN FUNCTION 1 2 3 4 5 6 7 8 9 10 11 12 13 www.DataSheet4U.com INPUT A +5VA ANALOG GROUND N.C. OFFSET A RANGE 1.55V REF ANALOG GROUND –5V ENABLE A START A VDD BIT 14 (LSB) BIT 13 BIT 12 BIT 11 BIT 10 BIT 9 BIT 8 DGND 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 INPUT B +5VA ANALOG GROUND N.C. OFFSET B N.C. EOC A ANALOG GROUND –5V ENABLE B START B EOC B BIT 1 (MSB) BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 DGND GENERAL DESCRIPTION The ADSD-1420S is a functionally complete, dual 14-bit, 20MSPS, sampling A/D converter. Its standard, 40-pin, triple-wide SMT DIP contains two fast-settling sample/hold amplifiers, two 14-bit A/D converters, multiplexed output buffers, a precision reference, and all the timing and control logic necessary to operate from either two or a single start convert pulse. The ADSD-1420S is optimized for wideband frequency-domain applications and is fully FFT tested. The ADSD-1420S requires only ±5V supplies and typically consumes 1.6 Watts. The digital output power supply is capable of directly driving 5V or 3V logic systems. Models are available in either commercial 0 to +70°C or military -55 to +125°C operating temperature ranges. 14 15 16 17 18 19 20 ������������������� ���������������� � ����� � ��� ��� � ������������� ������� ������� ������� ������� ������� �������� ������ ������ ������ ������ ������ ���������������������� ����������������� � ����� � ��� ��� � ������ �������������� ��� ������ ������� ������ ��������� ������������ ����������� ��������������� ������������������ �������� ���������� ������������� �������� �� ��� ����� ��� ����� ���� �������������� ���� ������ ���� ��������� ��� Figure 1. ADSD-1420S Functional Block Diagram www.cd4power.com Page 1 of 5 ADSD-1420S ABSOLUTE MAXIMUM RATINGS PARAMETERS +5VCC Supply (Pins 2, 39) –5VEE Supply (Pins 9, 32) VDD Supply (Pin 12) Digital Inputs (Pins 10, 11, 30, 31) Analog Input (Pins 1, 40) Lead Temp. (10 seconds) LIMITS 0 to +6 0 to –6 –0.3 to (VCC +0.3) –0.3 to (VDD +0.3) ±7 +300 UNITS Volts Volts Volts Volts Volts °C DYNAMIC PERFORMANCE Total Harm. Distort. (–0.5dB) dc to 500kHz 500kHz to 10MHz Signal-to-Noise Ratio (w/o distortion, –0.5dB dc to 500kHz 500kHz to 10MHz Signal-to-Noise Ratio (and distortion, –0.5dB) dc to 500kHz 500kHz to 10MHz Spurious Free Dyn. Range ➀ dc to 500kHz 500kHz to 10MHz Two-tone IMD Distortion (fin = 9.68MHz, fs = 20MHz, –0.5dB) Input Bandwidth (–3dB) Small Signal (–20dB input) Large Signal (–0.5dB input) Aperture Delay Time Aperature Uncertainty S/H Acq. Time, (to ±0.003%FSR) Step input Feedthrough Rejection (fin = 10MHz) Noise TIMING SPECIFICATIONS — — — –0.99 –0.99 –0.99 — — — — — — ±1 ±1 ±2 ±0.5 ±0.5 ±0.75 ±0.25 ±0.25 ±0.5 ±0.3 ±0.3 ±0.6 — — — +1.5 +1.5 +1.75 ±0.5 ±0.5 ±0.8 ±0.6 ±0.6 ±0.8 LSB LSB LSB LSB LSB LSB %FSR %FSR %FSR %FSR %FSR %FSR Conversion Rate Start Convert High Start Convert Low Start Convert to EOC Delay EOC to Data Valid Delay Output Enable Delay Output Disable Delay POWER REQUIREMENTS Power Supply Ranges –5VEE Supply +5VCC Supply VDD Supply Power Supply Currents –5VEE Supply +5VCC Supply VDD Supply Power Dissipation Power Supply Rejection Volts Volts Volts Volts mA mA mA mA Volts Volts mA PHYSICAL/ENVIRONMENTAL Oper. Temp. Range, Ambient ADSD-1420S ADSD-1420S-EX Storage Temperature Range Package Type 0 –55 –65 –5.25 +4.75 +3.0 –100 — — — — 1 20 20 2 0 1 1 MIN. — — 73 73 71 71 — — — — — — — — — —   TYP . –81 –80 75 75 74 74 –83 –82 –78 25 25 — — — 85 250 — 25 25 6 7 6 6 MAX. –77 –74 — — — — –80 –76 — — — ±10 5 25 — — 20 500 500 10 12 13 13 UNITS dB dB dB dB dB dB dB dB dB MHz MHz ns ps ns dB µVrms MHz ns ns ns ns ns ns FUNCTIONAL SPECIFICATIONS ANALOG INPUTS Input Voltage Range Input Impedence Input Capacitance DIGITAL INPUTS Logic Levels Logic "1" Logic "0" Logic Loading "1" Logic Loading "0" PERFORMANCE Integral Non-Linearity +25°C (fin=10kHz) 0 to +70°C –55 to +125°C Differential Non-Linearity (fin = 10kHz) +25°C 0 to +70°C –55 to +125°C Offset Error +25°C (see Figure 3) 0 to +70°C –55 to +125°C Gain Error +25°C (see Figure 3) 0 to +70°C –55 to +125°C No Missing Codes 14 Bits Resolution OUTPUTS Output Coding Logic Level Logic "1" +2.4 — — — MIN. — 610 — (TA = +25°C, VCC = +5V, VDD = +5V, VEE = –5V, 20MSPS sampling rate,Vin = ±2.5V and a minimum 7 minute warmup unless otherwise specified.) TYP . ±2.5V 620 7 MAX. — 630 15 UNITS Volts Ω pF — — — — — +0.8 +10 –10 Volts Volts µA µA –5.0 +5.0 +5.0 –89 +230 +2.0 1.6 — –4.75 +5.25 VCC — +245 +5.0 1.7 ±0.01 Volts Volts Volts mA mA mA Watts %FSR%V –55 to +125°C 14 Bits Offset Bin. +3.8 +2.48 — — — — — — +1.5 +1.5 — — — — — — — — — +1.55 +1.55 — — — +0.5 +0.5 –8 –4 +8 +4 +1.6 +1.6 5 VDD = +5V VDD = +3.3V Logic "0" VDD = +5V VDD = +3.3V Logic Loading "1" VDD = +5V VDD = +3.3V Logic Loading "0" VDD = +5V VDD = +3.3V Internal Reference Voltage, +25°C 0 to +70°C External Current — +70 — +125 — +150 40-pin, SMT TDIP °C °C °C Footnote: ➀ Same specification as In-Band Harmonics and Peak Harmonics. www.cd4power.com Page 2 of 5   ADSD-1420S TECHNICAL NOTES 1. Rated performance requires using good high-frequency circuit board layout techniques. Connect the digital and analog grounds to one point, the analog ground plane beneath the converter. Due to the inductance and resistance of the power supply return paths, return the analog and digital ground separately to the power supplies. Table 2. Offset Adjustment Input Range ±2.5V Offset Adjust +1/2 LSB +0.000153V Table 3. Output Coding CALIBRATION PROCEDURE 1. Connect the converter per Figure 3. Apply a pulse of 50 nanoseconds typical to START CONVERT (pin 11) at a rate of 2MHz. This rate is chosen to reduce flicker if LED's are used on the outputs for calibration purposes. 2. Zero (Offset) Adjustments Apply a precision voltage reference source between ANALOG INPUT A (pin 1) and SIGNAL GROUND (pin 3), then adjust the reference source output per Table 2. Adjust trimpot R1 until the code flickers equally between 10 0000 0000 0000 and 10 0000 0000 0001. 3. Repeat above step for Analog Input B (Pin 40). Use trimpot R2 for the zero (Offset) adjustment . OUTPUT CODING MSB LSB INPUT RANGE ±2.5V BIPOLAR SCALE 11 11 11 10 01 00 00 00 1111 1000 0000 0000 0000 1000 0000 0000 1111 0000 0000 0000 0000 0000 0000 0000 1111 0000 0000 0000 0000 0000 0001 0000 +2.499695 +1.875000 +1.250000 ±0.000000 –1.250000 –1.875000 –2.499695 –2.500000 +FS – 1LSB +3/4FS +1/2FS 0 –1/2FS –3/4FS –FS+1LSB –FS 4. To confirm proper operation of the device, vary the precision reference voltage source to obtain the output coding listed in Table 3. � ����� ������� �������� �������� ����� ��� �������� �������������������� �������� �������� Figure 2. ADSD-1420S Timing Diagram www.cd4power.com Page 3 of 5 ADSD-1420S   ��� ����� ����� ��� ��� ����� ������� ������� ���� ���� �� ���� ����� ����� ��� ����� ����� ���� �������������� �������� ������������������������ ��� ���� �������� �� �� ��� ��� ����������� ���������� ����������� ��� ��� ����� �� ������� �� ������� �������� ������������ ��� Notes: ��� ➀ Outputs are enabled by either turning ENABLE A (Pin 10) or ENABLE B (Pin 31) low for respective analog inputs A or B. A high on both ENABLE A and ENABLE B results in disabling the output bus (High Z). See timing diagram for details. Figure 3. ADSD-1420S Connection Diagram THERMAL REQUIREMENTS The ADSD-1420S sampling A/D converter is fully characterized and specified over the commercial operating temperature (ambient) range of 0 to +70°C and military temperature range of –55 to +125°C (EX suffix). All room-temperature (TA = +25°C) production testing is performed without the use of heat sinks or forced-air cooling. Thermal impedance figures for each device are listed in their respective specification tables. These devices do not normally require he