Micro Power A/D Converter

ADC121S705 12-Bit, 500 kSPS to 1 MSPS, Differential Input, Micro Power A/D Converter December 2006 ADC121S705 12-Bit, 500 kSPS to 1 MSPS, Differential Input, Micro Power A/D Converter General Description The ADC121S705 is a 12-bit, 500 kSPS to 1 MSPS sampling Analog-to-Digital (A/D) converter that features a fully differential, high impedance analog input and an external reference. The reference voltage can be varied from 1.0V to VA, with a corresponding resolution between 244µV and VA divided by 4096. The output serial data is binary 2's complement and is compatible with several standards, such as SPI™, QSPI™, MICROWIRE™, and many common DSP serial interfaces. The differential input, low power consumption, and small size make the ADC121S705 ideal for direct connection to transducers in battery operated systems or remote data acquisition applications. Operating from a single 5V supply, the supply current when operating at 1 MSPS is typically 2.3 mA. The supply current drops down to 0.3 µA typically when the ADC121S705 enters power-down mode. The ADC121S705 is available in the MSOP-8 package. Operation is guaranteed over the industrial temperature range of −40°C to +105°C and clock rates of 8 MHz to 16 MHz. www.DataSheet4U.com Features ■ ■ ■ ■ ■ True Differential Inputs Guaranteed performance from 500 kSPS to 1 MSPS External Reference Wide Input Common-Mode Voltage Range SPI™/QSPI™/MICROWIRE™/DSP compatible Serial Interface Key Specifications ■ ■ ■ ■ ■ ■ ■ ■ Conversion Rate INL DNL Offset Error Gain Error SINAD Power Consumption at VA = 5V — Active, 1 MSPS — Active, 500 kSPS — Power-Down 500 kSPS to 1 MSPS ± 0.95 LSB (max) ± 0.95 LSB (max) ± 3.0 LSB (max) ± 6.5 LSB (max) 69.5 dB (min) 11.5 mW (typ) 9.0 mW (typ) 1.5 µW (typ) Applications ■ ■ ■ ■ ■ ■ Automotive Navigation Portable Systems Medical Instruments Instrumentation and Control Systems Motor Control Direct Sensor Interface Connection Diagram 20186705 Ordering Information Order Code ADC121S705CIMM ADC121S705CIMMX ADC121S705EB TRI-STATE® is a trademark of National Semiconductor Corporation. MICROWIRE™ is a trademark of National Semiconductor Corporation. QSPI™ and SPI™ are trademarks of Motorola, Inc. Temperature Range −40°C to +105°C −40°C to +105°C Description 8-Lead MSOP Package, 1000 Units Tape & Reel 8-Lead MSOP Package, 3500 Units Tape & Reel Evaluation Board Top Mark X1AC X1AC © 2007 National Semiconductor Corporation 201867 www.national.com ADC121S705 Block Diagram 20186702 Pin Descriptions and Equivalent Circuits Pin No. Symbol Description Voltage Reference Input. A voltage reference between 1V and VA must be applied to this input. VREF must be decoupled to GND with a minimum ceramic capacitor value of 0.1 µF. A bulk capacitor value of 1.0 µF to 10 µF in parallel with the 0.1 µF is recommended for enhanced performance. Non-Inverting Input. +IN is the positive analog input for the differential signal applied to the ADC121S705. Inverting Input. −IN is the negative analog input for the differential signal applied to the ADC121S705. Ground. GND is the ground reference point for all signals applied to the ADC121S705. Chip Select Bar. CS is active low. The ADC121S705 is in Normal Mode when CS is LOW and Power-Down Mode when CS is HIGH. A conversion begins on the fall of CS. Serial Data Output. The conversion result is provided on DOUT. The serial data output word is comprised of 4 null bits and 12 data bits (MSB first). During a conversion, the data is outputted on the falling edges of SCLK and is valid on the rising edges. Serial Clock. SCLK is used to control data transfer and serves as the conversion clock. Power Supply input. A voltage source between 4.5V and 5.5V must be applied to this input. VA must be decoupled to GND with a ceramic capacitor value of 0.1 µF in parallel with a bulk capacitor value of 1.0 µF to 10 µF. 1 VREF 2 3 4 5 +IN −IN GND CS 6 7 8 DOUT SCLK VA www.national.com 2 ADC121S705 Absolute Maximum Ratings (Notes 1, 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Analog Supply Voltage VA Voltage on Any Pin to GND Input Current at Any Pin (Note 3) Package Input Current (Note 3) Power Consumption at TA = 25°C ESD Susceptibility (Note 5) Human Body Model Machine Model Charge Device Model Junction Temperature Storage Temperature −0.3V to 6.5V −0.3V to (VA +0.3V) ±10 mA ±50 mA See (Note 4) 2500V 250V 750V +150°C −65°C to +150°C Operating Ratings (Notes 1, 2) −40°C ≤ TA ≤ +105°C Supply Voltage, VA +4.5V to +5.5V Reference Voltage, VREF 1.0V to VA Input Common-Mode Voltage, VCM See Figure 8 (Sect 2.3) Digital Input Pins Voltage Range 0 to VA Clock Frequency 8 MHz to 16 MHz Differential Analog Input Voltage −VREF to +VREF Operating Temperature Range Package Thermal Resistance Package 8-lead MSOP θJA 200°C / W Soldering process must comply with National Semiconductor's Reflow Temperature Profile specifications. Refer to www.national.com/packaging. (Note 6) ADC121S705 Converter Electrical Characteristics (Note 8) The following specifications apply for VA = +4.5V to 5.5V, VREF = 2.5V, fSCLK = 8 to 16 MHz, fIN = 100 kHz, CL = 25 pF, unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX; all other limits are at TA = 25°C. Symbol Parameter Conditions Typical Limits Units (Note 7) Bits LSB (max) LSB (max) LSB (max) LSB (max) LSB (max) LSB (max) dBc (min) dBc (min) dBc (max) dBc (min) bits (min) MHz MHz STATIC CONVERTER CHARACTERISTICS Resolution with No Missing Codes INL DNL OE FSE GE SINAD SNR THD SFDR ENOB Integral Non-Linearity Differential Non-Linearity Offset Error Positive Full-Scale Error Negative Full-Scale Error Gain Error Signal-to-Noise Plus Distortion Ratio Signal-to-Noise Ratio Total Harmonic Distortion Spurious-Free Dynamic Range Effective Number of Bits fIN = 100 kHz, −0.1 dBFS fIN = 100 kHz, −0.1 dBFS fIN = 100 kHz, −0.1 dBFS fIN = 100 kHz, −0.1 dBFS fIN = 100 kHz, −0.1 dBFS Differential Output at 70.7%FS with Input FS Input Single-Ended Input ±0.6 ±0.4 −0.4 +0.1 -1.0 +1.0 72.2 72.8 −81.6 83.9 11.7 26 22 12 ±0.95 ±0.95 ±3 ±2 ±6 ±6.5 69.5 71 −72 72 11.25 DYNAMIC CONVERTER CHARACTERISTICS FPBW −3 dB Full Power Bandwidth ANALOG INPUT CHARACTERISTICS VIN IDCL CINA CMRR VREF Differential Input Range DC Leakage Current Input Capacitance Common Mode Rejection Ratio Reference Voltage Range VIN = VREF or VIN = -VREF In Track Mode In Hold Mode See the Specification Definitions for the test condition 17 3 76 1.0 VA −VREF +VREF ±1 V (min) V (max) µA (max) pF pF dB V (min) V (max) 3 www.national.com ADC121S705 Symbol Parameter Conditions CS low, fSCLK = 16 MHz, fS = 1 MSPS, output = FF8h Typical 55 28 0.2 2.6 2.5 Limits Units (Note 7) µA µA µA IREF Reference Current CS low, fSCLK = 8 MHz, fS = 500 kSPS, output = FF8h CS high, fSCLK = 0 DIGITAL INPUT CHARACTERISTICS VIH VIL IIN CIND Input High Voltage Input Low Voltage Input Current Input Capacitance ISOURCE = 200 µA ISOURCE = 1 mA ISINK = 200 µA ISINK = 1 mA Force 0V or VA Force 0V or VA 2 VIN = 0V or VA 2 VA − 0.12 VA − 0.16 0.01 0.05 ±1 4 0.4 3.6 1.5 ±1 4 VA − 0.2 V (min) V (max) µA (max) pF (max) V (min) V V (max) V µA (max) pF (max) DIGITAL OUTPUT CHARACTERISTICS VOH VOL IOZH, IOZL COUT Output High Voltage Output Low Voltage TRI-STATE Leakage Current TRI-STATE Output Capacitance Output Coding POWER SUPPLY CHARACTERISTICS VA Analog Supply Voltage fSCLK = 16 MHz, fS = 1 MSPS, fIN = 100 kHz fSCLK = 8 MHz, fS = 500 kSPS, fIN = 100 kHz 2.3 1.8 56 0.3 11.5 9.0 280 1.5 −85 2 4.5 5.5 3 V (min) V (max) mA (max) mA µA (max) µA (max) mW mW µW µW dB Binary 2'S Complement IVA Supply Current, Normal Mode (Normal)) (Operational) IVA (PD) Supply Current, Power Down Mode (CS fSCLK = 16 MHz high) fSCLK = 0 (Note 8) fSCLK = 16 MHz, fS = 1 MSPS, fIN = 100 kHz, VA = 5.0V fSCLK = 8 MHz, fS = 500 kSPS, fIN = 100 kHz, VA = 5.0V PWR Power Consumption, Normal Mode (Normal)) (Operational) PWR (PD) PSRR Power Consumption, Power Down Mode fSCLK = 16 MHz, VA = 5.0V (CS high) fSCLK = 0, VA = 5.0V Power Supply Rejection Ratio See the Specification Definitions for the test condition AC ELECTRICAL CHARACTERISTICS fSCLK fSCLK fS Maximum Clock Frequency Minimum Clock Frequency Maximum Sample Rate 20 0.8 1.25 16 8 1 2.5 tACQ Track/Hold Acquisition Time 3.0 tCONV tAD Conversion Time Aperture Delay See the Specification Definitions 6 13 MHz (min) MHz (max) MSPS (min) SCLK cycles (min) SCLK cycles (max) SCLK cycles ns www.national.com 4 ADC121S705 (Note 8) The following specifications apply for VA = +4.5V to 5.5V, VREF = 2.5V, fSCLK = 8 MHz to 16 MHz, CL = 25 pF, Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25°C. Symbol tCSH tCSSU tDH tDA tDIS tEN tCH tCL tr tf Parameter CS Hold Time after an SCLK rising edge CS Setup Time prior to an SCLK rising edge DOUT Hold time after an SCLK Falling edge DOUT Access time after an SCLK Falling edge DOUT Disable Time after the rising edge of CS (Note 10) DOUT Enable Time after the falling edge of CS SCLK High Time SCLK Low Time DOUT Rise Time DOUT Fall Time 7 7 8 7 18 Conditions Typical Limits 5 5 2.5 22 20 20 25 25 Units ns (min) ns (min) ns (min) ns (max) ns (max) ns (max) ns (min) ns (min) ns ns ADC121S705 Timing Specifications Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. O