8-Bit A/D Converter

ADC081S051 Single Channel, 500 kSPS, 8-Bit A/D Converter April 2005 ADC081S051 Single Channel, 500 kSPS, 8-Bit A/D Converter General Description The ADC081S051 is a low-power, single channel CMOS 8-bit analog-to-digital converter with a high-speed serial interface. Unlike the conventional practice of specifying performance at a single sample rate only, the ADC081S051 is fully specified over a sample rate range of 200 kSPS to 500 kSPS. The converter is based on a successiveapproximation register architecture with an internal trackand-hold circuit. The output serial data is straight binary, and is compatible with several standards, such as SPI™, QSPI™, MICROWIRE, and many common DSP serial interfaces. The ADC081S051 operates with a single supply that can range from +2.7V to +5.25V. Normal power consumption using a +3V or +5V supply is 2.9 mW and 10.5 mW, respectively. The power-down feature reduces the power consumption to as low as 2.6 µW using a +5V supply. The ADC081S051 is packaged in an 6-lead LLP package. Operation over the industrial temperature range of −40˚C to +85˚C is guaranteed. Features n n n n n Specified over a range of sample rates. 6-lead LLP package Variable power management Single power supply with 2.7V - 5.25V range SPI™/QSPI™/MICROWIRE/DSP compatible Key Specifications n n n n DNL INL SNR Power Consumption — 3V Supply — 5V Supply + 0.07 / −0.06 LSB (typ) + 0.06 / −0.07 LSB (typ) 49.6 dB (typ) 2.9 mW (typ) 10.5 mW (typ) Applications n Portable Systems n Remote Data Aquisitions n Instrumentation and Control Systems Pin-Compatible Alternatives by Resolution and Speed www.DataSheet4U.com All devices are fully pin and function compatible. Resolution 50 to 200 kSPS 12-bit 10-bit 8-bit ADC121S021 ADC101S021 ADC081S021 Specified for Sample Rate Range of: 200 to 500 kSPS ADC121S051 ADC101S051 ADC081S051 500 kSPS to 1 MSPS ADC121S101 ADC081S101 ADC081S101 Connection Diagram 20145505 Ordering Information Order Code ADC081S051CISD ADC081S051CISDX Temperature Range −40˚C to +85˚C −40˚C to +85˚C Description 6-Lead LLP Package 6-Lead LLP Package, Tape & Reel Top Mark X6C X6C TRI-STATE ® is a trademark of National Semiconductor Corporation QSPI™ and SPI™ are trademarks of Motorola, Inc. © 2005 National Semiconductor Corporation DS201455 www.national.com ADC081S051 Block Diagram 20145507 Pin Descriptions and Equivalent Circuits Pin No. ANALOG I/O 3 DIGITAL I/O 4 5 6 POWER SUPPLY 1 2 VA GND Positive supply pin. This pin should be connected to a quiet +2.7V to +5.25V source and bypassed to GND with a 1 µF capacitor and a 0.1 µF monolithic capacitor located within 1 cm of the power pin. The ground return for the supply and signals. SCLK SDATA CS Digital clock input. This clock directly controls the conversion and readout processes. Digital data output. The output samples are clocked out of this pin on falling edges of the SCLK pin. Chip select. On the falling edge of CS, a conversion process begins. VIN Analog inputs. This signal can range from 0V to VA. Symbol Description www.national.com 2 ADC081S051 Absolute Maximum Ratings (Notes 1, 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Analog Supply Voltage VA Voltage on Any Pin to GND Input Current at Any Pin (Note 3) Package Input Current (Note 3) Power Consumption at TA = 25˚C ESD Susceptibility (Note 5) Human Body Model Machine Model Junction Temperature Storage Temperature −0.3V to 6.5V −0.3V to VA +0.3V Operating Ratings (Notes 1, 2) Operating Temperature Range VA Supply Voltage Digital Input Pins Voltage Range Clock Frequency Sample Rate Analog Input Voltage −40˚C ≤ TA ≤ +85˚C +2.7V to +5.25V −0.3V to VA 4 MHz to 10 MHz up to 500 kSPS 0V to VA ±10 mA ±20 mA See (Note 4) 3500V 300V +150˚C −65˚C to +150˚C Package Thermal Resistance Package 6-lead LLP θJA 78˚C / W Soldering process must comply with National Semiconductor’s Reflow Temperature Profile specifications. Refer to www.national.com/packaging. (Note 6) (Note 9) The following specifications apply for VA = +2.7V to 5.25V, GND = 0V, fSCLK = 4 MHz to 10 MHz, fSAMPLE = 200 kSPS to 500 kSPS, unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25˚C. Symbol Parameter Conditions Typical Limits (Note 9) 8 +0.06 −0.07 +0.07 −0.06 +0.03 +0.3 −0.3 +0.2 −0.2 Units ADC081S051 Converter Electrical Characteristics STATIC CONVERTER CHARACTERISTICS Resolution with No Missing Codes INL DNL VOFF GE TUE Integral Non-Linearity Differential Non-Linearity Offset Error Gain Error Total Unadjusted Error Bits LSB (max) LSB (min) LSB (max) LSB (min) LSB (max) LSB (max) LSB (max) LSB (min) ±0.08 +0.8 −0.07 VA = +2.7 to 5.25V fIN = 100 kHz, −0.02 dBFS VA = +2.7 to 5.25V fIN = 100 kHz, −0.02 dBFS VA = +2.7 to 5.25V fIN = 100 kHz, −0.02 dBFS VA = +2.7 to 5.25V fIN = 100 kHz, −0.02 dBFS VA = +2.7 to 5.25V fIN = 100 kHz, −0.02 dBFS VA = +5.25V fa = 103.5 kHz, fb = 113.5 kHz VA = +5.25V fa = 103.5 kHz, fb = 113.5 kHz VA = +5V VA = +3V ±0.2 ±0.4 +0.2 −0.3 DYNAMIC CONVERTER CHARACTERISTICS SINAD SNR THD SFDR ENOB Signal-to-Noise Plus Distortion Ratio Signal-to-Noise Ratio Total Harmonic Distortion Spurious-Free Dynamic Range Effective Number of Bits Intermodulation Distortion, Second Order Terms Intermodulation Distortion, Third Order Terms -3 dB Full Power Bandwidth 49.6 49.6 −70 67 7.9 −68 −68 11 8 49 49 −65 65 7.8 dB (min) dB (min) dB (max) dB (min) Bits (min) dB dB MHz MHz IMD FPBW 3 www.national.com ADC081S051 ADC081S051 Converter Electrical Characteristics (Note 9) (Continued) The following specifications apply for VA = +2.7V to 5.25V, GND = 0V, fSCLK = 4 MHz to 10 MHz, fSAMPLE = 200 kSPS to 500 kSPS, unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25˚C. Parameter Conditions Typical Limits (Note 9) Units Symbol ANALOG INPUT CHARACTERISTICS VIN IDCL CINA Input Range DC Leakage Current Input Capacitance Track Mode Hold Mode VA = +5.25V VA = +5.25V VA = +3.6V VIN = 0V or VA 30 4 2.4 0.8 0.4 0 to VA V ±1 µA (max) pF pF V (min) V (max) V (max) µA (max) pF (max) V (min) V V (max) V DIGITAL INPUT CHARACTERISTICS VIH VIL IIN CIND Input High Voltage Input Low Voltage Input Current Digital Input Capacitance ISOURCE = 200 µA ISOURCE = 1 mA ISINK = 200 µA ISINK = 1 mA ±0.1 2 VA − 0.03 VA − 0.1 0.03 0.1 ±1 4 VA − 0.2 0.4 DIGITAL OUTPUT CHARACTERISTICS VOH VOL IOZH, IOZL COUT Output High Voltage Output Low Voltage TRI-STATE ® Leakage Current TRI-STATE ® Output Capacitance Output Coding POWER SUPPLY CHARACTERISTICS (CL = 10 pF) VA Supply Voltage VA = +5.25V, fSAMPLE = 200 kSPS VA = +3.6V, fSAMPLE = 200 kSPS fSCLK= 0 MHz, VA = +5.25V fSAMPLE = 0 kSPS VA = +5.25V, fSCLK = 10MHz, fSAMPLE = 0 kSPS VA = +5.25V VA = +3.6V fSCLK = 0 MHz, VA = +5.25V fSAMPLE = 0 kSPS VA = +5.25V, fSCLK = 10 MHz, fSAMPLE = 0 kSPS 2.0 0.8 0.5 22 10.5 2.9 2.6 0.12 12.6 3.6 2.7 5.25 2.4 1.0 V (min) V (max) mA (max) mA (max) µA µA mW (max) mW (max) µW mW ±0.1 2 ±10 4 µA (max) pF (max) Straight (Natural) Binary Supply Current, Normal Mode (Operational, CS low) IA Supply Current, Shutdown (CS high) Power Consumption, Normal Mode (Operational, CS low) PD Power Consumption, Shutdown (CS high) AC ELECTRICAL CHARACTERISTICS fSCLK fS tCONV DC tACQ Clock Frequency Sample Rate Conversion Time SCLK Duty Cycle Track/Hold Acquisition Time Throughput Time www.national.com (Note 8) (Note 8) 50 4 10 200 500 16 40 60 400 20 MHz (min) MHz (max) kSPS (min) kSPS (max) SCLK cycles % (min) % (max) ns (max) SCLK cycles fSCLK = 10 MHz 50 Acquisition Time + Conversion Time 4 ADC081S051 ADC081S051 Converter Electrical Characteristics (Note 9) (Continued) The following specifications apply for VA = +2.7V to 5.25V, GND = 0V, fSCLK = 4 MHz to 10 MHz, fSAMPLE = 200 kSPS to 500 kSPS, unless otherwise noted. Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25˚C. Parameter Conditions Typical Limits (Note 9) 50 3 30 Units Symbol AC ELECTRICAL CHARACTERISTICS tQUIET tAD tAJ (Note 10) Aperture Delay Aperture Jitter ns (min) ns ps ADC081S051 Timing Specifications The following specifications apply for VA = +2.7V to 5.25V, GND = 0V, fSCLK = 4 MHz to 10 MHz, fSAMPLE = 200 kSPS to 500 kSPS, Boldface limits apply for TA = TMIN to TMAX: all other limits TA = 25˚C. Symbol tCS tSU tEN tACC tCL tCH tH Parameter Minimum CS Pulse Width CS to SCLK Setup Time Delay from CS Until SDATA TRI-STATE ® Disabled (Note 11) Data Access Time after SCLK Falling Edge (Note 12) SCLK Low Pulse Width SCLK High Pulse Width SCLK to Data Valid Hold Time VA = +2.7 to +3.6 VA = +4.75 to +5.25 VA = +2.7 to +3.6 VA = +4.75 to +5.25 1 VA = +2.7 to +3.6 VA = +4.75 to +5.25 Conditions Typical Limits 10 10 20 40 20 0.4 x tSCLK 0.4 x tSCLK 7 5 25 6 25 5 Units ns (min) ns (min) ns (max) ns (max) ns (max) ns (min) ns (min) ns (min) ns (min) ns (max) ns (min) ns (max) ns (min) µs tDIS SCLK Falling Edge to SDATA High Impedance (Note 13) Power-Up Time from Full Power-Down tPOWER-UP Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Note 2: All voltages are measured with respect to GND = 0V, unless otherwise specified. Note 3: When the input voltage at any pin exceeds the power supply (that is, VIN < GND or VIN > VA), the current at that pin should be limited to 10 mA. The 20 mA maximum package input current rating limits the