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AD1981B Datasheet

AC 97 SoundMAX Codec


AD1981B Datasheet Preview


a
AC ’97 SoundMAX® Codec
AD1981B
FEATURES
AC ’97 2.3 COMPATIBLE FEATURES
S/PDIF Output, 20 Bits Data Format, Supporting
48 kHz and 44.1 kHz Sample Rates
Integrated Stereo Headphone Amplifier
Variable Sample Rate Audio
External Audio Power-Down Control
Greater than 90 dB Dynamic Range
Stereo Full-Duplex Codec
20-Bit PCM DAC
3 Analog Line-Level Stereo Inputs for
Line-In, AUX, and CD
Mono Line-Level Phone Input
Dual MIC Input with Built-In Programmable Preamp
High Quality CD Input with Ground Sense
Mono Output for Speakerphone or Internal Speaker
Power Management Support
48-Lead LQFP Package, Lead-Free Available
ENHANCED FEATURES
Stereo MIC Preamps Support
Built-In Digital Equalizer Function for Optimized
Speaker Sound
Full-Duplex Variable Sample Rates from 7040 Hz to
48 kHz with 1 Hz Resolution
Jack Sense Pins Provide Automatic Output Switching
Software Programmed VREFOUT Output for Biasing
Microphone and External Power Amp
Split Power Supplies: 3.3 V Digital and 5 V Analog
Multiple Codec Configuration Options
MIC1
MIC2
PHONE_IN
CD_L
CD_GND
CD_R
AUX_L
AUX_R
LINE_IN_L
LINE_IN_R
MONO_OUT
HP_OUT_L
LINE_OUT_L
LINE_OUT_R
HP_OUT_R
AD1981B
MIC PREAMP
G
G
CD
DIFF AMP
FUNCTIONAL BLOCK DIAGRAM
VREFOUT
VREF
G
VOLTAGE
REFERENCE
CODEC CORE
GM
GM
PCM L/R
ADC RATE
16-BIT
-ADC
16-BIT
-ADC
XTL_OUT XTL_IN SPDIF
SPDIF
TX
PLL ID0
ID1
MA
HP M
A
MZ A
MZ A
HP M
A
GM
GM
16-BIT
-ADC
16-BIT
-ADC
M GA
20-BIT
-DAC
GA GA
GA GA
MM
MM
M
GA GA
GA GA
MM
MM
M GA
G = GAIN
A = ATTENUATION
M = MUTE
Z = HIGH Z
20-BIT
-DAC
PCM FRONT
DAC RATE
M
ADC
AND
DAC
SLOT
LOGIC
EQ
EQ
RESET
SYNC
BIT_CLK
SDATA_OUT
SDATA_IN
AC '97
CONTROL
REGISTERS
ANALOG MIXING
CONTROL LOGIC
EAPD
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
JS0 JS1 EAPD
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
Page 1

AD1981B–SPECIFICATIONS
STANDARD TEST CONDITIONS, UNLESS
OTHERWISE NOTED
Temperature
25°C
Digital Supply (DVDD)
Analog Supply (AVDD)
Sample Rate (FS)
Input Signal
3.3 V
5.0 V
48 kHz
1008 Hz
Analog Output Pass Band
20 Hz to 20 kHz
DAC Test Conditions
Calibrated
–3 dB Attenuation Relative to Full Scale
0 dB Input
10 kOutput Load (LINE_OUT)
32 Output Load (HP_OUT)
ADC Test Conditions
Calibrated
0 dB Gain
Input –3.0 dB Relative to Full Scale
Parameter
ANALOG INPUT
Input Voltage (RMS Values Assume Sine Wave Input)
LINE_IN, AUX, CD, PHONE_IN
MIC_IN with +20 dB Gain
MIC_IN with 0 dB Gain
Input Impedance1
Input Capacitance1
MASTER VOLUME
Step Size (0 dB to –46.5 dB): LINE_OUT_L, LINE_OUT_R
Output Attenuation Range1
Step Size (0 dB to –46.5 dB): MONO_OUT
Output Attenuation Range1
Step Size (0 dB to –46.5 dB): HP_OUT_R, HP_OUT_L
Output Attenuation Range Span1
Mute Attenuation of 0 dB Fundamental1
PROGRAMMABLE GAIN AMPLIFIER—ADC
Step Size (0 dB to 22.5 dB)
PGA Gain Range
ANALOG MIXER—INPUT GAIN/AMPLIFIERS/ATTENUATORS
Signal-to-Noise Ratio (SNR)
CD to LINE_OUT
Other to LINE_OUT1
Step Size (+12 dB to –34.5 dB) (All Steps Tested):
MIC_IN, LINE_IN, CD, AUX, PHONE_IN, DAC
Input Gain/Attenuation Range:
MIC_IN, LINE_IN, CD, AUX, PHONE_IN, DAC
DIGITAL DECIMATION AND INTERPOLATION FILTERS1
Pass Band
Pass-Band Ripple
Transition Band
Stop Band
Stop-Band Rejection
Group Delay
Group Delay Variation over Pass Band
Min
80
0
0.4 ϫ fS
0.6 ϫ fS
–74
Typ Max
1
2.83
0.1
0.283
1
2.83
20
5
7.5
1.5
46.5
1.5
46.5
1.5
46.5
1.5
22.5
90
90
1.5
46.5
16/fS
0
0.4 ϫ fS
± 0.09
0.6 ϫ fS
ϱ
Unit
V rms
V p-p
V rms
V p-p
V rms
V p-p
k
pF
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
Hz
dB
Hz
Hz
dB
sec
µs
–2– REV. B
Page 2

AD1981B
Parameter
ANALOG-TO-DIGITAL CONVERTERS
Resolution
Total Harmonic Distortion (THD)
Dynamic Range (–60 dB Input THD+N Referenced to Full Scale,
A-Weighted)
Signal-to-Intermodulation Distortion1 (CCIF Method)
ADC Crosstalk1
Line Inputs (Input L, Ground R, Read R; Input R, Ground L, Read L)
Line_In to Other
Gain Error2 (Full-Scale Span Relative to Nominal Input Voltage)
Interchannel Gain Mismatch (Difference of Gain Errors)
ADC Offset Error1
DIGITAL-TO-ANALOG CONVERTERS
Resolution
Total Harmonic Distortion (THD) LINE_OUT
Total Harmonic Distortion (THD) HP_OUT
Dynamic Range (–60 dB Input THD+N Referenced to Full Scale,
A-Weighted)
Signal-to-Intermodulation Distortion1 (CCIF Method)
Gain Error2 (Output FS Voltage Relative to Nominal Output FS Voltage)
Interchannel Gain Mismatch (Difference of Gain Errors)
DAC Crosstalk1 (Input L, Zero R, Measure R_OUT; Input R,
Zero L, Measure L_OUT)
Total Audible Out-of-Band Energy1 (Measured from 0.6 ϫ fS to 20 kHz)
ANALOG OUTPUT
Full-Scale Output Voltage; LINE_OUT and MONO_OUT
Output Impedance1
External Load Impedance1
Output Capacitance1
External Load Capacitance1
Full-Scale Output Voltage; HP_OUT (0 dB Gain)
External Load Impedance1
VREF
VREF_OUT (Programmable to 3.70 V Nominal)
VREF_OUT Current Drive
Mute Click (Muted Output Minus Unmuted Midscale DAC Output)
STATIC DIGITAL SPECIFICATIONS
High Level Input Voltage (VIH): Digital Inputs
Low Level Input Voltage (VIL)
High Level Output Voltage (VOH), IOH = 2 mA
Low Level Output Voltage (VOL), IOL = 2 mA
Input Leakage Current
Output Leakage Current
POWER SUPPLY
Power Supply Range—Analog (AVDD)
Power Supply Range—Digital (DVDD)
Power Dissipation—5 V/3.3 V
Analog Supply Current—5 V (AVDD)
Digital Supply Current—3.3 V (DVDD)
Power Supply Rejection (100 mV p-p Signal @ 1 kHz)1
(At Both Analog and Digital Supply Pins, Both ADCs and DACs)
Min
80
85
10
32
2.05
0.65 ϫ DVDD
0.9 ϫ DVDD
–10
–10
4.5
3.0
Typ
16
–84
85
85
–80
–100
20
–85
–75
90
–100
± 10
–40
1
2.83
15
1
2.25
2.25
±5
400
50
46
40
Max
Unit
Bits
dB
dB
dB
dB
–80 dB
± 10 %
± 0.5 dB
± 5 mV
Bits
dB
dB
dB
dB
%
± 0.7 dB
–80 dB
dB
V rms
V p-p
800
k
pF
100 pF
V rms
2.45 V
V
5 mA
mV
0.35 ϫ DVDD
0.1 ϫ DVDD
+10
+10
V
V
V
V
µA
µA
5.5 V
3.47 V
mW
mA
mA
dB
REV. B
–3–
Page 3

AD1981B
SPECIFICATIONS (continued)
Parameter
CLOCK SPECIFICATIONS1
Input Clock Frequency
Recommended Clock Duty Cycle
NOTES
1Guaranteed but not tested.
2Measurements reflect main ADC.
Specifications subject to change without notice.
Min Typ Max
24.576
40 50 60
Unit
MHz
%
Parameter
POWER-DOWN STATES*
(Fully Active)
ADC
DAC
ADC + DAC
Mixer
ADC + Mixer
DAC + Mixer
ADC + DAC + Mixer
Standby
Headphone Standby
Set Bits
(No Bits Value)
PR0
PR1
PR1, PR0
PR2
PR2, PR0
PR2, PR1
PR2, PR1, PR0
PR5, PR4, PR3, PR2, PR1, PR0
PR6
DVDD Typ
42
36
29
12
42
36
29
12
0
42
AVDD Typ
51
45
35
28
24
18
9
1.5
0
44
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
*Values presented with VREFOUT not loaded.
Specifications subject to change without notice.
TIMING PARAMETERS (Guaranteed over Operating Temperature Range)
Parameter
Symbol
Min Typ Max Unit
RESET Active Low Pulsewidth
RESET Inactive to BIT_CLK Start-Up Delay
SYNC Active High Pulsewidth
SYNC Low Pulsewidth
SYNC Inactive to BIT_CLK Start-Up Delay
BIT_CLK Frequency
BIT_CLK Frequency Accuracy
BIT_CLK Period
BIT_CLK Output Jitter1, 2, 3
BIT_CLK High Pulsewidth
BIT_CLK Low Pulsewidth
SYNC Frequency
SYNC Period
Setup to Falling Edge of BIT_CLK
Hold from Falling Edge of BIT_CLK
BIT_CLK Rise Time
BIT_CLK Fall Time
SYNC Rise Time
SYNC Fall Time
SDATA_IN Rise Time
SDATA_IN Fall Time
SDATA_OUT Rise Time
SDATA_OUT Fall Time
End of Slot 2 to BIT_CLK, SDATA_IN Low
Setup to Trailing Edge of RESET
(Applies to SYNC, SDATA_OUT)
Rising Edge of RESET to Hi-Z Delay
Propagation Delay
RESET Rise Time
Output Valid Delay from Rising Edge of BIT_CLK to SDI Valid
tRST_LOW
tRST2CLK
tSYNC_HIGH
tSYNC_LOW
tSYNC2CLK
tCLK_PERIOD
tCLK_HIGH
tCLK_LOW
tSYNC_PERIOD
tSETUP
tHOLD
tRISECLK
tFALLCLK
tRISESYNC
tFALLSYNC
tRISEDIN
tFALLDIN
tRISEDOUT
tFALLDOUT
tS2_PDOWN
tSETUP2RST
tOFF
162.8
162.8
32.56
32.56
5
5
2
2
2
2
2
2
2
2
0
15
1.0
1.3
19.5
12.288
81.4
750
42
38
48.0
20.8
2.5
4
4
4
4
4
4
4
4
±1
2000
48.84
6
6
6
6
6
6
6
6
1.0
ms
ns
ms
µs
ns
MHz
ppm
ns
ps
ns
ns
kHz
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ns
25 ns
15 ns
50 ns
15 ns
NOTES
1Guaranteed but not tested.
2Output jitter is directly dependent on crystal input jitter.
3Maximum jitter specification for noncrystal operation only. Crystal operation maximum is much lower.
Specifications subject to change without notice.
–4–
REV. B
Page 4
Part Number AD1981B
Manufactur Analog Devices
Description AC 97 SoundMAX Codec
Total Page 28 Pages
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