8-bit I2C LED dimmer

INTEGRATED CIRCUITS PCA9531 8-bit I2C LED dimmer Product data 2003 Nov 10 Philips Semiconductors Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 DESCRIPTION The PCA9531 is an 8-bit I2C & SMBus I/O expander optimized for dimming LEDs in 256 discrete steps for Red/Green/Blue (RGB) color mixing and back light applications. The PCA9531 contains an internal oscillator with two user programmable blink rates and duty cycles coupled to the output PWM. The LED brightness is controlled by setting the blink rate high enough (> 100 Hz) that the blinking can not be seen and then using the duty cycle to vary the amount of time the LED is on and thus the average current through the LED. The initial setup sequence programs the two blink rates/duty cycles for each individual PWM. From then on, only one command from the bus master is required to turn individual LEDs ON, OFF, BLINK RATE 1 or BLINK RATE 2. Based on the programmed frequency and duty cycle, BLINK RATE 1 and BLINK RATE 2 will cause the LEDs to appear at a different brightness or blink at periods up to 1.6 second. The open drain outputs directly drive the LEDs with maximum output sink current of 25 mA per bit and 100 mA per package. To blink LEDs at periods greater than 1.6 second the bus master (MCU, MPU, DSP, chipset, etc.) must send repeated commands to turn the LED on and off as is currently done when using normal I/O Expanders like the Philips PCF8574 or PCA9554. Any bits not used for controlling the LEDs can be used for General Purpose Parallel Input/Output (GPIO) expansion which provides a simple solution when additional I/O is needed for ACPI power switches, sensors, push-buttons, alarm monitoring, fans, etc. The active low hardware reset pin (RESET) and Power On Reset (POR) initializes the registers to their default state causing the bits to be set high (LED off). Three hardware address pins on the PCA9531 allow eight devices to operate on the same bus. FEATURES • Eight LED drivers (on, off, flashing at a programmable rate) • Two selectable, fully programmable blink rates (frequency and duty cycle) between 0.625 and 160 Hz (1.6 and 6.25 milliseconds) • 256 brightness steps • Input/outputs not used as LED drivers can be used as regular GPIOs • Internal oscillator requires no external components • I2C interface logic compatible with SMBus • Internal power-on reset • Noise filter on SCL/SDA inputs • Active low reset input • Eight open drain outputs directly drive LEDs to 25 mA • Edge rate control on outputs • No glitch on power-up • Supports hot insertion • Low stand-by current • Operating power supply voltage range of 2.3 V to 5.5 V • 0 to 400 kHz clock frequency • ESD protection exceeds 2000 V HBM per JESD22-A114, 150 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101 • Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA • Package offer: SO16, TSSOP16, HVQFN16 ORDERING INFORMATION PACKAGES 16-pin plastic SO 16-pin plastic TSSOP TEMPERATURE RANGE -40 to +85 °C -40 to +85 °C ORDER CODE PCA9531D PCA9531PW TOPSIDE MARK PCA9531D PCA9531 DRAWING NUMBER SOT109-1 SOT403-1 SOT629-1 16-pin plastic HVQFN -40 to +85 °C PCA9531BS 9531 Standard packing quantities and other packaging data is available at www.philipslogic.com/packaging. I2C is a trademark of Philips Semiconductors Corporation. 2003 Nov 10 2 Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 PIN CONFIGURATION — SO, TSSOP A0 1 A1 2 A2 3 LED0 4 LED1 5 LED2 6 LED3 7 VSS 8 16 VDD 15 SDA 14 SCL 13 RESET 12 LED7 11 LED6 10 LED5 9 LED4 PIN CONFIGURATION — HVQFN A1 16 A0 15 VDD 14 SDA 13 12 SCL 11 RESET 10 LED7 9 5 6 7 8 LED6 A2 LED0 LED1 LED2 1 2 3 4 LED3 SW02039 VSS LED4 LED5 Figure 1. Pin configuration — SO, TSSOP TOP VIEW su01667 Figure 2. Pin configuration — HVQFN PIN DESCRIPTION SO, TSSOP PIN NUMBER 1 2 3 4, 5, 6, 7 8 9, 10, 11, 12 13 14 15 16 HVQFN PIN NUMBER 15 16 1 2, 3, 4, 5 6 7, 8, 9, 10 11 12 13 14 SYMBOL A0 A1 A2 LED0-3 VSS LED4-7 RESET SCL SDA VDD FUNCTION Address input 0 Address input 1 Address input 2 LED drivers 0-3 Supply ground LED drivers 4-7 Active low reset input Serial clock line Serial data line Supply voltage 2003 Nov 10 3 Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 BLOCK DIAGRAM A2 A1 A0 PCA9531 INPUT REGISTER SCL INPUT FILTERS SDA I 2C-BUS CONTROL LED SELECT (LSx) REGISTER 0 1 LEDx VDD RESET POWER-ON RESET PRESCALER 0 REGISTER PRESCALER 1 REGISTER PWM0 REGISTER PWM1 REGISTER BLINK0 OSCILLATOR BLINK1 VSS NOTE: ONLY ONE I/O SHOWN FOR CLARITY SW02040 Figure 3. Block diagram 2003 Nov 10 4 Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 DEVICE ADDRESSING Following a START condition the bus master must output the address of the slave it is accessing. The address of the PCA9531 is shown in Figure 4. To conserve power, no internal pullup resistors are incorporated on the hardware selectable address pins and they must be pulled HIGH or LOW. SLAVE ADDRESS INPUT — INPUT REGISTER bit Default 7 X 6 X 5 X 4 X 3 X 2 X 1 X 0 X The INPUT register reflects the state of the device pins. Writes to this register will be acknowledged but will have no effect. PSC0 — FREQUENCY PRESCALER 0 bit 7 0 6 0 5 0 4 0 3 0 2 0 1 0 0 0 default 1 1 0 0 A2 A1 A0 R/W PSC0 is used to program the period of the PWM output. FIXED HARDWARE SELECTABLE su01420 The period of BLINK0 + (PSC0 ) 1) 152 5 0 4 0 3 0 2 0 1 0 0 0 Figure 4. Slave address The last bit of the address byte defines the operation to be performed. When set to logic 1 a read is selected while a logic 0 selects a write operation. PWM0 — PWM REGISTER 0 bit default 7 1 6 0 CONTROL REGISTER Following the successful acknowledgement of the slave address, the bus master will send a byte to the PCA9531 which will be stored in the Control Register. 0 0 0 AI 0 B2 B1 B0 The PWM0 register determines the duty cycle of BLINK0. The outputs are LOW (LED on) when the count is less than the value in PWM0 and HIGH (LED off) when it is greater. If PWM0 is programmed with 00h, then the PWM0 output is always HIGH (LED off). The duty cycle of BLINK0 is: PWM0 256 PSC1 — FREQUENCY PRESCALER 1 bit default 7 0 6 0 5 0 4 0 3 0 2 0 1 0 0 0 REGISTER ADDRESS RESET STATE: 00h AUTO-INCREMENT FLAG SW01034 PSC1 is used to program the period of PWM output. The period of BLINK1 + (PSC1 ) 1) 152 5 0 4 0 3 0 2 0 1 0 0 0 Figure 5. Control register CONTROL REGISTER DEFINITION B2 0 0 0 0 1 1 1 B1 0 0 1 1 0 0 1 B0 0 1 0 1 0 1 0 REGISTER NAME INPUT PSC0 PWM0 PSC1 PWM1 LS0 LS1 TYPE READ READ/ WRITE READ/ WRITE READ/ WRITE READ/ WRITE READ/ WRITE READ/ WRITE REGISTER FUNCTION INPUT REGISTER FREQUENCY PRESCALER 0 PWM REGISTER 0 FREQUENCY PRESCALER 1 PWM REGISTER 1 LED0-LED3 SELECTOR LED4-LED7 SELECTOR PWM1 — PWM REGISTER 1 bit default 7 1 6 0 The PWM1 register determines the duty cycle of BLINK1. The outputs are LOW (LED on) when the count is less than the value in PWM1 and HIGH (LED off) when it is greater. If PWM1 is programmed with 00h, then the PWM1 output is always HIGH (LED off) . The duty cycle of BLINK1 is: PWM1 256 LS0 — LED0-3 SELECTOR LED 3 bit default 7 0 6 0 LED 2 5 0 4 0 LED 1 3 0 2 0 LED 0 1 0 0 0 LS1 — LED4-7 SELECTOR LED 7 bit default 7 0 6 0 LED 6 5 0 4 0 LED 5 3 0 2 0 LED 4 1 0 0 0 REGISTER DESCRIPTION The lowest 3 bits are used as a pointer to determine which register will be accessed. If the auto-increment flag is set, the three low order bits of the Control Register are automatically incremented after a read or write. This allows the user to program the registers sequentially. The contents of these bits will rollover to ‘000’ after the last register is accessed. When auto-increment flag is set (AI = 1) and a read sequence is initiated, the sequence must start by reading a register different from the input register (B2 B1 B0 0 0 0 0). Only the 3 least significant bits are affected by the AI flag. Unused bits must be programmed with zeroes. 2003 Nov 10 5 The LSx LED select registers determine the source of the LED data. 00 = Output is set Hi-Z (LED off - default) 01 = Output is set low (LED on) 10 = Output blinks at PWM0 rate 11 = Output blinks at PWM1 rate Philips Semiconductors Product data 8-bit I2C LED dimmer PCA9531 POWER-ON RESET When power is applied to VDD, an internal Power On Reset holds the PCA9531 in a reset state until VDD has reached VPOR. At this point, the reset condition is released and the PCA9531 registers are initialized to their default states, all the outputs in the off state. SDA EXTERNAL RESET A reset can be accomplished by holding the RESET pin low for a minimum of tW. The PCA9531 registers and I2C state machine will be held in their default state until the RESET input is once again high. This input requires a pull-up resistor to VDD. SCL data line stable; data valid change of data allowed SW00363 Figure 6. Bit transfer Start and stop conditions Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the clock is HIGH is defined as the start condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the stop condition (P) (see Figure 7). CHARACTERISTICS OF THE I2C-BUS The is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device. Data transfer may be initiated only when the bus is not busy. I2C-bus System configuration A device generating a message is a transmitter: a device receiving is the receiver. The device that controls the message is the master and the devices which are controlled by the master are the slaves (see Figure 8). Bit transfer One data bit is transferred during each clock pulse. The data on the SDA line must remain