74HC4060M (ETC) - Search -----> M74HC4060M / CD74HC4060M / MM74HC4060M

Part Number	74HC4060M
Manufacturer	ETC
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www.DataSheet4U.com Data sheet acquired from Harris Semiconductor SCHS207 CD74HC4060, CD74HCT4060 High Speed CMOS Logic 14-Stage Binary Counter with Oscillator February 1998 Features • Onboard Oscillator • Common Reset • Negative Edge Clocking • Typical fMAX = 50MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Propagation Delay and Transition Times • Signiﬁcant Power Reduction Compared to LSTTL Logic ICs • HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V • HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH [ /Title (CD74 HC406 0, CD74 HCT40 60) /Subject (High Speed CMOS Pinout CD74HC4060, CD74HCT4060 (PDIP, SOIC) TOP VIEW Q12 1 Q13 2 Q14 3 Q6 4 Q5 5 Q7 6 Q4 7 GND 8 16 VCC 15 Q10 14 Q8 13 Q9 12 MR 11 φI 10 φO 9 φO CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © Harris Corporation 1998 File Number 1654.1 1 www.DataSheet4U.com CD74HC4060, CD74HCT4060 TTL switching levels. Description The Harris CD74HC4060 and CD74HCT4060 each consist of an oscillator section and 14 ripple-carry binary counter stages. The oscillator conﬁguration allows design of either RC or crystal oscillator circuits. A Master Reset input is provided which resets the counter to the all-0’s state and disables the oscillator. A high level on the MR line accomplishes the reset function. All counter stages are master-slave ﬂip-ﬂops. The state of the counter is advanced one step in binary order on the negative transition of φI (and φO). All inputs and outputs are buffered. Schmitt trigger action on the input-pulse-line permits unlimited rise and fall times. In order to achieve a symmetrical waveform in the oscillator section the HCT4060 input pulse switch points are the same as in the HC4060; only the MR input in the HCT4060 has Ordering Information PART NUMBER CD74HC4060E CD74HCT4060E CD74HC4060M CD74HCT4060M NOTES: 1. When ordering, use the entire part number. Add the sufﬁx 96 to obtain the variant in the tape and reel. 2. Wafer and die for this part number is available which meets all electrical specifications. Please contact your local sales office or Harris customer service for ordering information. TEMP. RANGE (oC) -55 to 125 -55 to 125 -55 to 125 -55 to 125 PACKAGE 16 Ld PDIP 16 Ld PDIP 16 Ld SOIC 16 Ld SOIC PKG. NO. E16.3 E16.3 M16.15 M16.15 Functional Diagram 7 Q4 5 Q5 12 MR 4 Q6 6 Q7 14-STAGE RIPPLE COUNTER AND OSCILLATOR 14 Q8 13 Q9 15 Q10 1 Q12 2 Q13 3 Q14 9 10 GND = 8 VCC = 16 φI 11 φO φO 2 www.DataSheet4U.com CD74HC4060, CD74HCT4060 øO øO ø1 9 ø1 10 11 Q1 ø4 Q4 ø5 Q13 ø14 Q14 FF1 FF4 FF5 - FF13 FF14 ø1 R Q1 ø4 R Q4 ø5 R Q13 ø14 Q14 R MR 12 7 2 Q14 3 Q4 5, 4, 6, 14, 13, 15, 1 Q13 Q5 - Q10, Q12 FIGURE 1. LOGIC BLOCK DIAGRAM TRUTH TABLE øI ↑ ↓ X MR L L H OUTPUT STATE No Change Advance to Next State All Outputs are Low 3 www.DataSheet4U.com CD74HC4060, CD74HCT4060 Thermal Information Thermal Resistance (Typical, Note 3) θJA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only) Absolute Maximum Ratings DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V DC Input Diode Current, IIK For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA DC Output Diode Current, IOK For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA DC Drain Current, per Output, IO For -0.5V < VO < VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . . . . . .±25mA DC VCC or Ground Current, ICC . . . . . . . . . . . . . . . . . . . . . . . . .±50mA Operating Conditions Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC Supply Voltage Range, VCC HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC Input Rise and Fall Time 2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max) 4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max) 6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied. NOTE: 3. θJA is measured with the component mounted on an evaluation PC board in free air. DC Electrical Speciﬁcations TEST CONDITIONS PARAMETER HC TYPES High Level Input Voltage VIH 2 4.5 6 Low Level Input Voltage VIL 2 4.5 6 High Level Output Voltage Q Outputs CMOS Loads High Level Output Voltage Q Outputs TTL Loads Low Level Output Voltage Q Outputs CMOS Loads Low Level Output Voltage Q Outputs TTL Loads High-Level Output Voltage φO Output (Pin 10) CMOS Loads VOH VCC or GND VOL VIH or VIL VOH VIH or VIL -0.02 -0.02 -0.02 -4 -5.2 0.02 0.02 0.02 4 5.2 -0.02 -0.02 -0.02 2 4.5 6 4.5 6 2 4.5 6 4.5 6 2 4.5 6 1.5 3.15 4.2 1.9 4.4 5.9 3.98 5.48 1.9 4.4 5.9 0.5 1.35 1.8 0.1 0.1 0.1 0.26 0.26 1.5 3.15 4.2 1.9 4.4 5.9 3.84 5.34 1.9 4.4 5.9 0.5 1.35 1.8 0.1 0.1 0.1 0.33 0.33 1.5 3.15 4.2 1.9 4.4 5.9 3.7 5.2 1.9 4.4 5.9 0.5 1.35 1.8 0.1 0.1 0.1 0.4 0.4 V V V V V V V V V V V V V V V V V V V V V SYMBOL VI (V) IO (mA) VCC (V) 25oC MIN TYP MAX -40oC TO 85oC -55oC TO 125oC MIN MAX MIN MAX UNITS 4 www.DataSheet4U.com CD74HC4060, CD74HCT4060 DC Electrical Speciﬁcations (Continued) TEST CONDITIONS PARAMETER High-Level Output Voltage φO Output (Pin 10) TTL Loads Note 6 Low-Level Output Voltage φO Output (Pin 10) CMOS Loads Low-Level Output Voltage φO Output (Pin 10) TTL Loads High-Level Output Voltage φO Output (Pin 9) TTL Loads Low-Level Output Voltage φO Output (Pin 9) TTL Loads Input Leakage Current Quiescent Device Current HCT TYPES High Level Input Voltage Low Level Input Voltage High Level Output Voltage Q Outputs CMOS Loads High Level Output Voltage Q Outputs TTL Loads Low Level Output Voltage Q Outputs CMOS Loads Low Level Output Voltage Q Outputs TTL Loads High-Level Output Voltage φO Output (Pin 10) CMOS Loads High-Level Output Voltage φO Output (Pin 10) TTL Loads Note 6 Low-Level Output Voltage φO Output (Pin 10) CMOS Loads VOH VCC or GND VOL VIH or VIL Note 5 VIH VIL VOH VIH or VIL Note 5 -0.02 4.5 to 5.5 4.5 to 5.5 4.5 2 4.4 0.8 2 4.4 0.8 2 4.4 0.8 V V V SYMBOL VOH VI (V) VCC or GND IO (mA) -2.6 -3.3 VCC (V) 4.5 6 25oC MIN 3.98 5.48 TYP MAX -40oC TO 85oC -55oC TO 125oC MIN 3.84 5.34 MAX MIN 3.7 5.2 MAX UNITS V V VOL VCC or GND 0.02 0.02 0.02 2 4.5 6 4.5 6 - - 0.1 0.1 0.1 0.26 0.26 - 0.1 0.1 0.1 0.33 0.33 - 0.1 0.1 0.1 0.4 0.4 V V V V V VOL VCC or GND 2.6 3.3 VOH VIL or VIH -3.2 -4.2 4.5 6 3.98 5.48 - - 3.84 5.34 - 3.7 5.2 - V V VOL VIL or VIH -2.6 -3.3 4.5 6 - - 0.26 0.26 - 0.33 0.33 - 0.4 0.4 V V II ICC VCC or GND VCC or GND 0 6 6 - - ±0.1 8 - ±1 80 - ±1 160 µA µA -4 4.5 3.98 - - 3.84 - 3.7 - V 0.02 4.5 - - 0.1 - 0.1 - 0.1 V 4 4.5 - - 0.26 - 0.33 - 0.4 V -0.02 4.5 4.4 - - 4.4 - 4.4 - V VOH VCC or GND -2.6 4.5 3.98 - - 3.84 - 3.7 - V VOL VCC or GND 0.02 4.5 - - 0.1 - 0.1 - 0.1 V 5 www.DataSheet4U.com CD74HC4060, CD74HCT4060 DC Electrical Speciﬁcations (Continued) TEST CONDITIONS PARAMETER Low-Level Output Voltage φO Output (Pin 10) TTL Loads High-Level Output Voltage φO Output (Pin 9) TTL Loads Low-Level Output Voltage φO Output (Pin 9) TTL Loads Input Leakage Current SYMBOL VOL VI (V) VCC or GND IO (mA) 2.6 VCC (V) 4.5 25oC MIN TYP MAX 0.26 -40oC TO 85oC -55oC TO 125oC MIN MAX 0.33 MIN MAX 0.4 UNITS V VOH VIL or VIH -3.2 4.5 3.98 - - 3.84 - 3.7 - V VOL VIH or VIL Note 5 3.2 4.5 - 0.26 - 0.33 - 0.4 V II Any Voltage Between VCC and GND VCC or GND VCC -2.1 0 5.5 - ±0.1 - ±1 - ±1 µA Quiescent Device Current Additional Quiescent Device Current Per Input Pin: 1 Unit Load NOTES: ICC ∆ICC (Note 4) 0 - 5.5 4.5 to 5.5 - 100 8 360 - 80 450 - 160 490 µA µA 4. For dual-supply systems theoretical worst case (VI = 2.4V, VCC = 5.5V) specification is 1.8mA. 5. For pin 11 VIH = 3.15V, VIL = 0.9V. 6. Limits not valid when pin 12 (instead of pin 11) is used as control input. HCT Input Loading Table INPUT MR UNIT LOADS 0.35 NOTE: Unit Load is ∆ICC limit speciﬁed in DC Electrical Speciﬁcations Table, e.g. 360µA max at 25oC. Prerequisite for Switching Speciﬁcations 25oC PARAMETER HC TYPES Maximum Input Pulse Frequency tMAX 2 4.5 6 Input Pulse Width tW 2 4.5 6 Reset Removal Time tREM 2 4.5 6 6 30 35 80 16 14 100 20 17 5 25 29 100 20 17 125 25 21 4 20 23 120 24 20 150 30 26 MHz MHz MHz ns ns ns ns ns ns SYMBOL VCC (V) MIN TYP MAX -40oC TO 85oC MIN TYP MAX -55oC TO 125oC MIN TYP MAX UNITS 6 www.DataSheet4U.com CD74HC4060, CD74HCT4060 Prerequisite for Switching Speciﬁcations (Continued) 25oC PARAMETER Reset Pulse Width SYMBOL tW VCC (V) 2 4.5 6 HCT TYPES Maximum Input, Pulse Frequency Input Pulse Wi