16-BIT REGISTERED TRANSCEIVERS

www.DataSheet4U.com 54AC16543, 74AC16543 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS125B – MARCH 1990 – REVISED APRIL 1996 D D D D D D D Members of the Texas Instruments Widebus ™ Family 3-State True Outputs Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise EPIC ™ (Enhanced-Performance Implanted CMOS) 1-µm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Package Using 25-mil Center-to-Center Pin Spacings and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Pin Spacings 54AC16543 . . . WD PACKAGE 74AC16543 . . . DL PACKAGE (TOP VIEW) description The ’AC16543 are 16-bit registered transceivers that contain two sets of D-type latches for temporary storage of data flowing in either direction. They can be used as two 8-bit transceivers or one 16-bit transceiver. Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each register to permit independent control in either direction of data flow. The A-to-B enable (CEAB) input must be low to 28 29 enter data from A or to output data to B. Having CEAB low and LEAB low makes the A-to-B latches transparent; a subsequent low-to-high transition at LEAB puts the A latches in the storage mode. Data flow from B to A is similar, but requires using the CEBA, LEBA, and OEBA inputs. The 74AC16543 is packaged in TI’s shrink small-outline package, which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area. The 54AC16543 is characterized for operation over the full military temperature range of –55°C to 125°C. The 74AC16543 is characterized for operation from –40°C to 85°C. 1OEAB 1LEAB 1CEAB GND 1A1 1A2 VCC 1A3 1A4 1A5 GND 1A6 1A7 1A8 2A1 2A2 2A3 GND 2A4 2A5 2A6 VCC 2A7 2A8 GND 2CEAB 2LEAB 2OEAB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 1OEBA 1LEBA 1CEBA GND 1B1 1B2 VCC 1B3 1B4 1B5 GND 1B6 1B7 1B8 2B1 2B2 2B3 GND 2B4 2B5 2B6 VCC 2B7 2B8 GND 2CEBA 2LEBA 2OEBA Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC and Widebus are trademarks of Texas Instruments Incorporated. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 Copyright © 1996, Texas Instruments Incorporated • DALLAS, TEXAS 75265 1 54AC16543, 74AC16543 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS125B – MARCH 1990 – REVISED APRIL 1996 FUNCTION TABLE† (each 8-bit section) INPUTS CEAB H X L L L LEAB X X H L L OEAB X H L L L A X X X L H OUTPUT B Z Z B0‡ L H † A-to-B data flow is shown; B-to-A flow control is the same except that it uses CEBA, LEBA, and OEBA. ‡ Output level before the indicated steady-state input conditions were established 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 54AC16543, 74AC16543 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS125B – MARCH 1990 – REVISED APRIL 1996 logic symbol† 1OEBA 1CEBA 1LEBA 1OEAB 1CEAB 1LEAB 2OEBA 2CEBA 2LEBA 2OEAB 2CEAB 2LEAB 1A1 5 3 6D 1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A1 6 8 9 10 12 13 14 15 9 12D 2A2 2A3 2A4 2A5 2A6 2A7 2A8 16 17 19 20 21 23 24 11D 10 56 54 55 1 3 2 29 31 30 28 26 27 1EN3 G1 1C5 2EN4 G2 2C6 7EN9 G7 7C11 8EN10 G8 8C12 5D 4 52 1B1 51 49 48 47 45 44 43 42 1B2 1B3 1B4 1B5 1B6 1B7 1B8 2B1 41 40 38 37 36 34 33 2B2 2B3 2B4 2B5 2B6 2B7 2B8 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 54AC16543, 74AC16543 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS125B – MARCH 1990 – REVISED APRIL 1996 logic diagram (positive logic) 1OEBA 1CEBA 1LEBA 1OEAB 1CEAB 1LEAB 1A1 56 54 55 1 3 2 5 C1 1D 52 1B1 C1 1D To Seven Other Channels 2OEBA 2CEBA 2LEBA 2OEAB 2CEAB 2LEAB 2A1 29 31 30 28 26 27 15 C1 1D 42 2B1 C1 1D To Seven Other Channels 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 54AC16543, 74AC16543 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS125B – MARCH 1990 – REVISED APRIL 1996 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±400 mA Maximum power package dissipation at TA = 55°C (in still air)(see Note 2): DL package . . . . . . . . . . . 1.4 W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils. recommended operating conditions (see Note 3) 54AC16543 MIN VCC VIH Supply voltage High-level input voltage VCC = 3 V VCC = 4.5 V VCC = 5.5 V VCC = 3 V VIL VI VO IOH Low-level input voltage Input voltage Output voltage High-level output current VCC = 3 V VCC = 4.5 V VCC = 5.5 V VCC = 3 V IOL ∆t/∆v Low-level output current Input transition rise or fall rate VCC = 4.5 V VCC = 5.5 V 0 –55 VCC = 4.5 V VCC = 5.5 V 0 0 3 2.1 3.15 3.85 0.9 1.35 1.65 VCC VCC –4 –24 –24 12 24 24 10 125 0 –40 0 0 NOM 5 MAX 5.5 74AC16543 MIN 3 2.1 3.15 3.85 0.9 1.35 1.65 VCC VCC –4 –24 –24 12 24 24 10 85 ns/V °C mA mA V V V V NOM 5 MAX 5.5 UNIT V TA Operating free-air temperature NOTE 3: Unused inputs must be held high or low to prevent them from floating. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 54AC16543, 74AC16543 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS125B – MARCH 1990 – REVISED APRIL 1996 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC 3V IOH = –50 µA VOH IOH = –4 mA IOL = –24 mA 24 A IOH = –75 mA† IOL = 50 µA VOL IOL = 12 mA IOL = 24 mA IOL = 75 mA† VI = VCC or GND VO = VCC or GND VI = VCC or GND, IO = 0 4.5 V 5.5 V 3V 4.5 V 5.5 V 5.5 V 3V 4.5 V 5.5 V 3V 4.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V ±0.1 ±0.5 8 0.1 0.1 0.1 0.36 0.36 0.36 TA = 25°C MIN 2.9 4.4 5.4 2.58 3.94 4.94 TYP MAX 54AC16543 MIN 2.9 4.4 5.4 2.48 3.8 4.8 3.85 0.1 0.1 0.1 0.44 0.44 0.44 1.65 ±1 ±5 80 MAX 74AC16543 MIN 2.9 4.4 5.4 2.48 3.8 4.8 3.85 0.1 0.1 0.1 0.44 0.44 0.44 1.65 ±1 ±5 80 µA µA µA pF pF V V MAX UNIT II IOZ ICC Ci Control inputs A or B ports Control inputs VI = VCC or GND 5V 3 Cio A or B ports VO = VCC or GND 5V 11.5 † Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. timing requirements over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) TA = 25°C MIN MAX tw tsu th Pulse duration, LEAB or LEBA low Setup time, data before LEAB or LEBA ↑ Hold time, data after LEAB or LEBA ↑ 5 1 3.5 54AC16543 MIN 5 1 3.5 MAX 74AC16543 MIN 5 1 3.5 MAX UNIT ns ns ns timing requirements over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) TA = 25°C MIN MAX tw tsu th Pulse duration, LEAB or LEBA low Setup time, data before LEAB or LEBA ↑ Hold time, data after LEAB or LEBA ↑ 4 1 3 54AC16543 MIN 4 1 3 MAX 74AC16543 MIN 4 1 3 MAX UNIT ns ns ns PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 54AC16543, 74AC16543 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS125B – MARCH 1990 – REVISED APRIL 1996 switching characteristics over recommended operating free-air temperature r