16-BIT BUFFERS/LINE DRIVERS

www.DataSheet4U.com 54AC16244, 74AC16244 16-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCAS120A – MARCH 1990 – REVISED APRIL 1996 D D D D D D D Members of the Texas Instruments Widebust Family 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Configuration Minimizes High-Speed Switching Noise EPIC t (Enhanced-Performance Implanted CMOS) 1-mm Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages Using 25-mil Center-to-Center Pin Spacings, and 380-mil Fine-Pitch Ceramic Flat (WD) Packages Using 25-mil Center-to-Center Pin Spacings 54AC16244 . . . WD PACKAGE 74AC16244 . . . DGG OR DL PACKAGE (TOP VIEW) description The ’AC16244 are 16-bit buffers/line drivers designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. They can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide true outputs and symmetrical active-low output-enable (OE) inputs. When OE is low, the device passes noninverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. 1OE 1Y1 1Y2 GND 1Y3 1Y4 VCC 2Y1 2Y2 GND 2Y3 2Y4 3Y1 3Y2 GND 3Y3 3Y4 VCC 4Y1 4Y2 GND 4Y3 4Y4 4OE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 2OE 1A1 1A2 GND 1A3 1A4 VCC 2A1 2A2 GND 2A3 2A4 3A1 3A2 GND 3A3 3A4 VCC 4A1 4A2 GND 4A3 4A4 3OE The 74AC16244 is packaged in the TI’s shrink small-outline package, which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area. The 54AC16244 is characterized for operation over the full military temperature range of –55°C to 125°C. The 74AC16244 is characterized for operation from –40°C to 85°C. FUNCTION TABLE (each driver) INPUTS OE L L H A H L X OUTPUT Y H L Z Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC and Widebus are trademarks of Texas Instruments Incorporated. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 Copyright © 1996, Texas Instruments Incorporated • DALLAS, TEXAS 75265 1 54AC16244, 74AC16244 16-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCAS120A – MARCH 1990 – REVISED APRIL 1996 logic symbol† 1OE 2OE 3OE 4OE 1A1 1A2 1A3 1A4 2A1 2A2 2A3 2A4 3A1 3A2 3A3 3A4 4A1 4A2 4A3 4A4 1 48 25 24 47 46 44 43 41 40 38 37 36 35 33 32 30 29 27 26 1 4 1 3 1 2 1 1 EN1 EN2 EN3 EN4 2 3 5 6 8 9 11 12 13 14 16 17 19 20 22 23 1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2Y4 3Y1 3Y2 3Y3 3Y4 4Y1 4Y2 4Y3 4Y4 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 54AC16244, 74AC16244 16-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCAS120A – MARCH 1990 – REVISED APRIL 1996 logic diagram (positive logic) 1OE 1 3OE 2 25 1A1 47 1Y1 3A1 36 13 3Y1 1A2 46 3 1Y2 3A2 35 14 3Y2 1A3 44 5 1Y3 3A3 33 16 3Y3 1A4 43 6 1Y4 3A4 32 17 3Y4 2OE 48 4OE 8 24 2A1 41 2Y1 4A1 30 19 4Y1 2A2 40 9 2Y2 4A2 29 20 4Y2 2A3 38 11 2Y3 4A3 27 22 4Y3 2A4 37 12 2Y4 4A4 26 23 4Y4 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±400 mA Maximum power dissipation at TA = 55°C (in still air) (see Note 2): DGG package . . . . . . . . . . . . . . . . 0.85 W DL package . . . . . . . . . . . . . . . . . . . 1.2 W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 54AC16244, 74AC16244 16-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCAS120A – MARCH 1990 – REVISED APRIL 1996 recommended operating conditions (see Note 3) 54AC16244 MIN VCC VIH Supply voltage (see Note 4) High-level input voltage VCC = 3 V VCC = 4.5 V VCC = 5.5 V VCC = 3 V VIL VI VO IOH Low-level input voltage Input voltage Output voltage High-level output current VCC = 3 V VCC = 4.5 V VCC = 5.5 V VCC = 3 V IOL ∆t/∆v Low-level output current Input transition rise or fall rate VCC = 4.5 V VCC = 5.5 V 0 VCC = 4.5 V VCC = 5.5 V 0 0 3 2.1 3.15 3.85 0.9 1.35 1.65 VCC VCC –4 –24 –24 12 24 24 10 0 0 0 NOM 5 MAX 5.5 74AC16244 MIN 3 2.1 3.15 3.85 0.9 1.35 1.65 VCC VCC –4 –24 –24 12 24 24 10 ns/V mA mA V V V V NOM 5 MAX 5.5 UNIT V TA Operating free-air temperature –55 125 –40 85 °C NOTES: 3. Unused inputs should be tied to VCC through a pullup resistor of approximately 5 kW or greater to prevent them from floating. 4. All VCC and GND pins must be connected to the proper voltage supply. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC 3V IOH = –50 µA VOH IOH = –4 mA IOH = –24 mA 24 IOH = –75 mA† IOL = –50 µA VOL IOL = 12 mA IOL = 24 mA IOL = 75 mA† VI = VCC or GND VI = VCC or GND VI = VCC or GND, VI = VCC or GND VI = VCC or GND IO = 0 4.5 V 5.5 V 3V 4.5 V 5.5 V 5.5 V 3V 4.5 V 5.5 V 3V 4.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5V 5V 4.5 12 ±0.1 ±0.5 8 0.1 0.1 0.1 0.36 0.36 0.36 MIN 2.9 4.4 5.4 2.58 3.94 4.94 TA = 25°C TYP MAX 54AC16244 MIN 2.9 4.4 5.4 2.48 3.8 4.8 3.85 0.1 0.1 0.1 0.44 0.44 0.44 1.65 ±1 ±5 80 MAX 74AC16244 MIN 2.9 4.4 5.4 2.48 3.8 4.8 3.85 0.1 0.1 0.1 0.44 0.44 0.44 1.65 ±1 ±5 80 µA µA µA pF V V MAX UNIT II IOZ ICC Ci Co † Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 54AC16244, 74AC16244 16-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCAS120A – MARCH 1990 – REVISED APRIL 1996 switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) A TO (OUTPUT) Y Y Y MIN 2 2.4 2.2 2.9 4.1 3.7 TA = 25°C TYP MAX 7.1 8.3 7.5 10.4 6.8 6.5 9.4 10.7 10 13 8.4 8.1 54AC16244 MIN 2 2.4 2.2 2.9 4.1 3.7 MAX 10.8 11.8 11.5 14.6 9.1 8.8 74AC16244 MIN 2 2.4 2.2 2.9 4.1 3.7 MAX 10.8 11.8 11.5 14.6 9.1 8.8 UNIT ns ns ns OE OE switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ FROM (INPUT) A TO (OUTPUT) Y Y Y TA = 25°C MIN TYP MAX 1.6 2 1.7 2.2 4 3.5 4.6 5.3 4.8 6.1 6.4 5.5 6.3 7 6.7 8.1 7.8 7.2 54AC16244 MIN 1.6 2 1.7 2.2 4 3.5 MAX 7.1 7.9 7.5 9 8.4 7.6 74AC16244 MIN 1.6 2 1.7 2.2 4 3.5 MAX 7.1 7.9 7.5 9 8.4 7.6 UNIT ns ns ns OE OE operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd d Power dissipation capacitance per latch Outputs enabled Outputs disabled TEST CONDITIONS CL = 50 pF pF, f = 1 MHz TYP 43 7 UNIT pF PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 54AC16244, 74AC16244 16-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS SCAS120A – MARCH 1990 – REVISED APRIL 1996 PARAMETER MEASUREMENT INFORMATION 2 × VCC From Output Under Test CL = 50 pF (see Note A) 500 Ω S1 Open GND 500 Ω TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH S1 Open 2 × VCC G