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Part Number |
54ACT574 |
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Manufacturer |
National Semiconductor |
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Semiconductor DataSheet |
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DataSheet View |
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54AC574 • 54ACT574 Octal D-Type Flip-Flop with TRI-STATE Outputs
September 1998
54AC574 • 54ACT574 Octal D-Type Flip-Flop with TRI-STATE ® Outputs
General Description
The ’AC/’ACT574 is a high-speed, low power octal flip-flop with a buffered common Clock (CP) and a buffered common Output Enable (OE). The information presented to the D inputs is stored in the flip-flops on the LOW-to-HIGH Clock (CP) transition. The ’AC/’ACT574 is functionally identical to the ’AC/’ACT374 except for the pinouts.
Features
n ICC and IOZ reduced by 50% n Inputs and outputs on opposite sides of package allowing easy interface with microprocessors n Useful as input or output port for microprocessors n Functionally identical to ’AC/’ACT374 n TRI-STATE outputs for bus-oriented applications n Outputs source/sink 24 mA n ’ACT574 has TTL-compatible inputs n Standard Microcircuit Drawing (SMD) — ’ACT574: 5962-89601
Logic Symbols
IEEE/IEC
DS100256-1
DS100256-4
Pin Names D0–D7 CP OE O0–O7 Data Inputs
Description Clock Pulse Input TRI-STATE Output Enable Input TRI-STATE Outputs
TRI-STATE ® is a registered trademark of National Semiconductor Corporation. FACT™ is a trademark of Fairchild Semiconductor Corporation.
© 1998 National Semiconductor Corporation
DS100256
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Connection Diagrams
Pin Assignment for DIP, and Flatpak Pin Assignment for LCC
DS100256-2
DS100256-3
Functional Description
The ’AC/’ACT574 consists of eight edge-triggered flip-flops with individual D-type inputs and TRI-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CP) transition. With the Output Enable (OE) LOW, the contents of the eight flip-flops are available at the outputs. When OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops.
Function Table
Inputs OE H H H H L L L L CP H H N N N N H H D L H L H L H L H Internal Outputs Q NC NC L H L H NC NC ON Z Z Z Z L H NC NC Hold Hold Load Load Data Available Data Available No Change in Data No Change in Data Function
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance N = LOW-to-HIGH Transition NC = No Change
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Logic Diagram
DS100256-5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) DC Input Diode Current (IIK) VI = −0.5V VI = VCC +0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = −0.5V VO = VCC +0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current Per Output Pin (ICC or IGND) Storage Temperature (TSTG) Junction Temperature (TJ) CDIP −0.5V to +7.0V −20 mA +20 mA −0.5V to VCC +0.5V −20 mA +20 mA −0.5V to VCC +0.5V
Recommended Operating Conditions
Supply Voltage (VCC) (Unless Otherwise Specified) (AC) (ACT) Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) 54AC/ACT Minimum Input Edge Rate (∆V/∆t) ’AC Devices VIN from 30% to 70% of VCC VCC @ 3.3V, 4.5V, 5.5V Minimum Input Edge Rate (∆V/∆t) ’ACT Devices VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V 2.0V to 6.0V 4.5V to 5.5V 0V to VCC 0V to VCC −55˚C to +125˚C
125 mV/ns
±50 mA ±50 mA −65˚C to +150˚C
175˚C
125 mV/ns
Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. National does not recommend operation of FACT™ circuits outside databook specifications.
DC Characteristics for ’AC Family Devices
Symbol Parameter VCC (V) VIH Minimum High Level Input Voltage VIL Maximum Low Level Input Voltage VOH Minimum High Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 54AC TA = −55˚C to +125˚C Guaranteed Limits 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 (Note 2) VIN = VIL or VIH 3.0 4.5 5.5 VOL Maximum Low Level Output Voltage 3.0 4.5 5.5 2.4 3.7 4.7 0.1 0.1 0.1 (Note 2) VIN = VIL or VIH 3.0 4.5 5.5 IIN IOZ Maximum Input Leakage Current Maximum TRI-STATE Leakage Current
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Units
Conditions
VOUT = 0.1V V or VCC − 0.1V VOUT = 0.1V V or VCC − 0.1V IOUT = −50 µA V
−12 mA V IOH −24 mA −24 mA IOUT = 50 µA V
0.50 0.50 0.50 V µA IOL
12 mA 24 mA 24 mA VI = VCC, GND VI (OE) = VIL, VIH VI = VCC, VGND VO = VCC, GND
5.5
±1.0
5.5
±5.0
µA
DC Characteristics for ’AC Family Devices
Symbol Parameter VCC (V) IOLD IOHD ICC (Note 3) Minimum Dynamic Output Current Maximum Quiescent Supply Current
Note 2: All outputs loaded; thresholds on input associated with output under test. Note 3: Maximum test duration 2.0 ms, one output loaded at a time.
(Continued)
54AC TA = −55˚C to +125˚C Guaranteed Limits 50 −50 80.0
Units
Conditions
5.5 5.5 5.5
mA mA µA
VOLD = 1.65V VOHD = 3.85V VIN = VCC or GND
DC Characteristics for ’ACT Family Devices
Symbol Parameter VCC (V) VIH Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level 4.5 5.5 4.5 5.5 4.5 5.5 54ACT TA = −55˚C to +125˚C Guaranteed Limits 2.0 2.0 0.8 0.8 4.4 5.4 (Note 4) VIN = VIL or VIH 4.5 5.5 VOL Maximum Low Level Output Voltage 4.5 5.5 3.70 4.70 0.1 0.1 (Note 4) VIN = VIL or VIH 4.5 5.5 IIN IOZ Maximum Input Leakage Current Maximum TRI-STATE Leakage Current Maximum ICC/Input (Note 5) Minimum Dynamic Output Current Maximum Quiescent Supply Current
Note 4: All outputs loaded; thresholds on input associated with output under test. Note 5: Maximum test duration 2.0 ms, one output loaded at a time.
Units
Conditions
V
VOUT = 0.1V or VCC − 0.1V
VIL
V
VOUT = 0.1V or VCC − 0.1V
VOH
V
IOUT = −50 µA
V V
IOH
−24 mA −24 mA
IOUT = 50 µA
0.50 0.50
V µA µA
IOL
24 mA 24 mA
5.5 5.5
±1.0 ±5.0
VI = VCC, GND VI = VIL, VIH VO = VCC, GND
ICCT IOLD IOHD ICC
5.5 5.5 5.5 5.5
1.6 50 −50 80.0
mA mA mA µA
VI = VCC − 2.1V VOLD = 1.65V VOHD = 3.85V VIN = VCC or GND
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AC Electrical Characteristics for ’AC Family Devices
VCC Symbol Parameter (V) (Note 6) Min fMAX tPLH tPHL tPZH tPZL tPHZ tPLZ Maximum Clock Frequency Propagation Delay CP to On Propagation Delay CP to On Output Enable Time Output Enable Time Output Disable Time Output Disable Time 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0
Note 6: Voltage Range 3.3 is 3.3V ± 0.3V Voltage Range 5.0 is 5.0V ±0.5V
54AC TA = −55˚C to +125˚C CL = 50 pF Max MHz 16.5 11.5 15.0 10.5 13.0 9.5 12.5 9.5 14.0 11.5 10.5 9.0 ns ns ns ns ns ns 55 85 1.0 1.5 1.0 1.5 1.0 1.5 1.0 1.5 1.0 1.5 1.0 1.5 Units
AC Operating Requirements for ’AC Family Devices
VCC Symbol Parameter (V) (Note 7) ts th tw Set-Up Time, HIGH or LOW Dn to CP Hold Time, HIGH or LOW Dn to CP CP Pulse Width HIGH or LOW
Note 7: Voltage Range 3.3 is 3.3V ±0.3V Voltage Range 5.0 is 5.0V ±0.5V
54AC TA = −55˚C to +125˚C CL = 50 pF Guaranteed Minimum 4.5 3.5 2.5 2.5 7.5 5.0 ns ns Units
3.3 5.0 3.3 5.0 3.3 5.0
ns
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AC Electrical Characteristics for ’ACT Family Devices
VCC Symbol Parameter (V) (Note 8) Min fMAX tPLH tPHL tPZH tPZL tPHZ tPLZ Maximum Clock Frequency Propagation Delay CP to On Propagation Delay CP to On Output Enable Time Output Enable Time Output Disable Time Output Disable Time 5.0 5.0 5.0 5.0 1.5 1.5 1.5 1.5 11.0 11.0 12.0 10.0 ns ns ns ns 5.0 1.5 12.5 ns 5.0 5.0 70 1.5 13.5 54ACT TA = −55˚C to +125˚C CL = 50 pF Max ns ns Units
Note 8: Voltage Range 5.0 is 5.0V ±0.5V
AC Operating Requirements for ’ACT Family Devices
VCC Symbol Parameter (V) (Note 9) ts th tw Set-Up Time, HIGH or LOW Dn to CP Hold Time, HIGH or LOW Dn to CP CP Pulse Width HIGH or LOW
Note 9: Voltage Range 5.0 is 5.0V ±0.5V
54ACT TA = −55˚C to +125˚C CL = 50 pF Guaranteed Minimum 3.5 2.0 5.0 Units
5.0 5.0 5.0
ns ns ns
Capacitance
Symbol CIN CPD Parameter Input Capacitance Power Dissipation Capacitance Typ 4.5 40.0 Units pF pF Conditions VCC = OPEN VCC = 5.0V
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Physical Dimensions
inches (millimeters) unless otherwise noted
20 Terminal Ceramic Leadless Chip Carrier (L) NS Package Number E20A
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Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20 Lead Ceramic Dual-In-Line Package (D) NS Package Number J20A
20 Lead Ceramic Flatpak (F) NS Package Number W20A
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54AC574 • 54ACT574 Octal D-Type Flip-Flop with TRI-STATE Outputs
LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and whose faildevice or system, or to affect its safety or effectiveness. ure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user.
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