Octal Transparent Latch

www.DataSheet4U.com 54AC373 • 54ACT373 Octal Transparent Latch with TRI-STATE Outputs August 1998 54AC373 • 54ACT373 Octal Transparent Latch with TRI-STATE ® Outputs General Description The ’AC/’ACT373 consists of eight latches with TRI-STATE outputs for bus organized system applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the bus output is in the high impedance state. Features n n n n n n ICC and IOZ reduced by 50% Eight latches in a single package TRI-STATE outputs for bus interfacing Outputs source/sink 24 mA ’ACT373 has TTL-compatible inputs Standard Microcircuit Drawing (SMD) — ’AC373: 5962-87555 — ’ACT373: 5962-87556 Logic Symbols IEEE/IEC DS100329-1 DS100329-2 Pin Names D0–D7 LE OE O0–O7 Description Data Inputs Latch Enable Input Output Enable Input TRI-STATE Latch Outputs TRI-STATE ® is a registered trademark of National Semiconductor Corporation. FACT ® is a registered trademark of Fairchild Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100329 www.national.com Connection Diagrams Pin Assignment for DIP and Flatpak Pin Assignment for LCC DS100329-4 DS100329-3 Functional Description The ’AC/’ACT373 contains eight D-type latches with TRI-STATE standard outputs. When the Latch Enable (LE) input is HIGH, data on the Dn inputs enters the latches. In this condition the latches are transparent, i.e., a latch output will change state each time its D input changes. When LE is LOW, the latches store the information that was present on the D inputs a setup time preceding the HIGH-to-LOW transition of LE. The TRI-STATE standard outputs are controlled by the Output Enable (OE) input. When OE is LOW, the standard outputs are in the 2-state mode. When OE is HIGH, the standard outputs are in the high impedance mode but this does not interfere with entering new data into the latches. Truth Table Inputs LE X H H L OE H L L L Dn X L H X Outputs On Z L H O0 H = HIGH Voltage Level L = LOW Voltage Level Z = High Impedance X = Immaterial O0 = Previous O0 before HIGH to Low transition of Latch Enable www.national.com 2 Logic Diagram DS100329-5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 3 www.national.com Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) DC Input Diode Current (IIK) VI = −0.5V VI = VCC + 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = −0.5V VO = VCC + 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current per Output Pin (ICC or IGND) Storage Temperature (TSTG) Junction Temperature (TJ) CDIP −0.5V to +7.0V −20 mA +20 mA −0.5V to VCC + 0.5V −20 mA +20 mA −0.5V to VCC + 0.5V Recommended Operating Conditions Supply Voltage (VCC) ’AC ’ACT Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) 54AC/ACT Minimum Input Edge Rate (∆V/∆t) ’AC Devices VIN from 30% to 70% of VCC VCC @ 3.3V, 4.5V, 5.5V Minimum Input Edge Rate (∆V/∆t) ’ACT Devices VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V 2.0V to 6.0V 4.5V to 5.5V 0V to VCC 0V to VCC −55˚C to +125˚C 125 mV/ns ±50 mA ±50 mA −65˚C to +150˚C 175˚C 125 mV/ns Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. National does not recommend operation of FACT ® circuits outside databook specifications. DC Characteristics for ’AC Family Devices Symbol Parameter VCC (V) VIH Minimum High Level Input Voltage VIL Maximum Low Level Input Voltage VOH Minimum High Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 54AC TA = −55˚C to +125˚C Guaranteed Limits 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 (Note 2) VIN = VIL or VIH 3.0 4.5 5.5 VOL Maximum Low Level Output Voltage 3.0 4.5 5.5 2.4 3.7 4.7 0.1 0.1 0.1 (Note 2) VIN = VIL or VIH 3.0 4.5 5.5 IIN Maximum Input Leakage Current 5.5 0.50 0.50 0.50 V µA IOL VI = VCC, GND 12 mA 24 mA 24 mA V IOUT = 50 µA V IOH −12 mA −24 mA −24 mA V IOUT = −50 µA V VOUT = 0.1V or VCC − 0.1V V VOUT = 0.1V or VCC − 0.1V Units Conditions ±1.0 www.national.com 4 DC Characteristics for ’AC Family Devices Symbol Parameter VCC (V) IOZ Maximum TRI-STATE Current IOLD IOHD ICC (Note 3) Minimum Dynamic Output Current Maximum Quiescent Supply Current Note 2: All outputs loaded, thresholds on input associated with output under test. Note 3: Maximum test duration 2.0 ms, one output loaded at a time. (Continued) 54AC TA = −55˚C to +125˚C Guaranteed Limits Units Conditions 5.5 5.5 5.5 5.5 ±5.0 50 −50 80.0 µA mA mA µA VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND VOLD = 1.65V Max VOHD = 3.85V Min VIN = VCC or GND Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC. ICC for 54AC @ 25˚C is identical to 74AC @ 25˚C. DC Characteristics for ’ACT Family Devices Symbol Parameter VCC (V) VIH VIL VOH Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level Output Voltage 4.5 5.5 4.5 5.5 4.5 5.5 54ACT TA = −55˚C to +125˚C Guaranteed Limits 2.0 2.0 0.8 0.8 4.4 5.4 (Note 5) VIN = VIL or VIH 4.5 5.5 VOL Maximum Low Level Output Voltage 4.5 5.5 3.70 4.70 0.1 0.1 (Note 5) VIN = VIL or VIH 4.5 5.5 IIN IOZ ICCT IOLD IOHD ICC Maximum Input Leakage Current Maximum TRI-STATE Current Maximum ICC/Input (Note 6) Minimum Dynamic Output Current Maximum Quiescent Supply Current Note 5: All outputs loaded; thresholds on input associated with output under test. Note 6: Maximum test duration 2.0 ms, one output loaded at a time. Note 7: ICC for 54ACT @ 25˚C is identical to 74ACT @ 25˚C. Units Conditions V V V VOUT = 0.1V or VCC − 0.1V VOUT = 0.1V or VCC − 0.1V IOUT = −50 µA V V IOH IOUT = 50 µA −24 mA −24 mA 0.50 0.50 V µA µA mA mA mA µA IOL VI = VCC, GND VI = VIL, VIH VO = VCC, GND VI = VCC − 2.1V VOLD = 1.65V Max VOHD = 3.85V Min VIN = VCC or GND 24 mA 24 mA 5.5 5.5 5.5 5.5 5.5 5.5 ±1.0 ±5.0 1.6 50 −50 80.0 5 www.national.com AC Electrical Characteristics VCC Symbol Parameter (V) (Note 8) Min tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation Delay Dn to On Propagation Delay Dn to On Propagation Delay LE to On Propagation Delay LE to On Output Enable Time Output Enable Time Output Disable Time Output Disable Time 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 Note 8: Voltage Range 3.3 is 3.3V ±0.3V Voltage Range 5.0 is 5.0V ±0.5V 54AC TA = −55˚C to +125˚C CL = 50 pF Max 16.5 11.5 16.0 11.5 16.5 12.0 15.0 11.0 14.0 10.5 13.5 10.0 16.0 13.5 13.0 10.5 ns ns ns ns ns ns ns ns 1.0 1.5 1.0 1.5 1.0 1.5 1.0 1.5 1.0 1.5 1.0 1.5 1.0 1.5 1.0 1.5 Units AC Operating Requirements VCC Symbol Parameter (V) (Note 9) ts th tw Setup Time, HIGH or LOW Dn to LE Hold Time, HIGH or LOW Dn to LE LE Pulse Width, HIGH Note 9: Voltage Range 3.3 is 3.3V ±0.3V Voltage Range 5.0 is 5.0V ±0.5V 54AC TA = −55˚C to +125˚C CL = 50 pF Guaranteed Minimum 6.5 5.0 1.0 1.0 6.5 5.0 ns ns Units Fig. No. 3.3 5.0 3.3 5.0 3.3 5.0 ns www.national.com 6 AC Electrical Characteristics VCC Symbol Parameter (V) (Note 10) Min tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation Delay Dn to On Propagation Delay Dn to On Propagation Delay LE to On Propagation Delay LE to On Output Enable Time Output Enable Time Output Disable Time Output Disable Time 5.0 5.0 5.0 5.0 1.5 1.5 1.5 1.5 11.5 11.0 14.0 11.0 ns ns ns ns 5.0 1.5 11.5 ns 5.0 1.5 12.5 ns 5.0 1.5 12.5 ns 5.0 1.5 54ACT TA = −55˚C to +125˚C CL = 50 pF Max 12.5 ns Units Note 10: Voltage Range 5.0 is 5.0V ±0.5V AC Operating Requirements VCC Symbol Parameter (V) (Note 11) 54ACT TA = −55˚C to +125˚C CL = 50 pF Guaranteed Minimum ts th tw Setup Time, HIGH or LOW Dn to LE Hold Time, HIGH or LOW Dn to LE LE Pulse Width, HIGH 5.0 8.5 ns Note 11: Voltage Range 5.0 is 5.0V ±0.5V Units 5.0 5.0 8.5 1.0 ns ns Capacitance Symbol CIN CPD Parameter Input Capacitance Power Dissipation Capacitance Typ 4.5 40.0 Units pF pF Conditions VCC = OPEN VCC = 5.0V 7 www.national.com 8 Physical Dimensions inches (millimeters) unless otherwise noted 20 Terminal Ceramic Leadless Chip Carrier (L) NS Package Number E20A 20 Lead Ceramic Dual-In-Line Package (D) NS Package Number J20A 9 www.national.com 54AC373 • 54ACT373 Octal Transparent Latch with TRI-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Ceramic Flatpak (F) NS Package Number W20A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and whose faildevice or system, or to affect its safety or effectiveness. ure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: eur