Quad 2-Input Multiplexer

www.DataSheet4U.com 54AC257 • 54ACT257 Quad 2-Input Multiplexer with TRI-STATE Outputs July 1998 54AC257 • 54ACT257 Quad 2-Input Multiplexer with TRI-STATE ® Outputs General Description The ’AC/’ACT257 is a quad 2-input multiplexer with TRI-STATE outputs. Four bits of data from two sources can be selected using a Common Data Select input. The four outputs present the selected data in true (noninverted) form. The outputs may be switched to a high impedance state by placing a logic HIGH on the common Output Enable (OE) input, allowing the outputs to interface directly with bus-oriented systems. Features n n n n n n ICC and IOZ reduced by 50% Multiplexer expansion by tying outputs together Noninverting TRI-STATE outputs Outputs source/sink 24 mA ’ACT257 has TTL-compatible inputs Standard Military Drawing (SMD) — ’AC257: 5962-88703 — ’ACT257: 5962-89689 Logic Symbols IEEE/IEC DS100286-1 DS100286-2 Pin Names S OE I0a–I0d I1a–I1d Za–Zd Description Common Data Select Input TRI-STATE Output Enable Input Data Inputs from Source 0 Data Inputs from Source 1 TRI-STATE Multiplexer Outputs TRI-STATE ® is a registered trademark of National Semiconductor Corporation. FACT™ is a trademark of Fairchild Semiconductor Corporation. © 1998 National Semiconductor Corporation DS100286 www.national.com Connection Diagrams Pin Assignment for DIP and Flatpak Functional Description The ’AC/’ACT257 is quad 2-input multiplexer with TRI-STATE outputs. It selects four bits of data from two sources under control of a Common Data Select input. When the Select input is LOW, the I0x inputs are selected and when Select is HIGH, the I1x inputs are selected. The data on the selected inputs appears at the outputs in true (noninverted) form. The device is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are shown below: Za = OE • (11a • S + I0a • S) Zb = OE • (11b • S + I0b • S) Zc = OE • (11c • S + I0c • S) Zd = OE • (11d • S + I0d • S) When the Output Enable (OE) is HIGH, the outputs are forced to a high impedance state. If the outputs are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. Designers should ensure the Output Enable signals to TRI-STATE devices whose outputs are tied together are designed so there is no overlap. DS100286-3 Pin Assignment for LCC Truth Table Output Enable OE H DS100286-4 Select Input S X H H L L I0 X X X L H Data Inputs I1 X L H X X Outputs Z Z L H L H L L L L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance Logic Diagram DS100286-5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.national.com 2 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (VCC) DC Input Diode Current (IIK) VI = −0.5V VI = VCC +0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = −0.5V VO = VCC +0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current Per Output Pin (ICC or IGND) Storage Temperature (TSTG) Junction Temperature (TJ) CDIP −0.5V to +7.0V −20 mA +20 mA −0.5V to VCC +0.5V −20 mA +20 mA −0.5V to VCC +0.5V Recommended Operating Conditions Supply Voltage (VCC) ’AC ’ACT Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) 54AC/ACT Minimum Input Edge Rate (∆V/∆t) ’AC Devices VIN from 30% to 70% of VCC VCC @ 3.3V, 4.5V, 5.5V Minimum Input Edge Rate (∆V/∆t) ’ACT Devices VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V 2.0V to 6.0V 4.5V to 5.5V 0V to VCC 0V to VCC −55˚C to +125˚C 125 mV/ns ±50 mA ±50 mA −65˚C to +150˚C 175˚C 125 mV/ns Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. National does not recommend operation of FACT™ circuits outside databook specifications. DC Characteristics for ’AC Family Devices Symbol Parameter VCC (V) 54AC TA = −55˚C to +125˚C Guaranteed Limits VIH Minimum High Level Input Voltage VIL Maximum Low Level Input Voltage VOH Minimum High Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 (Note 2) VIN = VIL or VIH 3.0 4.5 5.5 VOL Maximum Low Level Output Voltage 3.0 4.5 5.5 2.4 3.7 4.7 0.1 0.1 0.1 (Note 2) VIN = VIL or VIH 3.0 4.5 5.5 IIN Maximum Input Leakage Current 5.5 0.50 0.50 0.50 V µA IOL 12 mA 24 mA 24 mA VI = VCC, GND V V IOH −12 mA −24 mA −24 mA IOUT = 50 µA V IOUT = −50 µA V VOUT = 0.1V or VCC − 0.1V V VOUT = 0.1V or VCC − 0.1V Units Conditions ±1.0 3 www.national.com DC Characteristics for ’AC Family Devices Symbol Parameter VCC (V) (Continued) 54AC TA = −55˚C to +125˚C Guaranteed Limits Units Conditions IOZ Maximum TRI-STATE Leakage Current 5.5 5.5 5.5 5.5 ±10.0 50 −50 80.0 µA mA mA µA VI (OE) = VIL, VIH VI = VCC, GND VO = VCC, GND VOLD = 1.65V Max VOHD = 3.85V Min VIN = VCC or GND IOLD IOHD ICC (Note 3) Minimum Dynamic Output Current Maximum Quiescent Supply Current Note 2: All outputs loaded; thresholds on input associated with output under test. Note 3: Maximum test duration 2.0 ms, one output loaded at a time. Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC. Note 5: ICC for 54AC @ 25˚C is identical to 74AC @ 25˚C. DC Characteristics for ’ACT Family Devices Symbol Parameter VCC (V) 54ACT TA = −55˚C to +125˚C Guaranteed Limits VIH Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level Output Voltage 4.5 5.5 4.5 5.5 4.5 5.5 2.0 2.0 0.8 0.8 4.4 5.4 (Note 6) VIN = VIL or VIH 4.5 5.5 VOL Maximum Low Level Output Voltage 4.5 5.5 3.70 4.70 0.1 0.1 (Note 6) VIN = VIL or VIH 4.5 5.5 IIN IOZ ICCT IOLD IOHD Maximum Input Leakage Current Maximum TRI-STATE Leakage Current Maximum ICC/Input (Note 7) Minimum Dynamic Output Current 5.5 5.5 50 −50 mA mA VOLD = 1.65V Max VOHD = 3.85V Min 5.5 1.6 mA 5.5 5.5 0.50 0.50 V µA µA IOL 24 mA 24 mA VI = VCC, GND VI = VIL, VIH VO = VCC, GND VI = VCC − 2.1V V V IOH −24 mA −24 mA IOUT = 50 µA V V V VOUT = 0.1V or VCC − 0.1V VOUT = 0.1V or VCC − 0.1V IOUT = −50 µA Units Conditions VIL VOH ±1.0 ±10.0 www.national.com 4 DC Characteristics for ’ACT Family Devices Symbol Parameter VCC (V) (Continued) 54ACT TA = −55˚C to +125˚C Guaranteed Limits Units Conditions ICC Maximum Quiescent Supply Current 5.5 80.0 µA VIN = VCC or GND Note 6: All outputs loaded; thresholds on input associated with output under test. Note 7: Maximum test duration 2.0 ms, one output loaded at a time. Note 8: ICC for 54ACT @ 25˚C is identical to 74ACT @ 25˚C. AC Electrical Characteristics Symbol Parameter VCC (V) (Note 9) tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation Delay In to Zn Propagation Delay In to Zn Propagation Delay S to Zn Propagation Delay S to Zn Output Enable Time Output Enable Time Output Disable Time Output Disable Time 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 Note 9: Voltage Range 3.3 is 3.0V ±0.3V Voltage Range 5.0 is 5.0V ±0.5V 54AC TA = −55˚C to +125˚C CL = 50 pF 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 11.0 8.0 11.0 8.5 14.5 11.0 14.5 11.0 13.0 10.0 11.0 9.5 13.0 11.0 10.5 9.5 Units ns ns ns ns ns ns ns ns AC Electrical Characteristics Symbol Parameter VCC (V) (Note 10) tPLH tPHL tPLH tPHL tPZH Propagation Delay In to Zn Propagation Delay In to Zn Propagation Delay S to Zn Propagation Delay S to Zn Output Enable Time 5.0 1.0 9.5 ns 5.0 1.0 11.5 ns 5.0 1.0 11.0 ns 5.0 1.0 9.5 ns 5.0 1.0 54ACT TA = −55˚C to +125˚C CL = 50 pF 8.0 ns Units 5 www.national.com AC Electrical Characteristics Symbol Parameter (Continued) 54ACT TA = −55˚C to +125˚C CL = 50 pF 1.0 1.0 1.0 9.5 10.5 9.5 ns ns ns VCC (V) (Note 10) Units tPZL tPHZ tPLZ Output Enable Time Output Disable Time Output Disable Time 5.0 5.0 5.0 Note 10: Voltage Range 5.0 is 5.0V ±0.5V Capacitance Symbol CIN CPD Parameter Input Capacitance Power Dissipation Capacitance Typ 4.5 50.0 Units pF pF Conditions VCC = OPEN VCC = 5.0V www.national.com 6 Physical Dimensions inches (millimeters) unless otherwise noted 20 Terminal Ceramic Leadless Chip Carrier (L) NS Package Number E20A 16 Lead Ceramic Flatpak (F) NS Package Number W16A 7 www.national.com 54AC257 • 54ACT257 Quad 2-Input Multiplexer with TRI-STATE Outputs LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or sysdevice or system whose failure to perform can be reatems which, (a) are intended for surgical implant into sonably expected to cause the failure of the life support the body, or (b) support or sustain life, and whose faildevice or system, or to affect its safety or effectiveness. ure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 1 80-530 85 85 En