H-bridge Power MOSFET Controller

3940 3940 ADVANCED DATASHEET – 4/9/03 (Subject to change without notice.) H-BRIDGE POWER MOSFET CONTROLLER The A3940 was designed specifically for driving high power DC motors in automotive applications. The A3940 provides four high current gate drive outputs capable of driving a wide range of power N-channel MOSFETs. Bootstrap capacitors are utilized to provide the above battery supply voltage required for N-channel FETs. An internal charge pump for the highside will allow for DC (100% duty cycle) operation of the bridge. PHASE and ENABLE input terminals are provided for use in controlling the speed and direction of a DC motor with externally applied PWM control signals. Protection features include supply under-voltage and over-voltage, programmable deadtime adjustment for cross-conduction protection, thermal shutdown, and motor lead short-to-supply and short-to-ground protection. The A3940 is available in 28L low profile (1mm) e-TSSOP packaging (LP) which has an exposed pad solderable to PCB layers for improved thermal and electrical performance. Also, it is available in the widebody, SOIC (LW) package. www.DataSheet4U.com VDRAIN 1 LSS 2 GLB 3 SB 4 GHB 5 CB 6 VIN 7 VREG13 8 CA 9 GHA 10 SA 11 GLA 12 VBB 13 CP2 14 28 VDSTH 27 IDEAD 26 LONG 25 RESET 24 PHASE 23 ENABLE A3940LP, LW 22 SR 21 MODE 20 VREG5 19 OVSET 18 FAULT 17 GND 16 CP1 15 VCP ABSOLUTE MAXIMUM RATINGS Load Supply Voltages VBB, Vdrain, CP1 …………. -0.6 V to +40 V Logic Input/Output Voltage Range, Vin/out ……………. -0.3 V to +6.5 V LSS Voltage................................ -2 V to + 6.5 V Pins SA/SB .................................... -2 V to +45 V Pins GHA/GHB ................................ -2 to + 55 V Pins CA/CB………….………….…-0.6 to + 55 V Pins CP2/VCP/VIN ..……………–0.6 to + 52 V Operating Temperature Range, TA ............................ -40 °C to +135 °C Max. Junction Temperature, TJ ............... +150 °C Storage Temperature Range, TS............................. -55 °C to +150 °C -----------------------------------------------------------THERMAL IMPEDANCE, typical (Ta = +25 °C)* A3940LP, θ JA ……………………. 28 °C/W A3940LW, θ JA …………………… 44 °C/W * Measured with JEDEC standard “High K” 4 layer board. FEATURES High Current Gate Drive for Driving a Wide Range of N-ch MOSFET’s Charge Pump to boost gate drive at low battery input conditions. Bootstrapped Gate Drive with Charge Pump for 100% Duty Cycle Synchronous Rectification Fault Diagnostic Output Adjustable Dead Time CrossConduction Protection Motor Lead Short-to-Ground and Short-to- Supply Protection. Thermal Shutdown Gate Drive for External Reverse Battery MOSFET Under-voltage Protection Over-voltage Protection -40 °C to 150 °C, Tj Operation H-BRIDGE POWER MOSFET CONTROLLER Functional Block Diagram 0.47 uF Cr Cp VBB CP1 CP2 VCP VIN 1 uF 47K 10K +VBAT VREG5 - + VREG13 +5Vreg Charge Pump Linear Reg 10 uF + BSS84/110 or other low Idss, p-ch FET. Reverse Battery Protection 0.1 uF LONG IDEAD Dead-Time Adjust VBB VDRAIN + OVSET Undervoltage/ Overvoltage Detect Top-off Charge Pump CA CBOOT High Side Driver VDSTH Short to Ground Protection GHA ENABLE PHASE MODE RESET SR LSS GND Vdrain Open Short-to-Battery Short-to-Ground VBB Over-voltage VBB Under-voltage VREG13 Under-voltage TSD FAULT VREG13 SA Control Logic Short to Supply Protection Low Side Driver GLA O.D. GLB GATE DRIVE B CB SB GHB e-PAD 3940 14MAY02 H-BRIDGE POWER MOSFET CONTROLLER ELECTRICAL CHARACTERISTICS: Unless noted, otherw ise: TA = - 40°C to +135°C, TJ = - 40°C to +150°C, VBB = 7 to 40 V, Vin < Vbb, Cp = 0.47 uF, Cr = 1 uF, Creg5 = 0.1 uF, Creg13 = 10 uF, Cboot = .1 uF, PWM (Sq.Wave) Freq = 22.5 kHz. Typ. values sim. at 25°C, Max/Min values sim. over TJ range. Negative current flows out of designated pin. Characteristics VBB Quiescent Currents Symbol Test Conditions RESET=1, Vbb=Vin=40 V, Coast, stopped, CP disabled, Idead = 170 uA. RESET=1, Vbb=Vin=15 V, Coast, stopped, CP disabled, Idead = 170 uA. RESET=1, Vbb=40 V, Vin=Vcp, Coast, stopped, Idead = 170 uA. Icp=2.5 mA RESET=1, Vbb=15 V, Vin=Vcp, Coast, stopped, Idead = 170 uA. Icp=2.5 mA RESET = 0 Min. Typ. 11.0 8.7 10.5 10.3 Max. 14.0 10.4 12 12 1 Units mA mA mA mA uA V mV mV mA IVBB VREG5 Output Voltage VREG5 Line Regulation VREG5 Load Regulation VREG5 Short -circuit Current VCP Output Voltage Levels VREG5 VREG5 VREG5 Ilimit5 VCP no load IREG5 = 4.0 mA IREG5 = 0 - 4.0 mA, Vbb = 40 V Vbb = 40 V, VREG5 = 0 VBB = 14 - 40 V, Icp = 15 mA VBB = 7 V, Icp = 15 mA 4.5 5 5 5 28 5.5 VBB+10 11.7 15 VBB +11 13 VBB + 12 13.8 V V mA VCP Gate Drive VCP Output Voltage Ripple VCP Pump-up time ICP VCP Tup SR=1, MODE=0, ENABLE=PWM Icp = 15 mA, VBB = 14 - 40 V Vin = VCP, VBB = 14 - 40 V Vin = VCP, VBB = 7 V 500 2.5 3.5 1.4 12.6 13.3 0.7 2 2 60 14.0 mV/pp mS mS mA V V mV mV mA uS mS VREG13 Input Current (Quiescent) VREG13 Output Voltage VREG13 Dropout Voltage VREG13 Line Regulation VREG13 Load Regulation VREG13 Short -circuit Current GO-SLEEP Response Time WAKE-UP Response Time Ivin VREG13 VREGDV VREG13 VREG13 Ilimit13 RESET=1, Vbb=Vin=40 V, Coast, stopped. VIN = 15 V, no load IREG13 = 15mA, VIN = 11 - 14 V Vin = 15 - 40 V, IREG13 = 15 mA Vin = 40 V, IREG13 = 0 - 15 mA Vin = 40 V, VREG13 = 0 (pulse) RESET = 0 to VREG5 = 4 V RESET = 1 to VREG13_UV cleared. Tsleep Twake 4 25 1.4 H-BRIDGE POWER MOSFET CONTROLLER Characteristics Control Logic Logic Input Voltages VIN(1) VIN(1) VIN(0) Logic Input Current IIN(1) IIN(0) IIN(0) HIGH level input (Logic 1), except RESET. HIGH level input (Logic 1) for RESET LOW level input (Logic 0) VIN = 2.0 VIN = .8, except RESET(0) VIN = .8, RESET(0) 2.0 2.2 – – – 40 16 .8 100 40 1 V uA uA uA V Symbol Test Conditions Min. Typ. Max. Units Gate Drives, GHx, GLx ( internal SOURCE or upper switch stages) Output HIGH Voltage VDSL(HI) GHx: IxU = -10 mA, Vsx = 0 GLx: IxU = -10 mA, Vlss = 0 Source Current (pulsed) Ixu VSDU = 10 V, Tj = 25 °C VSDU = 10 V, Tj = 135 °C Source ON Resistance RSDU(ON) IxU = -150 mA, Tj = 25 °C IxU = -150 mA, Tj = 135 °C Source Load Rise-time (20 - 80%) Trise Measure VDSL. Cload = 3300 pF. 400 4 7 90 13 23 VREG 13 – 2.2 VREG 13 – 0.2 700 VREG13 VREG13 V V mA mA Ω Ω nS Gate Drives, GHx, GLx ( internal SINK or lower switch stages) Sink Current (pulsed) IxL VDSL = 10 V, Tj = 25 °C VDSL = 10 V, Tj = 135 °C Sink ON Resistance RDSL(ON) IxL = +150 mA, Tj = 25 °C IxL = +150 mA, Tj = 135 °C Sink Load Fall-time (20 - 80%) Tfall Measure VDSL. Cload = 3300 pF. 550 1.8 3.0 70 6.0 7.5 800 mA mA Ω Ω nS Gate Drives, GHx, GLx (General) Propagation Delay Prop Delay Differences Dead Time (between GHx, GLx transitions of same phase) tPROP tPROP tDEAD Logic inputs to unloaded GHx, GLx Grouped by rising and falling edge transitions. Long = 0, Rdead =12.1K (Idead =167uA) Long = 0, Rdead =499K (Idead =4uA) Long = 1, Rdead =12.1K (Idead =167uA) Long = 1, Rdead =499K (Idead =4uA) 8.5 0.3 215 50 nS nS uS 10.5 uS uS 320 uS Notes: For GHX: VSDU = VCX – VGHX , VDSL = VGHX – VSX , VDSL(HI) = VCX – VSDU – VSX . For GLX: VSDU = VREG13 – VGLX , VDSL = VGLX – VLSS , VDSL(HI) = VREG13 – VSDU – VLSS . H-BRIDGE POWER MOSFET CONTROLLER Characteristics Bootstrap Circuit Diode Forward Current Limits Diode Forward Drop Diode Resistance Top-off CP Source Current at Cx Icx Vd Rd Icx 3V <[ (VREG13 = 13.5V) - Vcx] < 12V Id = 10 mA Rd(100) = [Vd(150) - Vd(50)] / 100 Vcx-Vsx=8V, Vbb=40V, GHx=1(no load) 140 0.8 1.5 50 1000 2.0 6.5 mA V Ω uA Symbol Test Conditions Min. Typ. Max. Units Fault/Protection Circuits VBB Under-voltage VBB UV Hysteresis VREG13 Under-voltage VREG13 Hysteresis VBB Over-voltage Vbbuv Vbbuvhy V13uv V13uvhy Vbbov VBB decreasing Recovery = Vbbuv + Vbbuvhy Vin decreasing Recovery = V13uv + V13uvhy Vbb increasing, Vovset = 0 V Vbb increasing, Vovset = 0.45 V Vbb increasing, Vovset = 0.9 V VBB OV Hysteresis OVSET Input Current Short-to-Ground Threshold Vbbovhy Iovset Vstg Recovery = Vbbov - Vbbovhy Vovset = 0 to 0.9 V 0.5 < Vdsth < 3.0 V Vdsth – 0.4 Short-to-Battery Threshold Vstb 0.5 < Vdsth < 3.0 V Vdsth – 0.4 Vdrain/Open-Bridge Threshold VDSTH Input Current Vdrain/Open-Bridge Current Vdoth Idsth Ivdrain If Vdrain < Vdoth a Bridge fault occurs 1.0V < Vdsth < 3.0 V RESET = 0 RESET = 1, Vdsth < 3.0 V Fault Latch Clear Pulsewidth Fault Clear Prop Delay Fault Detection Noise Filter Fault Output Tlatch Tprop Tnoise Vout(0) Iout(1) Thermal Shutdown Temp. Thermal Shutdown Hysteresis TJTSD ∆TJ Iout = 5 mA, faults negated. Vout = 5V, open-drain, fault asserted. Temperature increasing. Recovery = TJTSD - ∆TJ 172 12 RESET= 0, pulse From RESET=1 to FAULT=0 0.15 2.0 1.7 0.4 1 1 4.5 200 7.5 200 16 24 32.5 2.1 5.25 450 8.25 450 19.6 28 36.4 3.1 6.0 700 9.0 700 22 30.5 39 4.1 1.4 Vdsth + 0.3 Vdsth + 0.3 3 1 1 0.5 2.0 V uA uA mA uS uS uS V uA °C °C V V mV V mV V V V V uA V H-BRIDGE POWER MOSFET CONTROLLER Pin Descriptions GLB/GLA. Low-side gate drive outputs for external MOSFET drivers. External series gate resistors can be used to control slew rate seen at the power MOSFET’s gate. IDEAD. Analog input current set by resistor to ground controls basic Deadtime. Open pin gives unspecified long Deadtime. Always use Rdead < 500K. Videad = 2.0 V. SB/SA. Directly connected to the motor terminals, these pins sense the voltages switched across the load. The pin is also connected to the negative side of the bootstrap capacitor and is the negative supply connection for the floating highside drive. GHB/GHA. High-side gate drive outputs for N-channel MOSFET drivers. External series gate resistors can be used to control slew rate seen at the power driver gate. LONG. When HIGH, selects long Deadtimes. When LOW, selects short Deadtimes. Internally pulled down via 50K resistor. OVSET. Analog Input to set the VBB over-voltage threshold. Connect to VREG5 for very high