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Texas Instruments
Texas Instruments

TAS5508B Datasheet

8 Channel Digital Audio PWM Processor


TAS5508B Datasheet Preview


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TAS5508B
8-Channel Digital Audio PWM Processor
Data Manual
TM
April 2006
DAV Digital Audio/Speaker
SLES162B
Page 1

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TAS5508B
8-Channel Digital Audio PWM Processor
Data Manual
TM
Literature Number: SLES162B
December 2005 – Revised April 2006
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Page 2

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TAS5508B
8-Channel Digital Audio PWM Processor
SLES162B – DECEMBER 2005 – REVISED APRIL 2006
Contents
1 Introduction ....................................................................................................................... 11
1.1 Features ..................................................................................................................... 11
1.2 Overview..................................................................................................................... 12
1.3 Changes From the TAS5508A to the TAS5508B ...................................................................... 14
1.4 TAS5508B System Diagrams............................................................................................. 15
2 Description ........................................................................................................................ 17
2.1 Physical Characteristics ................................................................................................... 17
2.1.1 Terminal Assignments .......................................................................................... 17
2.1.2 Ordering Information ............................................................................................ 17
2.1.3 Terminal Descriptions........................................................................................... 18
2.2 TAS5508B Functional Description ....................................................................................... 20
2.2.1 Power Supply .................................................................................................... 20
2.2.2 Clock, PLL, and Serial Data Interface ........................................................................ 20
2.2.3 I 2C Serial-Control Interface .................................................................................... 21
2.2.4 Device Control ................................................................................................... 21
2.2.5 Digital Audio Processor (DAP)................................................................................. 21
2.3 TAS5508B DAP Architecture ............................................................................................. 23
2.3.1 TAS5508B DAP Architecture Diagrams ...................................................................... 23
2.3.2 I2C Coefficient Number Formats .............................................................................. 26
2.4 Input Crossbar Mixer....................................................................................................... 30
2.5 Biquad Filters ............................................................................................................... 30
2.6 Bass and Treble Controls ................................................................................................. 31
2.7 Volume, Automute, and Mute............................................................................................. 32
2.8 Automute and Mute Channel Controls .................................................................................. 33
2.9 Loudness Compensation .................................................................................................. 34
2.9.1 Loudness Example .............................................................................................. 35
2.10 Dynamic Range Control (DRC)........................................................................................... 35
2.10.1 DRC Implementation ............................................................................................ 38
2.10.2 Compression/Expansion Coefficient Computation Engine Parameters ................................. 39
2.11 Output Mixer ................................................................................................................ 41
2.12 PWM ......................................................................................................................... 41
2.12.1 DC Blocking (High-Pass Filter Enable/Disable) ............................................................. 42
2.12.2 De-Emphasis Filter .............................................................................................. 42
2.12.3 Power-Supply Volume Control (PSVC)....................................................................... 43
2.12.4 AM Interference Avoidance .................................................................................... 44
3 TAS5508B Controls and Status ............................................................................................ 45
3.1 I2C Status Registers ....................................................................................................... 45
3.1.1 General Status Register (0x01)................................................................................ 45
3.1.2 Error Status Register (0x02) ................................................................................... 45
3.2 TAS5508B Pin Controls ................................................................................................... 45
3.2.1 Reset (RESET) .................................................................................................. 45
3.2.2 Power Down (PDN) ............................................................................................. 47
3.2.3 Back-End Error (BKND_ERR) ................................................................................. 47
3.2.4 Speaker/Headphone Selector (HP_SEL)..................................................................... 48
3.2.5 Mute (MUTE)..................................................................................................... 48
3.3 Device Configuration Controls............................................................................................ 49
3.3.1 Channel Configuration Registers .............................................................................. 49
3.3.2 Headphone Configuration Registers .......................................................................... 50
3.3.3 Audio System Configurations .................................................................................. 50
3.3.4 Recovery from Clock Error ..................................................................................... 51
Contents
3
Page 3

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TAS5508B
8-Channel Digital Audio PWM Processor
SLES162B – DECEMBER 2005 – REVISED APRIL 2006
www.ti.com
3.3.5 Power-Supply Volume-Control Enable ....................................................................... 51
3.3.6 Volume and Mute Update Rate................................................................................ 51
3.3.7 Modulation Index Limit .......................................................................................... 51
3.4 Master Clock and Serial Data Rate Controls ........................................................................... 52
3.4.1 PLL Operation.................................................................................................... 52
3.5 Bank Controls............................................................................................................... 52
3.5.1 Manual Bank Selection ......................................................................................... 53
3.5.2 Automatic Bank Selection ...................................................................................... 53
3.5.3 Bank Set .......................................................................................................... 53
3.5.4 Bank-Switch Timeline ........................................................................................... 54
3.5.5 Bank-Switching Example 1..................................................................................... 54
3.5.6 Bank-Switching Example 2..................................................................................... 54
4 Electrical Specifications...................................................................................................... 55
4.1 Absolute Maximum Ratings............................................................................................... 55
4.2 Dissipation Rating Table (High-k Board, 105°C Junction) ................................................. 55
4.3 Dynamic Performance at Recommended Operating Conditions at 25°C................................ 55
4.4 Recommended Operating Conditions ........................................................................ 55
4.5 Electrical Characteristics ....................................................................................... 56
4.6 PWM Operation.................................................................................................. 56
4.7 Switching Characteristics....................................................................................... 56
4.7.1 Clock Signals..................................................................................................... 56
4.7.2 Serial Audio Port................................................................................................. 57
4.7.3 TAS5508B Pin-Related Characteristics of the SDA and SCL I/O Stages for F/S-Mode I2C-Bus
Devices ........................................................................................................... 57
4.7.4 TAS5508B Bus-Related Characteristics of the SDA and SCL I/O Stages for F/S-Mode I2C-Bus
Devices ........................................................................................................... 58
4.7.5 Reset Timing (RESET) ......................................................................................... 60
4.7.6 Power-Down (PDN) Timing .................................................................................... 60
4.7.7 Back-End Error (BKND_ERR) ................................................................................. 61
4.7.8 Mute Timing (MUTE)............................................................................................ 61
4.7.9 Headphone Select (HP_SEL).................................................................................. 62
4.7.10 Volume Control .................................................................................................. 62
4.8 Serial Audio Interface Control and Timing ................................................................... 63
4.8.1 I 2S Timing ........................................................................................................ 63
4.8.2 Left-Justified Timing............................................................................................. 64
4.8.3 Right-Justified Timing ........................................................................................... 65
5 I2C Serial-Control Interface (Slave Addresses 0x36 and 0x37).................................................. 66
5.1 General I2C Operation ..................................................................................................... 66
5.2 Single- and Multiple-Byte Transfers ..................................................................................... 67
5.3 Single-Byte Write ........................................................................................................... 67
5.4 Multiple-Byte Write ......................................................................................................... 68
5.5 Incremental Multiple-Byte Write .......................................................................................... 68
5.6 Single-Byte Read........................................................................................................... 69
5.7 Multiple-Byte Read ......................................................................................................... 69
6 Serial-Control I2C Register Summary .................................................................................... 70
7 Serial-Control Interface Register Definitions .......................................................................... 74
7.1 Clock Control Register (0x00) ............................................................................................ 74
7.2 General Status Register 0 (0x01) ........................................................................................ 74
7.3 System Control Register 1 (0x03)........................................................................................ 74
7.4 System Control Register 2 (0x04)........................................................................................ 75
7.5 Channel Configuration Control Registers (0x05–0x0C) ............................................................... 75
7.6 Headphone Configuration Control Register (0x0D).................................................................... 76
7.7 Serial Data Interface Control Register (0x0E) .......................................................................... 76
4 Contents
Page 4
Part Number TAS5508B
Manufactur Texas Instruments
Description 8 Channel Digital Audio PWM Processor
Total Page 30 Pages
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