32-BIT SINGLE CHIP BASEBAND CONTROLLER
FOR GPS AND TELEMATIC APPLICATIONS
Figure 1. Packages
■ ARM7TDMI 16/32 bit RISC CPU based host
■ Complete Embedded Memory System:
– FLASH 256K bytes + 16K bytes (100K eras-
– RAM 64K bytes.
■ External memory interface provides glueless
support for up to four banks of external SRAM,
Table 1. Order Codes
■ 12 channel GPS correlation DSP: – no TCXO
– RTCA-SC159 / WAAS / EGNOS support
■ GPS performance
– accuracy: stand alone <30m; differential
<1m; surveying <1cm
– time to first fix: autonomous start 90s; cold
start 45s; warm start 7s; obscuration 1s.
■ 16-bit Watchdog Timer with 8 bits prescaler for
system reliability and integrity.
■ CAN module compliant with the CAN
specification V2.0 part B (active). The bit rate
can be programmed up to 1 MBaud.
■ Four16-bit programmable Timers with 7 bit
CMOS M8T (0.18 um) technology.
-40°C to 85°C operating temperature
DataSheet4U.pcroemscaler, up to two
compare, one pulse
counter function, one
■ 144-pin TQFP144 package or 64-pin TQFP64
channel with selectable frequency each.
■ 4 channels 12-bit sigma-delta Analog to Digital
■ Power Supply:
Converter, single channel or multi channel
– 2.7V to 3.6V operating supply range for Input/
conversion modes, single-shotor continuous
conversion modes, sample rate1KHz (4 KHz
– 3 V to 3.6V operating supply range for A/ D
when single channel), conversion range 0-2.5V.
■ Three Serial Communication Interfaces (UART)
– 1.8V operating supply range for core supply
allow full duplex, asynchronous,
provided either by internal Voltage Regulator
communications with external devices,
with external stabilization capacitor, or by ex-
independently programmable TX and RX baud
ternal supply for higher power efficiency.
rates up to 625K baud.
■ 0-66MHz internal clock frequency managed by
a Reset and Clock Control Unit; the unitisable to
provide low power modes (WAIT, SLOW,
STOP, STANDBY) and to generate the internal
clock from the external reference through
■ 48 programmable General Purpose I/O, each
pin programmable independently as digital input
or digital output; 40 (30 in TQFP64) are
multiplexed with peripheral functions; 16 can
generate an interrupt on input level/transition.
■ Real time clock module with 3 2 KHz low power
oscillator and separate power supply to
continue running during stand-by mode.
■ One UART adapted to suit Smart Card interface
needs, for asynchronous SC as defined by ISO
7816-3; it includes SC clock generation.
■ Two Serial Peripheral Interfaces (SPI) allow full
duplex, synchronous communications with
external devices, master or slave operation,
max baud rate: 8Mb/s. One SPI may be used as
Multimedia Card interface.
■ Two I2C Interfaces provide multi-master and
slave functions, support normal and fast I2C
mode (400KHz), 7/10 bit addressing modes.
One I2C Interface is multiplexed with one SPI,
so either 2xSPI+1xI2C or 1xSPI+2xI2C may be
This is preliminary information on a new product now in development. Details are subject to change without notice.
STA2051 - VESPUCCI
used at a time.
■ USB unit V1.1 compliant, software configurable end point setting, USB Suspend/Resume support.
■ High Level Data Link Controller (HDLC) unit supports full duplex operating mode, NRZ, NRZI, FM0 and
MANCHESTER modes, internal 8bit Baud Rate Generator.
Figure 2. System Block Diagram
Figure 3. TQFP144 Pins Connection Diagram (Top view)
STA2051 - VESPUCCI
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