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P9NK50Z Datasheet

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STP9NK50Z - STP9NK50ZFP
STB9NK50Z - STB9NK50Z-1
N-CHANNEL 500V - 0.72- 7.2A TO-220/FP/D2PAK/I2PAK
Zener-Protected SuperMESH™ MOSFET
TYPE
VDSS RDS(on)
ID
Pw
STP9NK50Z
STP9NK50ZFP
STB9NK50Z
STB9NK50Z-1
500 V
500 V
500 V
500 V
< 0.85
< 0.85
< 0.85
< 0.85
7.2 A
7.2 A
7.2 A
7.2 A
110 W
30 W
110 W
110 W
s TYPICAL RDS(on) = 0.72
s EXTREMELY HIGH dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s GATE CHARGE MINIMIZED
s VERY LOW INTRINSIC CAPACITANCES
s VERY GOOD MANUFACTURING
REPEATIBILITY
DESCRIPTION
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established strip-
based PowerMESH™ layout. In addition to pushing
on-resistance significantly down, special care is tak-
en to ensure a very good dv/dt capability for the
most demanding applications. Such series comple-
ments ST full range of high voltage MOSFETs in-
cluding revolutionary MDmesh™ products.
TO-220
3
2
1
TO-220FP
3
1
D2PAK
123
I2PAK
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s IDEAL FOR OFF-LINE POWER SUPPLIES,
ADAPTORS AND PFC
s LIGHTING
ORDERING INFORMATION
SALES TYPE
MARKING
STP9NK50Z
P9NK50Z
STP9NK50ZFP
P9NK50ZFP
STB9NK50ZT4
B9NK50Z
STB9NK50Z-1
B9NK50Z
June 2004
PACKAGE
TO-220
TO-220FP
D2PAK
I2PAK
PACKAGING
TUBE
TUBE
TAPE & REEL
TUBE
1/13
Datasheet pdf - http://www.DataSheet4U.net/
Page 1

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STP9NK50Z - STP9NK50ZFP - STB9NK50Z - STB9NK50Z-1
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS Drain-source Voltage (VGS = 0)
VDGR
Drain-gate Voltage (RGS = 20 k)
VGS Gate- source Voltage
ID Drain Current (continuous) at TC = 25°C
ID Drain Current (continuous) at TC = 100°C
IDM ( ) Drain Current (pulsed)
PTOT
Total Dissipation at TC = 25°C
Derating Factor
VESD(G-S) Gate source ESD(HBM-C=100pF, R=1.5KΩ)
dv/dt (1) Peak Diode Recovery voltage slope
VISO
Insulation Withstand Voltage (DC)
Tj Operating Junction Temperature
Tstg Storage Temperature
( ) Pulse width limited by safe operating area
(1) ISD 7.2A, di/dt 200A/µs, VDD V(BR)DSS, Tj TJMAX.
(*) Limited only by maximum temperature allowed
THERMAL DATA
Rthj-case
Rthj-amb
Tl
Thermal Resistance Junction-case Max
Thermal Resistance Junction-ambient Max
Maximum Lead Temperature For Soldering Purpose
Value
STP9NK50Z
STB9NK50Z
STB9NK50Z-1
STP9NK50ZFP
500
500
± 30
7.2 7.2 (*)
4.5 4.5 (*)
28.8
28.8 (*)
110 30
0.88
0.24
3500
4.5
- 2500
-55 to 150
-55 to 150
TO-220 / D2PAK /
I2PAK
1.14
62.5
300
TO-220FP
4.2
AVALANCHE CHARACTERISTICS
Symbol
Parameter
IAR Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
EAS Single Pulse Avalanche Energy
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
Max Value
7.2
190
Unit
V
V
V
A
A
A
W
W/°C
V
V/ns
V
°C
°C
°C/W
°C/W
°C
Unit
A
mJ
GATE-SOURCE ZENER DIODE
Symbol
Parameter
BVGSO
Gate-Source Breakdown
Voltage
Test Conditions
Igs=± 1mA (Open Drain)
Min.
30
Typ.
Max.
Unit
V
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the devices
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to souce. In this respect the Zener voltage is appropriate to achieve an efficient and cost-
effective intervention to protect the devices integrity. These integrated Zener diodes thus avoid the usage
of external components.
2/13
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Page 2

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STP9NK50Z - STP9NK50ZFP - STB9NK50Z - STB9NK50Z-1
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
ON/OFF
Symbol
Parameter
Test Conditions
Min. Typ. Max.
V(BR)DSS Drain-source
Breakdown Voltage
ID = 1 mA, VGS = 0
500
IDSS
Zero Gate Voltage
Drain Current (VGS = 0)
VDS = Max Rating
VDS = Max Rating, TC = 125 °C
1
50
IGSS
Gate-body Leakage
Current (VDS = 0)
VGS = ± 20V
±10
VGS(th) Gate Threshold Voltage
VDS = VGS, ID = 100µA
3 3.75 4.5
RDS(on)
Static Drain-source On
Resistance
VGS = 10V, ID = 3.6 A
0.72 0.85
DYNAMIC
Symbol
Parameter
gfs (1) Forward Transconductance
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
Coss eq. (3) Equivalent Output
Capacitance
SWITCHING ON
Symbol
Parameter
td(on)
tr
Turn-on Delay Time
Rise Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
Test Conditions
VDS = 15 V, ID = 3.6 A
VDS = 25V, f = 1 MHz, VGS = 0
Min.
VGS = 0V, VDS = 0V to 400V
Test Conditions
VDD = 250 V, ID = 3.6 A
RG = 4.7VGS = 10 V
(Resistive Load see, Figure 3)
VDD = 400V, ID = 7.2 A,
VGS = 10V
Min.
Typ.
5.3
910
125
30
75
Typ.
17
20
32
6
18
Max.
Max.
SWITCHING OFF
Symbol
Parameter
td(off)
tf
Turn-off Delay Time
Fall Time
tr(Voff)
tf
tc
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Conditions
VDD = 250 V, ID = 3.6 A
RG = 4.7VGS = 10 V
(Resistive Load see, Figure 3)
VDD = 400V, ID = 7.2 A,
RG = 4.7Ω, VGS = 10V
(Inductive Load see, Figure 5)
Min.
Typ.
45
22
15
13
30
Max.
Unit
V
µA
µA
µA
V
Unit
S
pF
pF
pF
pF
Unit
ns
ns
nC
nC
nC
Unit
ns
ns
ns
ns
ns
SOURCE DRAIN DIODE
Symbol
Parameter
Test Conditions
Min. Typ. Max. Unit
ISD
ISDM (2)
Source-drain Current
Source-drain Current (pulsed)
7.2
28.8
A
A
VSD (1) Forward On Voltage
ISD = 7.2 A, VGS = 0
1.6 V
trr
Qrr
IRRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 7.2 A, di/dt = 100A/µs
VDD = 40 V, Tj = 150°C
(see test circuit, Figure 5)
238 ns
1.5 µC
12.6 A
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80%
VDSS.
3/13
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Page 3

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STP9NK50Z - STP9NK50ZFP - STB9NK50Z - STB9NK50Z-1
Safe Operating Area For TO-220/D2PAK/I2PAK Thermal Impedance For TO-220/D2PAK/I2PAK
Safe Operating Area For TO-220FP
Thermal Impedance For TO-220FP
Output Characteristics
Transfer Characteristics
4/13
Datasheet pdf - http://www.DataSheet4U.net/
Page 4
Part Number P9NK50Z
Manufactur STMicroelectronics
Description Search -----> STP9NK50Z
Total Page 13 Pages
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