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Aptina Imaging Corporation
Aptina Imaging Corporation

MT9M114 Datasheet

1/6-Inch 720P High-Definition (HD) System-On-A-Chip (SOC) Digital Image Sensor Die


MT9M114 Datasheet Preview


Aptina Confidential and Proprietary
Advance
MT9M114 1/6-Inch 720P High-Definition (HD) System-On-A-Chip (SOC) Digital
Image Sensor Die
www.DataSheet4U.com
1/6-Inch 720P High-Definition (HD)
System-On-A-Chip (SOC) Digital Image Sensor Die
MT9M114 Die Data Sheet
For the product data sheet, refer to Aptina’s Web site: www.aptina.com
Features
• DigitalClarity® CMOS Imaging technology
• System-on-a-chip (SOC)—Completely integrated
camera system
• Ultra low-power, low-cost CMOS image sensor
• Superior low-light performance
• Electronic rolling shutter (ERS)
• Up to 30 fps progressive scan for high-quality video
at 720p resolution
• On-die image flow processor (IFP) performs
sophisticated processing: color recovery and
correction, sharpening, gamma, lens shading
correction, on-the-fly defect correction, zoom
• Image decimation to arbitrary size with smooth,
continuous zoom and pan
• Automatic exposure, white balance and black
compensation, color saturation, and defect
identification and correction, aperture correction
• Two-wire serial programming interface
• Progressive ITU-R BT.656 (YCbCr), YUV, 565RGB,
555RGB, or 444RGB output data formats
• Adaptive Polynomial lens shading correction
• UVC interface
• Perspective correction
• Multi-camera sync
General Physical Specifications
• Die thickness: 200 µm ±12 µm
(Consult factory for other die thickness)
• Back side die surface of polished bare silicon
• Typical metal 1 thickness: 3.1 kÅ
• Typical metal 2 thickness: 3.1 kÅ
• Typical metal 3 thickness: 3.1 kÅ
• Typical metal 4 thickness: 4.15 kÅ
• Metallization composition: 99.5 percent Al and 0.5
percent Cu over Ti
• Typical topside passivation:
2.2 kÅ nitride over 5.0 kÅ of undoped oxide
• Passivation openings (MIN): 75 µm x 90 µm
Die Database
• Die outline, see Figure 2 on page 9
• Singulated die size (nominal dimension):
3858 µm ±25 µm x 4658 µm ±25 µm
• “Bond Pad Location and Identification Tables”, see
page 5–8
Order Information
Die: MT9M114D00STCK24BC1
Note: Consult die distributor or factory before order-
ing to verify long-term availability of these
die products.
Options
• Form
Die
• Testing
Standard (level 1) probe
D
C1
Product#
Form Temp Chrom
Die
database
Testing
level
MT9M114D00STCK224BC1
Key Performance Parameters
• Optical format: 1/6-inch (4:3)
• Active imager size: 2.45 mm(H) x 1.84 mm(V),
3.06 mm diagonal
• Active pixels: 1296 H x 976 V (1.2Mp)
• Pixel size:1.9 µm x 1.9 µm
• Color filter array: RGB Bayer pattern
• Shutter type: electronic rolling shutter (ERS)
• Maximum data rate/master clock: 48 MPS/96 MHz
• Frame rate: 720p (1280 H x 720 V) 30 fps at 96 MHz
(default), assuming a 24Mhz EXTCLK
• ADC resolution: 10-bit, on die
• Responsivity: 0.95V/lux-sec (550 nm)
• Pixel dynamic range: 70 dB
• SNR MAX: 40 dB
• Supply voltage:
- I/O digital: 1.8 V or 2.8 V
- Core digital: 1.8 V
- Analog: 2.8 V
PLL voltage:2.8V
MIPI voltage:1.8V
• Typical power consumption: 150.7 mW
• Operating temperature: –30°C to +70°C
• Chief ray angle (CRA): 25.18°
PDF: 0834020843/Source:7792798679
MT9M114 DDS - Rev. A 9/09 EN
1 Aptina reserves the right to change products or specifications without notice.
©2009 Aptina Imaging Corporation All rights reserved.
‡Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by Aptina without
notice. Products are only warranted by Aptina to meet Aptina’s production data sheet specifications.
Page 1

Aptina Confidential and Proprietary
Advance
MT9M114 1/6-Inch 720P High-Definition (HD) System-On-A-Chip (SOC) Digital
Image Sensor Die
General Description
www.DataSheet4U.com
The Aptina MT9M114 die is a 1.2Mp-format 1/6-inch CMOS active-pixel digital image
sensor using Aptina’s latest digital image flow processor (IFP) technology. The MT9M114
has an active imaging pixel array of 1296 x 976, capturing high-quality color images at
1.2Mp resolution. The sensor is a complete camera system-on-a-chip solution and is
designed specifically to meet the demands of products in PC and Notebook camera
applications. It incorporates multiple sophisticated on-die camera functions and is
programmable through a simple two-wire serial interface.
This SOC (system-on-a-chip) 1.2Mp CMOS image sensor die features
DigitalClarity®—Aptina’s breakthrough, low-noise CMOS imaging technology that
achieves near- CCD image quality (based on signal-to-noise ratio and low-light sensi-
tivity) while maintaining the inherent size, cost, and integration advantages of CMOS.
The MT9M114 die is a fully-automatic, single-chip camera, requiring only a power
supply, lens and clock source for basic operation. Output video is streamed through a
parallel 8-bit DOUT OR MIPI port as shown in Figure 1 on page 3. Output pixel clock is
used to latch the data, while FRAME_VALID and LINE_VALID signals indicate the active
video. Output pads can also be tri-stated by de-asserting the OE_BAR signal. The
MT9M114 die internal registers can be configured using a two-wire serial interface.
Die Testing Procedures
Aptina imager die products are tested with a standard probe (C1) test. Wafer probe is
performed at an elevated temperature to test product functionality in Aptina’s standard
package. Because the package environment is not within Aptina’s control, the user must
determine the necessary heat sink requirements to ensure that the die junction temper-
ature remains within specified limits.
Image quality is verified through various imaging tests. The probe functional test flow
provides test coverage for the on-die A/D converter, logic, serial interface bus, and pixel
array. Test conditions, margins, limits, and test sequence are determined by individual
product yields and reliability data.
Aptina retains a wafer map of each wafer as part of the probe records, along with a lot
summary of wafer yields for each lot probed. Aptina reserves the right to change the
probe program at any time to improve the reliability, packaged device yield, or perfor-
mance of the product.
Die users may experience differences in performance relative to Aptina’s data sheets.
This is due to differences in package capacitance, inductance, resistance, and trace
length.
Functional Specifications
The specifications provided in this document are for reference only. For target functional
and parametric specifications, refer to the product data sheet found on Aptina’s Web
site.
PDF: 0834020843/Source:7792798679
MT9M114 DDS - Rev. A 9/09 EN
2 Aptina reserves the right to change products or specifications without notice.
©2009 Aptina Imaging Corporation. All rights reserved.
Page 2

Aptina Confidential and Proprietary
Advance
MT9M114 1/6-Inch 720P High-Definition (HD) System-On-A-Chip (SOC) Digital
Image Sensor Die
Bonding Instructions
www.DataSheet4U.com
The MT9M114 Imager die has 55 bond pads. Refer to Table 1 on page 5 and Table 2 on
page 7 for a complete list of bond pads and coordinates.
The MT9M114 Imager die does not require the user to determine bond option features.
The MT9M114 Imager die also has several pads defined as “do not use.” These pads are
reserved for engineering purposes and should not be used. Bonding these pads could
result in a nonfunctional die.
Figure 1 on page 3 shows the MT9M114 typical die connections. For low-noise opera-
tion, the MT9M114 die requires separate supplies for analog and digital power.
Storage Requirements
Aptina die products are packaged for shipping in a cleanroom environment. Upon
receipt, the customer should transfer the die to a similar environment for storage. Aptina
recommends the die be maintained in a filtered nitrogen atmosphere until removed for
assembly. The moisture content of the storage facility should be maintained at 30
percent relative humidity ±10 percent. ESD damage precautions are necessary during
handling. The die must be in an ESD-protected environment at all times for inspection
and assembly.
Figure 1: Typical Configuration (Connection)
I/O5
power
PHY2
power
Digital
PLL core Analog
power power power
RPULL-UP5
Two-wire
serial interface
Active LOW reset
External clock in
(6–54 MHz)
VDD_IO VDD_PHY VDD_PLL VDD VAA
SADDR
SDATA
SCLK
RESET_BAR6
EXTCLK
TRST_BAR8
OE_BAR
DGND
DOUT[7:0]
PIXCLK
LINE_VALID
FRAME_VALID
DATA_N
DATA_P
CLK_N
CLK_P
GND_PLL AGND
Parallel
Port
OR4
MIPI
Serial
Port
VDD_IO5, 7
VDD_PHY2, 7
VDD_PLL7
VDD7
VAA7
Notes:
1. This typical configuration shows only one scenario out of multiple possible variations for this sensor.
2. If a MIPI Interface is not required, the following signals must be left floating: DATA_P, DATA_N, CLK_P,
and CLK_N. The VDD_PHY power signal must always be connected to the 1.8V supply.
3. Only one of the output modes (serial or parallel) can be used at any time.
PDF: 0834020843/Source:7792798679
MT9M114 DDS - Rev. A 9/09 EN
3 Aptina reserves the right to change products or specifications without notice.
©2009 Aptina Imaging Corporation. All rights reserved.
Page 3
Part Number MT9M114
Manufactur Aptina Imaging Corporation
Description 1/6-Inch 720P High-Definition (HD) System-On-A-Chip (SOC) Digital Image Sensor Die
Total Page 11 Pages
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