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Microchip Technology
Microchip Technology

MCP42010 Datasheet

Single/Dual Digital Potentiometer with SPI Interface


MCP42010 Datasheet Preview


M
MCP41XXX/42XXX
Single/Dual Digital Potentiometer with SPIInterface
Features
• 256 taps for each potentiometer
• Potentiometer values for 10 k, 50 kand
100 k
• Single and dual versions
• SPI™ serial interface (mode 0,0 and 1,1)
• ±1 LSB max INL & DNL
• Low power CMOS technology
• 1 µA maximum supply current in static operation
• Multiple devices can be daisy-chained together
(MCP42XXX only)
• Shutdown feature open circuits of all resistors for
maximum power savings
• Hardware shutdown pin available on MCP42XXX
only
• Single supply operation (2.7V - 5.5V)
• Industrial temperature range: -40°C to +85°C
• Extended temperature range: -40°C to +125°C
Block Diagram
VDD
VSS
Control
Logic
RS SHDN
Wiper
Register
PB0
Resistor
Array 0
PA0
PW0
CS
SI
SCK
16-Bit
Shift
Register
Wiper Resistor
Register Array 1*
S0
PB1
PA1
PW1
*Potentiometer P1 is only available on the dual
MCP42XXX version.
Description
The MCP41XXX and MCP42XXX devices are 256-
position, digital potentiometers available in 10 k,
50 kand 100 kresistance versions. The
MCP41XXX is a single-channel device and is offered in
an 8-pin PDIP or SOIC package. The MCP42XXX con-
tains two independent channels in a 14-pin PDIP, SOIC
or TSSOP package. The wiper position of the
MCP41XXX/42XXX varies linearly and is controlled via
an industry-standard SPI interface. The devices con-
sume <1 µA during static operation. A software shut-
down feature is provided that disconnects the “A”
terminal from the resistor stack and simultaneously con-
nects the wiper to the “B” terminal. In addition, the dual
MCP42XXX has a SHDN pin that performs the same
function in hardware. During shutdown mode, the con-
tents of the wiper register can be changed and the
potentiometer returns from shutdown to the new value.
The wiper is reset to the mid-scale position (80h) upon
power-up. The RS (reset) pin implements a hardware
reset and also returns the wiper to mid-scale. The
MCP42XXX SPI interface includes both the SI and SO
pins, allowing daisy-chaining of multiple devices. Chan-
nel-to-channel resistance matching on the MCP42XXX
varies by less than 1%. These devices operate from a
single 2.7 - 5.5V supply and are specified over the
extended and industrial temperature ranges.
Package Types
PDIP/SOIC
CS
SCK
SI
VSS
1
2
3
4
8 VDD
7 PB0
6 PW0
5 PA0
PDIP/SOIC/TSSOP
CS
SCK
SI
VSS
PB1
PW1
PA1
1
2
3
4
5
6
7
14 VDD
13 SO
12 SHDN
11 RS
10 PB0
9 PW0
8 PA0
2003 Microchip Technology Inc.
DS11195C-page 1
Page 1

MCP41XXX/42XXX
1.0 ELECTRICAL CHARACTERISTICS
DC CHARACTERISTICS: 10 kVERSION
Electrical Characteristics: Unless otherwise indicated, VDD = +2.7V to 5.5V, TA = -40°C to +85°C (TSSOP devices are only specified at +25°C and
+85°C). Typical specifications represent values for VDD = 5V, VSS = 0V, VB = 0V, TA = +25°C.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Rheostat Mode
Nominal Resistance
R 8 10
Rheostat Differential Non Linearity
R-DNL -1 ±1/4
Rheostat Integral Non Linearity
R-INL -1 ±1/4
Rheostat Tempco
Wiper Resistance
Wiper Current
Nominal Resistance Match
RAB/T
RW
RW
IW
R/R
-1
800
52
73
0.2
Potentiometer Divider
Resolution
N 8—
Monotonicity
N 8—
Differential Non-Linearity
DNL
-1 ±1/4
Integral Non-Linearity
INL -1 ±1/4
Voltage Divider Tempco
Full Scale Error
Zero Scale Error
Resistor Terminals
VW/T
VWFSE
VWFSE
VWZSE
VWZSE
-2
-2
0
0
1
-0.7
-0.7
+0.7
+0.7
Voltage Range
VA,B,W
0
Capacitance (CA or CB)
— 15
Capacitance
CW — 5.6
Dynamic Characteristics (All dynamic characteristics use VDD = 5V)
Bandwidth -3dB
BW — 1
12 k
+1 LSB
+1 LSB
— ppm/°C
100
125
+1 mA
1%
— Bits
— Bits
+1 LSB
+1 LSB
— ppm/°C
0 LSB
0 LSB
+2 LSB
+2 LSB
VDD
— pF
— pF
— MHz
Settling Time
tS — 2 — µS
Resistor Noise Voltage
eNWB
9
— nV/Hz
Crosstalk
CT — -95 — dB
Digital Inputs/Outputs (CS, SCK, SI, SO) See Figure 2-12 for RS and SHDN pin operation
TA = +25°C (Note 1)
Note 2
Note 2
VDD = 5.5V, IW = 1 mA, code 00h
VDD = 2.7V, IW = 1 mA, code 00h
MCP42010 only, P0 to P1; TA = +25°C
Note 3
Note 3
Code 80h
Code FFh, VDD = 5V, see Figure 2-25
Code FFh, VDD = 3V, see Figure 2-25
Code 00h, VDD = 5V, see Figure 2-25
Code 00h, VDD = 3V, see Figure 2-25
Note 4
f = 1 MHz, Code = 80h, see Figure 2-30
f = 1 MHz, Code = 80h, see Figure 2-30
VB = 0V, Measured at Code 80h,
Output Load = 30 PF
VA = VDD,VB = 0V, ±1% Error Band, Transition
from Code 00h to Code 80h, Output Load = 30 pF
VA = Open, Code 80h, f =1 kHz
VA = VDD, VB = 0V (Note 5)
Schmitt Trigger High-Level Input Voltage
Schmitt Trigger Low-Level Input Voltage
Hysteresis of Schmitt Trigger Inputs
Low-Level Output Voltage
High-Level Output Voltage
Input Leakage Current
Pin Capacitance (All inputs/outputs)
Power Requirements
VIH
VIL
VHYS
VOL
VOH
ILI
CIN, COUT
0.7VDD
VDD - 0.5
-1
0.05VDD
10
0.3VDD
0.40
+1
V
V
V IOL = 2.1 mA, VDD = 5V
V IOH = -400 µA, VDD = 5V
µA CS = VDD, VIN = VSS or VDD, includes VA SHDN=0
pF VDD = 5.0V, TA = +25°C, fc = 1 MHz
Operating Voltage Range
Supply Current, Active
VDD
IDDA
2.7 — 5.5 V
— 340 500 µA VDD = 5.5V, CS = VSS, fSCK = 10 MHz,
SO = Open, Code FFh (Note 6)
Supply Current, Static
IDDS
— 0.01
1
µA CS, SHDN, RS = VDD = 5.5V, SO = Open (Note 6)
Power Supply Sensitivity
PSS
— 0.0015 0.0035 %/% VDD = 4.5V - 5.5V, VA = 4.5V, Code 80h
PSS
— 0.0015 0.0035 %/% VDD = 2.7V - 3.3V, VA = 2.7V, Code 80h
Note 1:
2:
3:
4:
5:
6:
VAB = VDD, no connection on wiper.
Rheostat position non-linearity R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum
resistance wiper positions. R-DNL measures the relative step change from the ideal between successive tap positions. IW = 50 µA for
VDD = 3V and IW = 400 µA for VDD = 5V for 10 kversion. See Figure 2-26 for test circuit.
INL and DNL are measured at VW with the device configured in the voltage divider or potentiometer mode. VA = VDD and VB = 0V. DNL
specification limits of ±1 LSB max are specified monotonic operating conditions. See Figure 2-25 for test circuit.
Resistor terminals A,B and W have no restrictions on polarity with respect to each other. Full-scale and zero-scale error were measured
using Figure 2-25.
Measured at VW pin where the voltage on the adjacent VW pin is swinging full-scale.
Supply current is independent of current through the potentiometers.
DS11195C-page 2
2003 Microchip Technology Inc.
Page 2

MCP41XXX/42XXX
DC CHARACTERISTICS: 50 kVERSION
Electrical Characteristics: Unless otherwise indicated, VDD = +2.7V to 5.5V, TA = -40°C to +85°C (TSSOP devices are only specified at +25°C and
+85°C). Typical specifications represent values for VDD = 5V, VSS = 0V, VB = 0V, TA = +25°C.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Rheostat Mode
Nominal Resistance
Rheostat Differential Non-Linearity
R 35 50 65 kTA = +25°C (Note 1)
R-DNL -1 ±1/4 +1 LSB Note 2
Rheostat Integral Non-Linearity
R-INL
-1 ±1/4 +1 LSB Note 2
Rheostat Tempco
Wiper Resistance
Wiper Current
Nominal Resistance Match
Potentiometer Divider
RAB/T
RW
RW
IW
R/R
-1
800 — ppm/°C
125 175
VDD = 5.5V, IW = 1 mA, code 00h
175 250
VDD = 2.7V, IW = 1 mA, code 00h
— +1 mA
0.2 1 % MCP42050 only, P0 to P1;TA = +25°C
Resolution
N 8 — — Bits
Monotonicity
N 8 — — Bits
Differential Non-Linearity
DNL
-1 ±1/4 +1 LSB Note 3
Integral Non-Linearity
INL -1 ±1/4 +1 LSB Note 3
Voltage Divider Tempco
Full-Scale Error
Zero-Scale Error
Resistor Terminals
VW/T
1
— ppm/°C Code 80h
VWFSE -1 -0.25 0 LSB Code FFh, VDD = 5V, see Figure 2-25
VWFSE -1 -0.35 0 LSB Code FFh, VDD = 3V, see Figure 2-25
VWZSE
0
+0.25
+1
LSB Code 00h, VDD = 5V, see Figure 2-25
VWZSE
0
+0.35
+1
LSB Code 00h, VDD = 3V, see Figure 2-25
Voltage Range
VA,B,W
0
Capacitance (CA or CB)
— 11
Capacitance
CW — 5.6
Dynamic Characteristics (All dynamic characteristics use VDD = 5V)
Bandwidth -3dB
BW — 280
VDD Note 4
— pF f =1 MHz, Code = 80h, see Figure 2-30
— pF f =1 MHz, Code = 80h, see Figure 2-30
— MHz VB = 0V, Measured at Code 80h,
Output Load = 30 PF
Settling Time
tS — 8 — µS VA = VDD,VB = 0V, ±1% Error Band, Transition
from Code 00h to Code 80h, Output Load = 30 pF
Resistor Noise Voltage
eNWB
20
— nV/Hz
Crosstalk
CT — -95 — dB
Digital Inputs/Outputs (CS, SCK, SI, SO) See Figure 2-12 for RS and SHDN pin operation.
VA = Open, Code 80h, f =1 kHz
VA = VDD, VB = 0V (Note 5)
Schmitt Trigger High-Level Input Voltage
Schmitt Trigger Low-Level Input Voltage
Hysteresis of Schmitt Trigger Inputs
Low-Level Output Voltage
High-Level Output Voltage
Input Leakage Current
Pin Capacitance (All inputs/outputs)
Power Requirements
VIH
VIL
VHYS
VOL
VOH
ILI
CIN, COUT
0.7VDD
VDD - 0.5
-1
0.05VDD
10
0.3VDD
0.40
+1
V
V
V IOL = 2.1 mA, VDD = 5V
V IOH = -400 µA, VDD = 5V
µA CS = VDD, VIN = VSS or VDD, includes VA SHDN=0
pF VDD = 5.0V, TA = +25°C, fc = 1 MHz
Operating Voltage Range
Supply Current, Active
VDD
IDDA
2.7 — 5.5 V
— 340 500 µA VDD = 5.5V, CS = VSS, fSCK = 10 MHz,
SO = Open, Code FFh (Note 6)
Supply Current, Static
IDDS
— 0.01
1
µA CS, SHDN, RS = VDD = 5.5V, SO = Open (Note 6)
Power Supply Sensitivity
PSS
— 0.0015 0.0035 %/% VDD = 4.5V - 5.5V, VA = 4.5V, Code 80h
PSS
— 0.0015 0.0035 %/% VDD = 2.7V - 3.3V, VA = 2.7V, Code 80h
Note 1:
2:
3:
4:
5:
6:
VAB = VDD, no connection on wiper.
Rheostat position non-linearity R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum
resistance wiper positions. R-DNL measures the relative step change from the ideal between successive tap positions. IW = VDD/R for
+3V or +5V for 50 kversion. See Figure 2-26 for test circuit.
INL and DNL are measured at VW with the device configured in the voltage divider or potentiometer mode. VA = VDD and VB = 0V. DNL
specification limits of ±1 LSB max are specified monotonic operating conditions. See Figure 2-25 for test circuit.
Resistor terminals A,B and W have no restrictions on polarity with respect to each other. Full-scale and zero-scale error were measured
using Figure 2-25.
Measured at VW pin where the voltage on the adjacent VW pin is swinging full scale.
Supply current is independent of current through the potentiometers.
2003 Microchip Technology Inc.
DS11195C-page 3
Page 3

MCP41XXX/42XXX
DC CHARACTERISTICS: 100 kVERSION
Electrical Characteristics: Unless otherwise indicated, VDD = +2.7V to 5.5V, TA = -40°C to +85°C (TSSOP devices are only specified at +25°C and
+85°C). Typical specifications represent values for VDD = 5V, VSS = 0V, VB = 0V, TA = +25°C.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Rheostat Mode
Nominal Resistance
Rheostat Differential Non-Linearity
R 70 100 130 kTA = +25°C (Note 1)
R-DNL -1 ±1/4 +1 LSB Note 2
Rheostat Integral Non-Linearity
R-INL -1 ±1/4 +1 LSB Note 2
Rheostat Tempco
Wiper Resistance
Wiper Current
Nominal Resistance Match
Potentiometer Divider
RAB/T
RW
RW
IW
R/R
-1
800 — ppm/°C
125 175
VDD = 5.5V, IW = 1 mA, code 00h
175 250
VDD = 2.7V, IW = 1 mA, code 00h
— +1 mA
0.2 1 % MCP42010 only, P0 to P1;TA = +25°C
Resolution
N 8 — — Bits
Monotonicity
N 8 — — Bits
Differential Non-Linearity
DNL
-1 ±1/4 +1 LSB Note 3
Integral Non-Linearity
INL -1 ±1/4 +1 LSB Note 3
Voltage Divider Tempco
Full-Scale Error
Zero-Scale Error
Resistor Terminals
VW/T
1
— ppm/°C Code 80h
VWFSE -1 -0.25 0 LSB Code FFh, VDD = 5V, see Figure 2-25
VWFSE -1 -0.35 0 LSB Code FFh, VDD = 3V, see Figure 2-25
VWZSE
0
+0.25
+1
LSB Code 00h, VDD = 5V, see Figure 2-25
VWZSE
0
+0.35
+1
LSB Code 00h, VDD = 3V, see Figure 2-25
Voltage Range
Capacitance (CA or CB)
VA,B,W
0
— VDD
Note 4
11 — pF f =1 MHz, Code = 80h, see Figure 2-30
Capacitance
CW — 5.6
Dynamic Characteristics (All dynamic characteristics use VDD = 5V.)
Bandwidth -3dB
BW — 145
— pF f =1 MHz, Code = 80h, see Figure 2-30
— MHz VB = 0V, Measured at Code 80h,
Output Load = 30 PF
Settling Time
tS — 18 — µS VA = VDD,VB = 0V, ±1% Error Band, Transition
from Code 00h to Code 80h, Output Load = 30 pF
Resistor Noise Voltage
eNWB
29
— nV/Hz
Crosstalk
CT — -95 — dB
Digital Inputs/Outputs (CS, SCK, SI, SO) See Figure 2-12 for RS and SHDN pin operation.
VA = Open, Code 80h, f =1 kHz
VA = VDD, VB = 0V (Note 5)
Schmitt Trigger High-Level Input Voltage
Schmitt Trigger Low-Level Input Voltage
Hysteresis of Schmitt Trigger Inputs
Low-Level Output Voltage
High-Level Output Voltage
Input Leakage Current
Pin Capacitance (All inputs/outputs)
Power Requirements
VIH
VIL
VHYS
VOL
VOH
ILI
CIN, COUT
0.7VDD
VDD - 0.5
-1
0.05VDD
10
0.3VDD
0.40
+1
V
V
V IOL = 2.1 mA, VDD = 5V
V IOH = -400 µA, VDD = 5V
µA CS = VDD, VIN = VSS or VDD, includes VA SHDN=0
pF VDD = 5.0V, TA = +25°C, fc = 1 MHz
Operating Voltage Range
Supply Current, Active
VDD
IDDA
2.7 — 5.5 V
— 340 500 µA VDD = 5.5V, CS = VSS, fSCK = 10 MHz,
SO = Open, Code FFh (Note 6)
Supply Current, Static
IDDS
— 0.01
1
µA CS, SHDN, RS = VDD = 5.5V, SO = Open (Note 6)
Power Supply Sensitivity
PSS
— 0.0015 0.0035 %/% VDD = 4.5V - 5.5V, VA = 4.5V, Code 80h
PSS
— 0.0015 0.0035 %/% VDD = 2.7V - 3.3V, VA = 2.7V, Code 80h
Note 1:
2:
3:
4:
5:
6:
VAB = VDD, no connection on wiper.
Rheostat position non-linearity R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum
resistance wiper positions. R-DNL measures the relative step change from the ideal between successive tap positions. IW = 50 µA for
VDD = 3V and IW = 400 µA for VDD = 5V for 10 kversion. See Figure 2-26 for test circuit.
INL and DNL are measured at VW with the device configured in the voltage divider or potentiometer mode. VA = VDD and VB = 0V. DNL
specification limits of ±1 LSB max are specified monotonic operating conditions. See Figure 2-25 for test circuit.
Resistor terminals A,B and W have no restrictions on polarity with respect to each other. Full-scale and zero-scale error were measured
using Figure 2-25.
Measured at VW pin where the voltage on the adjacent VW pin is swinging full-scale.
Supply current is independent of current through the potentiometers.
DS11195C-page 4
2003 Microchip Technology Inc.
Page 4
Part Number MCP42010
Manufactur Microchip Technology
Description Single/Dual Digital Potentiometer with SPI Interface
Total Page 33 Pages
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