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National Semiconductor
National Semiconductor

LM20333A Datasheet

3A Synchronous Buck Regulator


LM20333A Datasheet Preview


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January 20, 2009
LM20333A
36V, 3A Synchronous Buck Regulator with Frequency
Synchronization
General Description
The LM20333A is a full featured synchronous buck regulator
capable of delivering up to 3A of load current. The current
mode control loop is externally compensated with only two
components, offering both high performance and ease of use.
The device is optimized to work over the input voltage range
of 4.5V to 36V making it well suited for high voltage systems.
The device features internal Over Voltage Protection (OVP)
and Over Current Protection (OCP) circuits for increased sys-
tem reliability. A precision Enable pin and integrated UVLO
allows the turn on of the device to be tightly controlled and
sequenced. Startup inrush currents are limited by both an in-
ternally fixed and externally adjustable soft-start circuit. Fault
detection and supply sequencing are possible with the inte-
grated power good (PGOOD) circuit.
The LM20333A is designed to work well in multi-rail power
supply architectures. The output voltage of the device can be
configured to track a higher voltage rail using the SS/TRK pin.
If the output of the LM20333A is pre-biased at startup it will
not sink current to pull the output low until the internal soft-
start ramp exceeds the voltage at the feedback pin.
The switching frequency of the LM20333A can be synchro-
nized to an external clock by use of the SYNC pin. The SYNC
pin is capable of synchronizing to input signals ranging from
250 kHz to 1.5 MHz.
The LM20333A is offered in an exposed pad 20-pin eTSSOP
package that can be soldered to the PCB, eliminating the
need for bulky heatsinks.
Features
4.5V to 36V input voltage range
3A output current, 5.2A peak current
130 m/110 mintegrated power MOSFETs
94% peak efficiency with synchronous rectification
1.0% feedback voltage accuracy
Current mode control, selectable compensation
Oscillator synchronization from 250kHz to 1.5MHz
Adjustable output voltage down to 0.8V
Compatible with pre-biased loads
Programmable soft-start with external capacitor
Precision enable pin with hysteresis
OVP, UVLO inputs and PGOOD output
Internally protected with peak current limit, thermal
shutdown and restart
Accurate current limit minimizes inductor size
Non-linear current mode slope compensation
eTSSOP-20 exposed pad package
Applications
Simple to design, high efficiency point of load regulation
from a 4.5V to 36V bus
High Performance DSPs, FPGAs, ASICs and
Microprocessors
Communications Infrastructure, Automotive
Simplified Application Circuit
PowerWise® is a registered trademark of National Semiconductor Corporation.
© 2009 National Semiconductor Corporation 300774
30077401
www.national.com
Page 1

www.DataShCeeot4Un.cnomection Diagram
Ordering Information
Order Number
LM20333AMH
LM20333AMHE
LM20333AMHX
Package Type
eTSSOP-20
Top View
eTSSOP-20 Package
30077402
NSC Package Drawing
MXA20A
Package Marking
20333AMH
Supplied As
73 Units per Rail
250 Units per Tape and Reel
2500 Units per Tape and Reel
Pin Descriptions
Pin(s)
1
2
3
4
5,6,15,16
7,8,13,14
9,10,11
12
17
18
19
Name
SS/TRK
FB
PGOOD
COMP
VIN
SW
GND
AGND
BOOT
VCC
EN
Description
Application Information
Soft-Start or Tracking control input
An internal 4.5 µA current source charges an external capacitor to set
the soft-start rate. The PWM can track to an external voltage ramp with
a low impedance source. If left open, an internal 1 ms SS ramp is
activated.
Feedback input to the error amplifier
from the regulated output
This pin is connected to the inverting input of the internal
transconductance error amplifier. An 800 mV reference is internally
connected to the non-inverting input of the error amplifier.
Power good output signal
Open drain output indicating the output voltage is regulating within
tolerance. A pull-up resistor of 10 kto 100 kis recommended if this
function is used.
Output of the internal error amplifier and The loop compensation network should be connected between the
input to the Pulse Width Modulator
COMP pin and the AGND pin.
Input supply voltage
Nominal operating range: 4.5V to 36V.
Switch pin
The drain terminal of the internal Synchronous Rectifier power
NMOSFET and the source terminal of the internal Control power
NMOSFET.
Ground
Internal reference for the power MOSFETs.
Analog ground
Internal reference for the regulator control functions.
Boost input for bootstrap capacitor
An internal diode from VCC to BOOT charges an external capacitor
required from SW to BOOT to power the Control MOSFET gate driver.
Output of the high voltage linear
VCC tracks VIN up to about 7.2V. Above VIN = 7.2V, VCC is regulated
regulator. The VCC voltage is regulated to approximately 5.5 Volts. A 0.1 µF to 1 µF ceramic decoupling
to approximately 5.5V.
capacitor is required. The VCC pin is an output only.
Enable or UVLO input
An external voltage divider can be used to set the line undervoltage
lockout threshold. If the EN pin is left unconnected, a 2 µA pull-up
current source pulls the EN pin high to enable the regulator.
www.national.com
2
Page 2

Pin(s) Name Description
www2.0DataSheSeYt4NUC.comFrequency synchronization input
EP Exposed Exposed pad
Pad
Application Information
An external clock connected to this pin will set the switching frequency.
If left open or grounded, the device will operate at approximately 200
kHz.
Exposed metal pad on the underside of the package with a weak
electrical connection to GND. Connect this pad to the PC board ground
plane in order to improve heat dissipation.
3 www.national.com
Page 3
Part Number LM20333A
Manufactur National Semiconductor
Description 3A Synchronous Buck Regulator
Total Page 22 Pages
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