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National Semiconductor
National Semiconductor

LM20323A Datasheet

3A 500 kHz Synchronous Buck Regulator


LM20323A Datasheet Preview


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January 20, 2009
LM20323A
36V, 3A 500 kHz Synchronous Buck Regulator
General Description
The LM20323A is a full featured 500kHz synchronous buck
regulator capable of delivering up to 3A of load current. The
current mode control loop is externally compensated with only
two components, offering both high performance and ease of
use. The device is optimized to work over the input voltage
range of 4.5V to 36V making it well suited for high voltage
systems.
The device features internal Over Voltage Protection (OVP)
and Over Current Protection (OCP) circuits for increased sys-
tem reliability. A precision Enable pin and integrated UVLO
allows the turn-on of the device to be tightly controlled and
sequenced. Startup inrush currents are limited by both an in-
ternally fixed and externally adjustable soft-start circuit. Fault
detection and supply sequencing are possible with the inte-
grated power good (PGOOD) circuit.
The LM20323A is designed to work well in multi-rail power
supply architectures. The output voltage of the device can be
configured to track a higher voltage rail using the SS/TRK pin.
If the output of the LM20323A is pre-biased at startup it will
not sink current to pull the output low until the internal soft-
start ramp exceeds the voltage at the feedback pin.
The LM20323A is offered in an exposed pad 20-pin eTSSOP
package that can be soldered to the PCB, eliminating the
need for bulky heatsinks.
Features
4.5V to 36V input voltage range
3A output current, 5.2A peak current
130 m/110 mintegrated power MOSFETs
93% peak efficiency with synchronous rectification
1.0% feedback voltage accuracy
Current mode control, selectable compensation
Fixed 500 kHz switching frequency
Adjustable output voltage down to 0.8V
Compatible with pre-biased loads
Programmable soft-start with external capacitor
Precision enable pin with hysteresis
Integrated OVP, UVLO, PGOOD
Internally protected with peak current limit, thermal
shutdown and restart
Accurate current limit minimizes inductor size
Non-linear current mode slope compensation
eTSSOP-20 exposed pad package
Applications
Simple to design, high efficiency point of load regulation
from a 4.5V to 36V bus
High Performance DSPs, FPGAs, ASICs and
Microprocessors
Communications Infrastructure, Automotive
Simplified Application Circuit
PowerWise® is a registered trademark of National Semiconductor Corporation.
© 2009 National Semiconductor Corporation 300772
30077201
www.national.com
Page 1

www.DataShCeeot4Un.cnomection Diagram
Ordering Information
Order Number
LM20323AMH
LM20323AMHE
LM20323AMHX
Package Type
eTSSOP-20
Top View
30077202
eTSSOP-20 Package
NSC Package Drawing
MXA20A
Package Marking
20323AMH
Supplied As
73 Units per Rail
250 Units per Tape and Reel
2500 Units per Tape and Reel
Pin Descriptions
Pin(s)
1
2
3
4
5,6,15,16
7,8,13,14
9,10,11
12
17
18
19
20
EP
Name Description
Application Information
SS/TRK Soft-Start or Tracking control input
An internal 4.5 µA current source charges an external capacitor to set
the soft-start rate. The PWM can track to an external voltage ramp with
a low impedance source. If left open, an internal 1 ms SS ramp is
activated.
FB Feedback input to the error amplifier This pin is connected to the inverting input of the internal
from the regulated output
transconductance error amplifier. An 800 mV reference is internally
connected to the non-inverting input of the error amplifier.
PGOOD Power good output signal
Open drain output indicating the output voltage is regulating within
tolerance. A pull-up resistor of 10 kto 100 kis recommended if this
function is used.
COMP Output of the internal error amplifier and The loop compensation network should be connected between the
input to the Pulse Width Modulator
COMP pin and the AGND pin.
VIN Input supply voltage
Nominal operating range: 4.5V to 36V.
SW Switch pin
The drain terminal of the internal Synchronous Rectifier power
NMOSFET and the source terminal of the internal Control power
NMOSFET.
GND Ground
Internal reference for the power MOSFETs.
AGND Analog ground
Internal reference for the regulator control functions.
BOOT Boost input for bootstrap capacitor
An internal diode from VCC to BOOT charges an external capacitor
required from SW to BOOT to power the Control MOSFET gate driver.
VCC
Output of the high voltage linear
VCC tracks VIN up to about 7.2V. Above VIN = 7.2V, VCC is regulated
regulator. The VCC voltage is regulated to approximately 5.5 Volts. A 0.1 µF to 1 µF ceramic decoupling
to approximately 5.5V.
capacitor is required. The VCC pin is an output only.
EN Enable or UVLO input
An external voltage divider can be used to set the line undervoltage
lockout threshold. If the EN pin is left unconnected, a 2 µA pull-up
current source pulls the EN pin high to enable the regulator.
NC No Connection
Recommend connecting this pin to GND.
Exposed Exposed pad
Pad
Exposed metal pad on the underside of the package with a weak
electrical connection to GND. Connect this pad to the PC board ground
plane in order to improve heat dissipation.
www.national.com
2
Page 2

wwAwb.DsatoaSlhueette4UM.coamximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
VCC to GND
Storage Temperature
ESD Rating
Human Body Model (Note 2)
-0.3V to +8V
-65°C to 150°C
2kV
VIN to GND
BOOT to GND
BOOT to SW
SW to GND
SW to GND (Transient)
FB, EN, SS/TRK, COMP,
PGOOD to GND
-0.3V to +38V
-0.3V to +43V
-0.3V to +7V
-0.5V to +38V
-1.5V (< 20 ns)
-0.3V to +6V
Operating Ratings
VIN to GND
Junction Temperature
+4.5V to +36V
−40°C to + 125°C
Electrical Characteristics Unless otherwise stated, the following conditions apply: VVIN = 12V. Limits in standard
type are for TJ = 25°C only, limits in bold face type apply over the junction temperature (TJ) range of -40°C to +125°C. Minimum
and maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely
parametric norm at TJ = 25°C, and are provided for reference purposes only.
Symbol Parameter
Conditions
Min Typ Max Units
VFB
RHSW-DS(ON)
RLSW-DS(ON)
Feedback Pin Voltage
High-Side MOSFET On-Resistance
Low-Side MOSFET On-Resistance
VVIN = 4.5V to 36V
ISW = 3A
ISW = 3A
0.792
0.800 0.808
130 225
110 190
V
m
m
IQ
ISD
VUVLO
VUVLO(HYS)
VVCC
ISS
VTRKACC
IBOOT
VF-BOOT
Powergood
Operating Quiescent Current
Shutdown Quiescent Current
VIN Under Voltage Lockout
VIN Under Voltage Lockout Hysteresis
VCC Voltage
Soft-Start Pin Source Current
Soft-Start/Track Pin Accuracy
BOOT Diode Leakage
BOOT Diode Forward Voltage
VVIN = 4.5V to 36V
VEN = 0V
Rising VVIN
IVCC = -5 mA, VEN = 5V
VSS = 0V
VSS = 0.4V
VBOOT = 4V
IBOOT = -100 mA
2.3 3 mA
150 180 µA
4 4.25 4.5 V
350 450 mV
5.5 V
2 4.5 7 µA
-10 5 15 mV
10 nA
0.9 1.1 V
VFB(OVP)
VFB(OVP-HYS)
VFB(PG)
VFB(PG-HYS)
TPGOOD
IPGOOD(SNK)
IPGOOD(SRC)
Oscillator
Over Voltage Protection Rising Threshold
Over Voltage Protection Hysteresis
PGOOD Threshold, VOUT Rising
PGOOD Hysteresis
PGOOD Delay
PGOOD Low Sink Current
PGOOD High Leakage Current
VFB(OVP) / VFB
ΔVFB(OVP) / VFB
VFB(PG) / VFB
ΔVFB(PG) / VFB
VPGOOD = 0.5V
VPGOOD = 5V
107 110 112 %
2 3%
93 95 97 %
2 3%
20 µs
0.6 1
mA
5 200 nA
FSW1
Switching Frequency
DMAX
Maximum Duty Cycle
Error Amplifier
IOUT = 3A
470 520 570 kHz
70 %
IFB
ICOMP(SRC)
Feedback Pin Bias Current
COMP Output Source Current
ICOMP(SNK) COMP Output Sink Current
gm
AVOL
GBW
Error Amplifier DC Transconductance
Error Amplifier Voltage Gain
Error Amplifier Gain-Bandwidth Product
VFB = 1V
VFB = 0V
VCOMP = 0V
VFB = 1.6V
VCOMP = 1.6V
ICOMP = -50 µA to +50 µA
COMP pin open
COMP pin open
50
200 400
nA
µA
200 350
µA
450 515 600 µmho
2000
V/V
7 MHz
3 www.national.com
Page 3
Part Number LM20323A
Manufactur National Semiconductor
Description 3A 500 kHz Synchronous Buck Regulator
Total Page 20 Pages
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