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STMicroelectronics
STMicroelectronics

L6561 Datasheet

POWER FACTOR CORRECTOR


L6561 Datasheet Preview


® L6561
POWER FACTOR CORRECTOR
VERY PRECISE ADJUSTABLE OUTPUT
OVERVOLTAGE PROTECTION
MICROPOWERSTART-UPCURRENT (50µATYP.)
VERY LOW OPERATING SUPPLY CURRENT
(4mA TYP.)
INTERNAL START-UP TIMER
CURRENT SENSE FILTER ON CHIP
DISABLE FUNCTION
1% PRECISION (@ Tj = 25°C) INTERNAL
REFERENCE VOLTAGE
TRANSITION MODE OPERATION
TOTEM POLE OUTPUT CURRENT: ±400mA
DIP8/SO8 PACKAGES
DESCRIPTION
L6561 is the improved version of the L6560
standard Power Factor Corrector. Fully compat-
ible with the standard version, it has a superior
performant multiplier making the device capable
of working in wide input voltage range applica-
tions (from 85V to 265V) with an excellent THD.
Furthermore the start up current has been re-
duced at few tens of µA and a disable function
has been implemented on the ZCD pin, guaran-
teeing lower current consumption in stand by
mode.
Minidip
SO8
ORDERING NUMBERS:
L6561 (Minidip)
L6561D (SO8)
Realised in mixed BCD technology, the chip gives
the following benefits:
- micro power start up current
- 1% precision internal reference voltage
(Tj = 25°C)
- Soft Output Over Voltage Protection
- no need for external low pass filter onthe current
sense
- verylow operating quiescent current minimises
power dissipation
The totem pole output stage is capable of driving
a Power MOS or IGBT with source and sink cur-
rents of +/- 400mA. The device is operating in
transition mode and it is optimised for Electronic
Lamp Ballast application, AC-DC adaptors and
SMPS.
BLOCK DIAGRAM
1
INV
-
2.5V
+
COMP
2
MULT
3
MULTIPLIER
CS
4
40K
VOLTAGE
REGULATOR
OVER-VOLTAGE
DETECTION
+-
5pF
VCC
8
20V
R2
INTERNAL
SUPPLY 7V
R1
+
-
VREF2
2.3V
1.8V
UVLO
ZERO CURRENT
- DETECTOR
+
RQ
S
DRIVER
STARTER
VCC
7
GD
6
GND
5
ZCD
DISABLE
D97IN547B
April 1999
1/11
Page 1

L6561
ABSOLUTE MAXIMUM RATINGS
Symbol
IVcc
IGD
INV, COMP
MULT
CS
ZCD
Pin
8
7
1, 2, 3
Parameter
ICC + IZ
Output Totem Pole Peak Current (2µs)
Analog Inputs & Outputs
4 Current Sense Input
5 Zero Current Detector
Ptot Power Dissipation @Tamb = 50 °C
Tj Junction Temperature Operating Range
Tstg Storage Temperature
(Minidip)
(SO8)
PIN CONNECTION
Value
30
±700
-0.3 to 7
-0.3 to 7
50 (source)
-10 (sink)
1
0.65
-25 to 150
-55 to 150
Unit
mA
mA
V
V
mA
mA
W
°C
°C
THERMAL DATA
Symbol
Rth j-amb
Parameter
Thermal Resistance Junction-ambient
SO 8
150
MINIDIP
100
Unit
°C/W
PIN FUNCTIONS
N. Name
1 INV
2 COMP
3 MULT
4 CS
5 ZCD
6 GND
7 GD
8 VCC
Function
Inverting input of the error amplifier. A resistive divider is connected between the output
regulated voltage and this point, to provide voltage feedback.
Output of error amplifier. A feedback compensation network is placed between this pin and
the INV pin.
Input of the multiplier stage. A resistive divider connects to this pin the rectified mains. A
voltage signal, proportional to the rectified mains, appears on this pin.
Input to the comparator of the control loop. The current is sensed by a resistor and the
resulting voltage is applied to this pin.
Zero current detection input. If it is connected to GND, the device is disabled.
Current return for driver and control circuits.
Gate driver output. A push pull output stage is able to drive the Power MOS with peak current
of 400mA (source and sink).
Supply voltage of driver and control circuits.
2/11
Page 2

L6561
ELECTRICAL CHARACTERISTICS (VCC = 14.5V; Tamb = -25°C to 125°C; unless otherwise specified)
SUPPLY VOLTAGE SECTION
Symbol
VCC
VCC ON
VCC OFF
Hys
Pin Parameter
8 Operating Range
8 Turn-on Threshold
8 Turn-off Threshold
8 Hysteresis
Test Condition
after turn-on
Min.
11
11
8.7
2.2
Typ.
12
9.5
2.5
Max.
18
13
10.3
2.8
Unit
V
V
V
V
SUPPLY CURRENT SECTION
Symbol
ISTART-U
Iq
ICC
Pin Parameter
8 Start-up Current
8 Quiescent Current
Operating Supply Current
Iq Quiescent Current
VZ 8 Zener Voltage
ERROR AMPLIFIER SECTION
Test Condition
before turn-on (VCC =11V)
CL = 1nF @ 70KHz
in OVP condition Vpin1 = 2.7V
VPIN5 150mV, VCC > VCC off
VPIN5 150mV, VCC < VCC off
ICC = 25mA
Min.
20
20
18
Typ.
50
2.6
4
1.4
1.4
50
20
Max.
90
4
5.5
2.1
2.1
90
22
Unit
µA
mA
mA
mA
mA
µA
V
Symbol
VINV
IINV
GV
GB
ICOMP
VCOMP
Pin Parameter
1 Voltage Feedback Input
Threshold
Line Regulation
1 Input Bias Current
Voltage Gain
Gain Bandwidth
2 Source Current
Sink Current
2 Upper Clamp Voltage
Lower Clamp Voltage
MULTIPLIER SECTION
Test Condition
Tamb = 25°C
12V < VCC < 18V
VCC = 12 to 18V
Open loop
VCOMP = 4V, VINV = 2.4V
VCOMP = 4V, VINV = 2.6V
ISOURCE = 0.5mA
ISink = 0.5mA
Min.
2.465
2.44
60
-2
2.5
Typ.
2.5
2
-0.1
80
1
-4
4.5
5.8
2.25
Max.
2.535
2.56
5
-1
-8
Unit
V
mV
µA
dB
MHz
mA
mA
V
V
Symbol
VMULT
VCS
Vmult
K
Pin Parameter
3 Linear Operating Voltage
Output Max. Slope
Gain
CURRENT SENSE COMPARATOR
Test Condition
VMULT = from 0V to 0.5V
VCOMP = Upper Clamp Voltage
Min. Typ. Max.
0 to 3 0 to 3.5
1.65 1.9
Unit
V
VMULT = 1V VCOMP = 4V
0.45 0.6 0.75 1/V
Symbol
VCS
ICS
td (H-L)
Pin Parameter
4 Current Sense Reference
Clamp
4 Input Bias Current
4 Delay to Output
4 Current Sense Offset
Test Condition
VMULT = 2.5V
VCOMP = Upper Clamp Voltage
VOS = 0
Min.
1.6
Typ.
1.7
-0.05
200
0
Max.
1.8
-1
450
15
Unit
V
µA
ns
mV
3/11
Page 3

L6561
ELECTRICAL CHARACTERISTICS (continued)
ZERO CURRENT DETECTOR
Symbol Pin
Parameter
VZCD
5 Input Threshold Voltage
Rising Edge
Hysteresis
VZCD
VZCD
VZCD
IZCD
IZCD
IZCD
VDIS
IZCD
5 Upper Clamp Voltage
5 Upper Clamp Voltage
5 Lower Clamp Voltage
5 Sink Bias Current
5 Source Current Capability
5 Sink Current Capability
5 Disable threshold
5 Restart Current After Disable
OUTPUT SECTION
Test Condition
(1)
(1)
IZCD = 20µA
IZCD = 3mA
IZCD = –3mA
1V VZCD 4.5V
VZCD < Vdis; VCC > VCCOFF
VGD 7 Dropout Voltage
tr 7 Output Voltage Rise Time
tf 7 Output Voltage Fall Time
IGD off
7 IGD Sink Current
OUTPUT OVERVOLTAGE SECTION
IGDsource = 200mA
IGDsource = 20mA
IGDsink = 200mA
IGDsink = 20mA
CL = 1nF
CL = 1nF
VCC =3.5V VGD = 1V
IOVP 2 OVP Triggering Current
Static OVP Threshold
RESTART TIMER
tSTART
Start Timer
(1) Parameter guaranteed by design, not tested in production.
Min. Typ. Max. Unit
2.1 V
0.3
4.5
4.7
0.3
-3
3
150
-100
0.5
5.1
5.2
0.65
2
200
-200
0.7
5.9
6.1
1
-10
10
250
-300
V
V
V
V
µA
mA
mA
mV
µA
1.2 2
V
0.7 1
V
1.5 V
0.3 V
40 100 ns
40 100 ns
5 10 - mA
35 40 45
2.1 2.25 2.4
µA
V
70 150 400 µs
OVER VOLTAGE PROTECTION OVP
The output voltage is expected to be kept by the
operation of the PFC circuit close to its nominal
value. This is set by the ratio of the two external
resistors R1 and R2 (see fig. 2), taking into con-
sideration that the non inverting input of the error
amplifier is biased inside the L6561 at 2.5V.
In steady state conditions, the current through R1
and R2 is:
IR1sc
=
Vout 2.5
R1
=
IR2
=
2.5V
R2
and, if the external compensation network is
made only with a capacitor Ccomp, the current
through Ccomp equals zero.
When the output voltage increases abruptly the
current through R1 becomes:
IR1
=
Voutsc
+
VOUT
R1
2.5
=
IR1sc
+
IR1
Since the current through R2 does not change,
IR1 must flow through the capacitor Ccomp and
enter the error amplifier.
This current is monitored inside the L6561 and when
reaches about 37µA the output voltage of the multi-
plier is forced to decrease, thus reducing the energy
drawn from the mains. If the current exceeds 40µA,
the OVP protection is triggered (Dynamic OVP), and
the external power transistor is switched off until the
current falls approximately below 10µA.
However, if the overvoltage persists, an internal
comparator (Static OVP) confirms the OVP condi-
tion keeping the external power switch turned off
(see fig. 1).
Finally, the overvoltage that triggers the OVP
function is:
Vout = R1 40µA.
Typical values for R1, R2 and C are shown in the
application circuits. The overvoltage can be set inde-
pendently from the average output voltage. The pre-
cision in setting the overvoltage threshold is 7% of
4/11
Page 4
Part Number L6561
Manufactur STMicroelectronics
Description POWER FACTOR CORRECTOR
Total Page 11 Pages
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